arch/arm/mach-pxa/lpd270.c

   1 /*
   2  * linux/arch/arm/mach-pxa/lpd270.c
   3  *
   4  * Support for the LogicPD PXA270 Card Engine.
   5  * Derived from the mainstone code, which carries these notices:
   6  *
   7  * Author:      Nicolas Pitre
   8  * Created:     Nov 05, 2002
   9  * Copyright:   MontaVista Software Inc.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/sched.h>
  21 #include <linux/bitops.h>
  22 #include <linux/fb.h>
  23 #include <linux/ioport.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/partitions.h>
  26 #include <linux/pwm_backlight.h>
  27
  28 #include <asm/types.h>
  29 #include <asm/setup.h>
  30 #include <asm/memory.h>
  31 #include <asm/mach-types.h>
  32 #include <mach/hardware.h>
  33 #include <asm/irq.h>
  34 #include <asm/sizes.h>
  35
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/map.h>
  38 #include <asm/mach/irq.h>
  39 #include <asm/mach/flash.h>
  40
  41 #include <mach/pxa27x.h>
  42 #include <mach/gpio.h>
  43 #include <mach/lpd270.h>
  44 #include <mach/audio.h>
  45 #include <mach/pxafb.h>
  46 #include <mach/mmc.h>
  47 #include <mach/irda.h>
  48 #include <mach/ohci.h>
  49
  50 #include "generic.h"
  51 #include "devices.h"
  52
  53 static unsigned long lpd270_pin_config[] __initdata = {
  54         /* Chip Selects */
  55         GPIO15_nCS_1,   /* Mainboard Flash */
  56         GPIO78_nCS_2,   /* CPLD + Ethernet */
  57
  58         /* LCD - 16bpp Active TFT */
  59         GPIO58_LCD_LDD_0,
  60         GPIO59_LCD_LDD_1,
  61         GPIO60_LCD_LDD_2,
  62         GPIO61_LCD_LDD_3,
  63         GPIO62_LCD_LDD_4,
  64         GPIO63_LCD_LDD_5,
  65         GPIO64_LCD_LDD_6,
  66         GPIO65_LCD_LDD_7,
  67         GPIO66_LCD_LDD_8,
  68         GPIO67_LCD_LDD_9,
  69         GPIO68_LCD_LDD_10,
  70         GPIO69_LCD_LDD_11,
  71         GPIO70_LCD_LDD_12,
  72         GPIO71_LCD_LDD_13,
  73         GPIO72_LCD_LDD_14,
  74         GPIO73_LCD_LDD_15,
  75         GPIO74_LCD_FCLK,
  76         GPIO75_LCD_LCLK,
  77         GPIO76_LCD_PCLK,
  78         GPIO77_LCD_BIAS,
  79         GPIO16_PWM0_OUT,        /* Backlight */
  80
  81         /* USB Host */
  82         GPIO88_USBH1_PWR,
  83         GPIO89_USBH1_PEN,
  84
  85         /* AC97 */
  86         GPIO45_AC97_SYSCLK,
  87
  88         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  89 };
  90
  91 static unsigned int lpd270_irq_enabled;
  92
  93 static void lpd270_mask_irq(unsigned int irq)
  94 {
  95         int lpd270_irq = irq - LPD270_IRQ(0);
  96
  97         __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
  98
  99         lpd270_irq_enabled &= ~(1 << lpd270_irq);
 100         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 101 }
 102
 103 static void lpd270_unmask_irq(unsigned int irq)
 104 {
 105         int lpd270_irq = irq - LPD270_IRQ(0);
 106
 107         lpd270_irq_enabled |= 1 << lpd270_irq;
 108         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 109 }
 110
 111 static struct irq_chip lpd270_irq_chip = {
 112         .name           = "CPLD",
 113         .ack            = lpd270_mask_irq,
 114         .mask           = lpd270_mask_irq,
 115         .unmask         = lpd270_unmask_irq,
 116 };
 117
 118 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
 119 {
 120         unsigned long pending;
 121
 122         pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
 123         do {
 124                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
 125                 if (likely(pending)) {
 126                         irq = LPD270_IRQ(0) + __ffs(pending);
 127                         generic_handle_irq(irq);
 128
 129                         pending = __raw_readw(LPD270_INT_STATUS) &
 130                                                 lpd270_irq_enabled;
 131                 }
 132         } while (pending);
 133 }
 134
 135 static void __init lpd270_init_irq(void)
 136 {
 137         int irq;
 138
 139         pxa27x_init_irq();
 140
 141         __raw_writew(0, LPD270_INT_MASK);
 142         __raw_writew(0, LPD270_INT_STATUS);
 143
 144         /* setup extra LogicPD PXA270 irqs */
 145         for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
 146                 set_irq_chip(irq, &lpd270_irq_chip);
 147                 set_irq_handler(irq, handle_level_irq);
 148                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 149         }
 150         set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
 151         set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 152 }
 153
 154
 155 #ifdef CONFIG_PM
 156 static int lpd270_irq_resume(struct sys_device *dev)
 157 {
 158         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 159         return 0;
 160 }
 161
 162 static struct sysdev_class lpd270_irq_sysclass = {
 163         .name = "cpld_irq",
 164         .resume = lpd270_irq_resume,
 165 };
 166
 167 static struct sys_device lpd270_irq_device = {
 168         .cls = &lpd270_irq_sysclass,
 169 };
 170
 171 static int __init lpd270_irq_device_init(void)
 172 {
 173         int ret = -ENODEV;
 174         if (machine_is_logicpd_pxa270()) {
 175                 ret = sysdev_class_register(&lpd270_irq_sysclass);
 176                 if (ret == 0)
 177                         ret = sysdev_register(&lpd270_irq_device);
 178         }
 179         return ret;
 180 }
 181
 182 device_initcall(lpd270_irq_device_init);
 183 #endif
 184
 185
 186 static struct resource smc91x_resources[] = {
 187         [0] = {
 188                 .start  = LPD270_ETH_PHYS,
 189                 .end    = (LPD270_ETH_PHYS + 0xfffff),
 190                 .flags  = IORESOURCE_MEM,
 191         },
 192         [1] = {
 193                 .start  = LPD270_ETHERNET_IRQ,
 194                 .end    = LPD270_ETHERNET_IRQ,
 195                 .flags  = IORESOURCE_IRQ,
 196         },
 197 };
 198
 199 static struct platform_device smc91x_device = {
 200         .name           = "smc91x",
 201         .id             = 0,
 202         .num_resources  = ARRAY_SIZE(smc91x_resources),
 203         .resource       = smc91x_resources,
 204 };
 205
 206 static struct resource lpd270_flash_resources[] = {
 207         [0] = {
 208                 .start  = PXA_CS0_PHYS,
 209                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
 210                 .flags  = IORESOURCE_MEM,
 211         },
 212         [1] = {
 213                 .start  = PXA_CS1_PHYS,
 214                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
 215                 .flags  = IORESOURCE_MEM,
 216         },
 217 };
 218
 219 static struct mtd_partition lpd270_flash0_partitions[] = {
 220         {
 221                 .name =         "Bootloader",
 222                 .size =         0x00040000,
 223                 .offset =       0,
 224                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
 225         }, {
 226                 .name =         "Kernel",
 227                 .size =         0x00400000,
 228                 .offset =       0x00040000,
 229         }, {
 230                 .name =         "Filesystem",
 231                 .size =         MTDPART_SIZ_FULL,
 232                 .offset =       0x00440000
 233         },
 234 };
 235
 236 static struct flash_platform_data lpd270_flash_data[2] = {
 237         {
 238                 .name           = "processor-flash",
 239                 .map_name       = "cfi_probe",
 240                 .parts          = lpd270_flash0_partitions,
 241                 .nr_parts       = ARRAY_SIZE(lpd270_flash0_partitions),
 242         }, {
 243                 .name           = "mainboard-flash",
 244                 .map_name       = "cfi_probe",
 245                 .parts          = NULL,
 246                 .nr_parts       = 0,
 247         }
 248 };
 249
 250 static struct platform_device lpd270_flash_device[2] = {
 251         {
 252                 .name           = "pxa2xx-flash",
 253                 .id             = 0,
 254                 .dev = {
 255                         .platform_data  = &lpd270_flash_data[0],
 256                 },
 257                 .resource       = &lpd270_flash_resources[0],
 258                 .num_resources  = 1,
 259         }, {
 260                 .name           = "pxa2xx-flash",
 261                 .id             = 1,
 262                 .dev = {
 263                         .platform_data  = &lpd270_flash_data[1],
 264                 },
 265                 .resource       = &lpd270_flash_resources[1],
 266                 .num_resources  = 1,
 267         },
 268 };
 269
 270 static struct platform_pwm_backlight_data lpd270_backlight_data = {
 271         .pwm_id         = 0,
 272         .max_brightness = 1,
 273         .dft_brightness = 1,
 274         .pwm_period_ns  = 78770,
 275 };
 276
 277 static struct platform_device lpd270_backlight_device = {
 278         .name           = "pwm-backlight",
 279         .dev            = {
 280                 .parent = &pxa27x_device_pwm0.dev,
 281                 .platform_data = &lpd270_backlight_data,
 282         },
 283 };
 284
 285 /* 5.7" TFT QVGA (LoLo display number 1) */
 286 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
 287         .pixclock               = 150000,
 288         .xres                   = 320,
 289         .yres                   = 240,
 290         .bpp                    = 16,
 291         .hsync_len              = 0x14,
 292         .left_margin            = 0x28,
 293         .right_margin           = 0x0a,
 294         .vsync_len              = 0x02,
 295         .upper_margin           = 0x08,
 296         .lower_margin           = 0x14,
 297         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 298 };
 299
 300 static struct pxafb_mach_info sharp_lq057q3dc02 = {
 301         .modes                  = &sharp_lq057q3dc02_mode,
 302         .num_modes              = 1,
 303         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 304                                   LCD_ALTERNATE_MAPPING,
 305 };
 306
 307 /* 12.1" TFT SVGA (LoLo display number 2) */
 308 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
 309         .pixclock               = 50000,
 310         .xres                   = 800,
 311         .yres                   = 600,
 312         .bpp                    = 16,
 313         .hsync_len              = 0x05,
 314         .left_margin            = 0x52,
 315         .right_margin           = 0x05,
 316         .vsync_len              = 0x04,
 317         .upper_margin           = 0x14,
 318         .lower_margin           = 0x0a,
 319         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 320 };
 321
 322 static struct pxafb_mach_info sharp_lq121s1dg31 = {
 323         .modes                  = &sharp_lq121s1dg31_mode,
 324         .num_modes              = 1,
 325         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 326                                   LCD_ALTERNATE_MAPPING,
 327 };
 328
 329 /* 3.6" TFT QVGA (LoLo display number 3) */
 330 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
 331         .pixclock               = 150000,
 332         .xres                   = 320,
 333         .yres                   = 240,
 334         .bpp                    = 16,
 335         .hsync_len              = 0x0e,
 336         .left_margin            = 0x04,
 337         .right_margin           = 0x0a,
 338         .vsync_len              = 0x03,
 339         .upper_margin           = 0x03,
 340         .lower_margin           = 0x03,
 341         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 342 };
 343
 344 static struct pxafb_mach_info sharp_lq036q1da01 = {
 345         .modes                  = &sharp_lq036q1da01_mode,
 346         .num_modes              = 1,
 347         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 348                                   LCD_ALTERNATE_MAPPING,
 349 };
 350
 351 /* 6.4" TFT VGA (LoLo display number 5) */
 352 static struct pxafb_mode_info sharp_lq64d343_mode = {
 353         .pixclock               = 25000,
 354         .xres                   = 640,
 355         .yres                   = 480,
 356         .bpp                    = 16,
 357         .hsync_len              = 0x31,
 358         .left_margin            = 0x89,
 359         .right_margin           = 0x19,
 360         .vsync_len              = 0x12,
 361         .upper_margin           = 0x22,
 362         .lower_margin           = 0x00,
 363         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 364 };
 365
 366 static struct pxafb_mach_info sharp_lq64d343 = {
 367         .modes                  = &sharp_lq64d343_mode,
 368         .num_modes              = 1,
 369         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 370                                   LCD_ALTERNATE_MAPPING,
 371 };
 372
 373 /* 10.4" TFT VGA (LoLo display number 7) */
 374 static struct pxafb_mode_info sharp_lq10d368_mode = {
 375         .pixclock               = 25000,
 376         .xres                   = 640,
 377         .yres                   = 480,
 378         .bpp                    = 16,
 379         .hsync_len              = 0x31,
 380         .left_margin            = 0x89,
 381         .right_margin           = 0x19,
 382         .vsync_len              = 0x12,
 383         .upper_margin           = 0x22,
 384         .lower_margin           = 0x00,
 385         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 386 };
 387
 388 static struct pxafb_mach_info sharp_lq10d368 = {
 389         .modes                  = &sharp_lq10d368_mode,
 390         .num_modes              = 1,
 391         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 392                                   LCD_ALTERNATE_MAPPING,
 393 };
 394
 395 /* 3.5" TFT QVGA (LoLo display number 8) */
 396 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
 397         .pixclock               = 150000,
 398         .xres                   = 240,
 399         .yres                   = 320,
 400         .bpp                    = 16,
 401         .hsync_len              = 0x0e,
 402         .left_margin            = 0x0a,
 403         .right_margin           = 0x0a,
 404         .vsync_len              = 0x03,
 405         .upper_margin           = 0x05,
 406         .lower_margin           = 0x14,
 407         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 408 };
 409
 410 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
 411         .modes                  = &sharp_lq035q7db02_20_mode,
 412         .num_modes              = 1,
 413         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 414                                   LCD_ALTERNATE_MAPPING,
 415 };
 416
 417 static struct pxafb_mach_info *lpd270_lcd_to_use;
 418
 419 static int __init lpd270_set_lcd(char *str)
 420 {
 421         if (!strnicmp(str, "lq057q3dc02", 11)) {
 422                 lpd270_lcd_to_use = &sharp_lq057q3dc02;
 423         } else if (!strnicmp(str, "lq121s1dg31", 11)) {
 424                 lpd270_lcd_to_use = &sharp_lq121s1dg31;
 425         } else if (!strnicmp(str, "lq036q1da01", 11)) {
 426                 lpd270_lcd_to_use = &sharp_lq036q1da01;
 427         } else if (!strnicmp(str, "lq64d343", 8)) {
 428                 lpd270_lcd_to_use = &sharp_lq64d343;
 429         } else if (!strnicmp(str, "lq10d368", 8)) {
 430                 lpd270_lcd_to_use = &sharp_lq10d368;
 431         } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
 432                 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
 433         } else {
 434                 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
 435         }
 436
 437         return 1;
 438 }
 439
 440 __setup("lcd=", lpd270_set_lcd);
 441
 442 static struct platform_device *platform_devices[] __initdata = {
 443         &smc91x_device,
 444         &lpd270_backlight_device,
 445         &lpd270_flash_device[0],
 446         &lpd270_flash_device[1],
 447 };
 448
 449 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
 450         .port_mode      = PMM_PERPORT_MODE,
 451         .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
 452 };
 453
 454 static void __init lpd270_init(void)
 455 {
 456         pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
 457
 458         lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
 459         lpd270_flash_data[1].width = 4;
 460
 461         /*
 462          * System bus arbiter setting:
 463          * - Core_Park
 464          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
 465          */
 466         ARB_CNTRL = ARB_CORE_PARK | 0x234;
 467
 468         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 469
 470         pxa_set_ac97_info(NULL);
 471
 472         if (lpd270_lcd_to_use != NULL)
 473                 set_pxa_fb_info(lpd270_lcd_to_use);
 474
 475         pxa_set_ohci_info(&lpd270_ohci_platform_data);
 476 }
 477
 478
 479 static struct map_desc lpd270_io_desc[] __initdata = {
 480         {
 481                 .virtual        = LPD270_CPLD_VIRT,
 482                 .pfn            = __phys_to_pfn(LPD270_CPLD_PHYS),
 483                 .length         = LPD270_CPLD_SIZE,
 484                 .type           = MT_DEVICE,
 485         },
 486 };
 487
 488 static void __init lpd270_map_io(void)
 489 {
 490         pxa_map_io();
 491         iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
 492
 493         /* for use I SRAM as framebuffer.  */
 494         PSLR |= 0x00000F04;
 495         PCFR  = 0x00000066;
 496 }
 497
 498 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
 499         /* Maintainer: Peter Barada */
 500         .phys_io        = 0x40000000,
 501         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 502         .boot_params    = 0xa0000100,
 503         .map_io         = lpd270_map_io,
 504         .init_irq       = lpd270_init_irq,
 505         .timer          = &pxa_timer,
 506         .init_machine   = lpd270_init,
 507 MACHINE_END