arch/mips/kernel/smp.c

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  15  *
  16  * Copyright (C) 2000, 2001 Kanoj Sarcar
  17  * Copyright (C) 2000, 2001 Ralf Baechle
  18  * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19  * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20  */
  21 #include <linux/cache.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/smp.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/threads.h>
  28 #include <linux/module.h>
  29 #include <linux/time.h>
  30 #include <linux/timex.h>
  31 #include <linux/sched.h>
  32 #include <linux/cpumask.h>
  33 #include <linux/cpu.h>
  34 #include <linux/err.h>
  35
  36 #include <asm/atomic.h>
  37 #include <asm/cpu.h>
  38 #include <asm/processor.h>
  39 #include <asm/r4k-timer.h>
  40 #include <asm/system.h>
  41 #include <asm/mmu_context.h>
  42 #include <asm/time.h>
  43
  44 #ifdef CONFIG_MIPS_MT_SMTC
  45 #include <asm/mipsmtregs.h>
  46 #endif /* CONFIG_MIPS_MT_SMTC */
  47
  48 volatile cpumask_t cpu_callin_map;      /* Bitmask of started secondaries */
  49 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
  50 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
  51
  52 extern void cpu_idle(void);
  53
  54 /* Number of TCs (or siblings in Intel speak) per CPU core */
  55 int smp_num_siblings = 1;
  56 EXPORT_SYMBOL(smp_num_siblings);
  57
  58 /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  59 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  60 EXPORT_SYMBOL(cpu_sibling_map);
  61
  62 /* representing cpus for which sibling maps can be computed */
  63 static cpumask_t cpu_sibling_setup_map;
  64
  65 static inline void set_cpu_sibling_map(int cpu)
  66 {
  67         int i;
  68
  69         cpu_set(cpu, cpu_sibling_setup_map);
  70
  71         if (smp_num_siblings > 1) {
  72                 for_each_cpu_mask(i, cpu_sibling_setup_map) {
  73                         if (cpu_data[cpu].core == cpu_data[i].core) {
  74                                 cpu_set(i, cpu_sibling_map[cpu]);
  75                                 cpu_set(cpu, cpu_sibling_map[i]);
  76                         }
  77                 }
  78         } else
  79                 cpu_set(cpu, cpu_sibling_map[cpu]);
  80 }
  81
  82 struct plat_smp_ops *mp_ops;
  83
  84 __cpuinit void register_smp_ops(struct plat_smp_ops *ops)
  85 {
  86         if (mp_ops)
  87                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
  88
  89         mp_ops = ops;
  90 }
  91
  92 /*
  93  * First C code run on the secondary CPUs after being started up by
  94  * the master.
  95  */
  96 asmlinkage __cpuinit void start_secondary(void)
  97 {
  98         unsigned int cpu;
  99
 100 #ifdef CONFIG_MIPS_MT_SMTC
 101         /* Only do cpu_probe for first TC of CPU */
 102         if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
 103 #endif /* CONFIG_MIPS_MT_SMTC */
 104         cpu_probe();
 105         cpu_report();
 106         per_cpu_trap_init();
 107         mips_clockevent_init();
 108         mp_ops->init_secondary();
 109
 110         /*
 111          * XXX parity protection should be folded in here when it's converted
 112          * to an option instead of something based on .cputype
 113          */
 114
 115         calibrate_delay();
 116         preempt_disable();
 117         cpu = smp_processor_id();
 118         cpu_data[cpu].udelay_val = loops_per_jiffy;
 119
 120         notify_cpu_starting(cpu);
 121
 122         mp_ops->smp_finish();
 123         set_cpu_sibling_map(cpu);
 124
 125         cpu_set(cpu, cpu_callin_map);
 126
 127         synchronise_count_slave();
 128
 129         cpu_idle();
 130 }
 131
 132 void arch_send_call_function_ipi(cpumask_t mask)
 133 {
 134         mp_ops->send_ipi_mask(mask, SMP_CALL_FUNCTION);
 135 }
 136
 137 /*
 138  * We reuse the same vector for the single IPI
 139  */
 140 void arch_send_call_function_single_ipi(int cpu)
 141 {
 142         mp_ops->send_ipi_mask(cpumask_of_cpu(cpu), SMP_CALL_FUNCTION);
 143 }
 144
 145 /*
 146  * Call into both interrupt handlers, as we share the IPI for them
 147  */
 148 void smp_call_function_interrupt(void)
 149 {
 150         irq_enter();
 151         generic_smp_call_function_single_interrupt();
 152         generic_smp_call_function_interrupt();
 153         irq_exit();
 154 }
 155
 156 static void stop_this_cpu(void *dummy)
 157 {
 158         /*
 159          * Remove this CPU:
 160          */
 161         cpu_clear(smp_processor_id(), cpu_online_map);
 162         for (;;) {
 163                 if (cpu_wait)
 164                         (*cpu_wait)();          /* Wait if available. */
 165         }
 166 }
 167
 168 void smp_send_stop(void)
 169 {
 170         smp_call_function(stop_this_cpu, NULL, 0);
 171 }
 172
 173 void __init smp_cpus_done(unsigned int max_cpus)
 174 {
 175         mp_ops->cpus_done();
 176         synchronise_count_master();
 177 }
 178
 179 /* called from main before smp_init() */
 180 void __init smp_prepare_cpus(unsigned int max_cpus)
 181 {
 182         init_new_context(current, &init_mm);
 183         current_thread_info()->cpu = 0;
 184         mp_ops->prepare_cpus(max_cpus);
 185         set_cpu_sibling_map(0);
 186 #ifndef CONFIG_HOTPLUG_CPU
 187         cpu_present_map = cpu_possible_map;
 188 #endif
 189 }
 190
 191 /* preload SMP state for boot cpu */
 192 void __devinit smp_prepare_boot_cpu(void)
 193 {
 194         cpu_set(0, cpu_possible_map);
 195         cpu_set(0, cpu_online_map);
 196         cpu_set(0, cpu_callin_map);
 197 }
 198
 199 /*
 200  * Called once for each "cpu_possible(cpu)".  Needs to spin up the cpu
 201  * and keep control until "cpu_online(cpu)" is set.  Note: cpu is
 202  * physical, not logical.
 203  */
 204 static struct task_struct *cpu_idle_thread[NR_CPUS];
 205
 206 int __cpuinit __cpu_up(unsigned int cpu)
 207 {
 208         struct task_struct *idle;
 209
 210         /*
 211          * Processor goes to start_secondary(), sets online flag
 212          * The following code is purely to make sure
 213          * Linux can schedule processes on this slave.
 214          */
 215         if (!cpu_idle_thread[cpu]) {
 216                 idle = fork_idle(cpu);
 217                 cpu_idle_thread[cpu] = idle;
 218
 219                 if (IS_ERR(idle))
 220                         panic(KERN_ERR "Fork failed for CPU %d", cpu);
 221         } else {
 222                 idle = cpu_idle_thread[cpu];
 223                 init_idle(idle, cpu);
 224         }
 225
 226         mp_ops->boot_secondary(cpu, idle);
 227
 228         /*
 229          * Trust is futile.  We should really have timeouts ...
 230          */
 231         while (!cpu_isset(cpu, cpu_callin_map))
 232                 udelay(100);
 233
 234         cpu_set(cpu, cpu_online_map);
 235
 236         return 0;
 237 }
 238
 239 /* Not really SMP stuff ... */
 240 int setup_profiling_timer(unsigned int multiplier)
 241 {
 242         return 0;
 243 }
 244
 245 static void flush_tlb_all_ipi(void *info)
 246 {
 247         local_flush_tlb_all();
 248 }
 249
 250 void flush_tlb_all(void)
 251 {
 252         on_each_cpu(flush_tlb_all_ipi, NULL, 1);
 253 }
 254
 255 static void flush_tlb_mm_ipi(void *mm)
 256 {
 257         local_flush_tlb_mm((struct mm_struct *)mm);
 258 }
 259
 260 /*
 261  * Special Variant of smp_call_function for use by TLB functions:
 262  *
 263  *  o No return value
 264  *  o collapses to normal function call on UP kernels
 265  *  o collapses to normal function call on systems with a single shared
 266  *    primary cache.
 267  *  o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
 268  */
 269 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
 270 {
 271 #ifndef CONFIG_MIPS_MT_SMTC
 272         smp_call_function(func, info, 1);
 273 #endif
 274 }
 275
 276 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
 277 {
 278         preempt_disable();
 279
 280         smp_on_other_tlbs(func, info);
 281         func(info);
 282
 283         preempt_enable();
 284 }
 285
 286 /*
 287  * The following tlb flush calls are invoked when old translations are
 288  * being torn down, or pte attributes are changing. For single threaded
 289  * address spaces, a new context is obtained on the current cpu, and tlb
 290  * context on other cpus are invalidated to force a new context allocation
 291  * at switch_mm time, should the mm ever be used on other cpus. For
 292  * multithreaded address spaces, intercpu interrupts have to be sent.
 293  * Another case where intercpu interrupts are required is when the target
 294  * mm might be active on another cpu (eg debuggers doing the flushes on
 295  * behalf of debugees, kswapd stealing pages from another process etc).
 296  * Kanoj 07/00.
 297  */
 298
 299 void flush_tlb_mm(struct mm_struct *mm)
 300 {
 301         preempt_disable();
 302
 303         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 304                 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
 305         } else {
 306                 cpumask_t mask = cpu_online_map;
 307                 unsigned int cpu;
 308
 309                 cpu_clear(smp_processor_id(), mask);
 310                 for_each_cpu_mask(cpu, mask)
 311                         if (cpu_context(cpu, mm))
 312                                 cpu_context(cpu, mm) = 0;
 313         }
 314         local_flush_tlb_mm(mm);
 315
 316         preempt_enable();
 317 }
 318
 319 struct flush_tlb_data {
 320         struct vm_area_struct *vma;
 321         unsigned long addr1;
 322         unsigned long addr2;
 323 };
 324
 325 static void flush_tlb_range_ipi(void *info)
 326 {
 327         struct flush_tlb_data *fd = info;
 328
 329         local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
 330 }
 331
 332 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 333 {
 334         struct mm_struct *mm = vma->vm_mm;
 335
 336         preempt_disable();
 337         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 338                 struct flush_tlb_data fd = {
 339                         .vma = vma,
 340                         .addr1 = start,
 341                         .addr2 = end,
 342                 };
 343
 344                 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
 345         } else {
 346                 cpumask_t mask = cpu_online_map;
 347                 unsigned int cpu;
 348
 349                 cpu_clear(smp_processor_id(), mask);
 350                 for_each_cpu_mask(cpu, mask)
 351                         if (cpu_context(cpu, mm))
 352                                 cpu_context(cpu, mm) = 0;
 353         }
 354         local_flush_tlb_range(vma, start, end);
 355         preempt_enable();
 356 }
 357
 358 static void flush_tlb_kernel_range_ipi(void *info)
 359 {
 360         struct flush_tlb_data *fd = info;
 361
 362         local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
 363 }
 364
 365 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 366 {
 367         struct flush_tlb_data fd = {
 368                 .addr1 = start,
 369                 .addr2 = end,
 370         };
 371
 372         on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
 373 }
 374
 375 static void flush_tlb_page_ipi(void *info)
 376 {
 377         struct flush_tlb_data *fd = info;
 378
 379         local_flush_tlb_page(fd->vma, fd->addr1);
 380 }
 381
 382 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 383 {
 384         preempt_disable();
 385         if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
 386                 struct flush_tlb_data fd = {
 387                         .vma = vma,
 388                         .addr1 = page,
 389                 };
 390
 391                 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
 392         } else {
 393                 cpumask_t mask = cpu_online_map;
 394                 unsigned int cpu;
 395
 396                 cpu_clear(smp_processor_id(), mask);
 397                 for_each_cpu_mask(cpu, mask)
 398                         if (cpu_context(cpu, vma->vm_mm))
 399                                 cpu_context(cpu, vma->vm_mm) = 0;
 400         }
 401         local_flush_tlb_page(vma, page);
 402         preempt_enable();
 403 }
 404
 405 static void flush_tlb_one_ipi(void *info)
 406 {
 407         unsigned long vaddr = (unsigned long) info;
 408
 409         local_flush_tlb_one(vaddr);
 410 }
 411
 412 void flush_tlb_one(unsigned long vaddr)
 413 {
 414         smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
 415 }
 416
 417 EXPORT_SYMBOL(flush_tlb_page);
 418 EXPORT_SYMBOL(flush_tlb_one);