?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Linux 2.6.31.8
[linux/fpc-iii.git] / sound / soc / codecs / uda1380.c
blob5b21594e0e58283ee30d3ee6ea209d8636929aef
1 /*
2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
9 * Improved support for DAPM and audio routing/mixing capabilities,
10 * added TLV support.
11 *
12 * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
13 * codec model.
14 *
15 * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
16 * Copyright 2005 Openedhand Ltd.
17 */
18
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/types.h>
22 #include <linux/string.h>
23 #include <linux/slab.h>
24 #include <linux/errno.h>
25 #include <linux/ioctl.h>
26 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/workqueue.h>
29 #include <sound/core.h>
30 #include <sound/control.h>
31 #include <sound/initval.h>
32 #include <sound/info.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/tlv.h>
36
37 #include "uda1380.h"
38
39 static struct work_struct uda1380_work;
40 static struct snd_soc_codec *uda1380_codec;
41
42 /*
43 * uda1380 register cache
44 */
45 static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
46 0x0502, 0x0000, 0x0000, 0x3f3f,
47 0x0202, 0x0000, 0x0000, 0x0000,
48 0x0000, 0x0000, 0x0000, 0x0000,
49 0x0000, 0x0000, 0x0000, 0x0000,
50 0x0000, 0xff00, 0x0000, 0x4800,
51 0x0000, 0x0000, 0x0000, 0x0000,
52 0x0000, 0x0000, 0x0000, 0x0000,
53 0x0000, 0x0000, 0x0000, 0x0000,
54 0x0000, 0x8000, 0x0002, 0x0000,
55 };
56
57 static unsigned long uda1380_cache_dirty;
58
59 /*
60 * read uda1380 register cache
61 */
62 static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
63 unsigned int reg)
64 {
65 u16 *cache = codec->reg_cache;
66 if (reg == UDA1380_RESET)
67 return 0;
68 if (reg >= UDA1380_CACHEREGNUM)
69 return -1;
70 return cache[reg];
71 }
72
73 /*
74 * write uda1380 register cache
75 */
76 static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
77 u16 reg, unsigned int value)
78 {
79 u16 *cache = codec->reg_cache;
80
81 if (reg >= UDA1380_CACHEREGNUM)
82 return;
83 if ((reg >= 0x10) && (cache[reg] != value))
84 set_bit(reg - 0x10, &uda1380_cache_dirty);
85 cache[reg] = value;
86 }
87
88 /*
89 * write to the UDA1380 register space
90 */
91 static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
92 unsigned int value)
93 {
94 u8 data[3];
95
96 /* data is
97 * data[0] is register offset
98 * data[1] is MS byte
99 * data[2] is LS byte
100 */
101 data[0] = reg;
102 data[1] = (value & 0xff00) >> 8;
103 data[2] = value & 0x00ff;
104
105 uda1380_write_reg_cache(codec, reg, value);
106
107 /* the interpolator & decimator regs must only be written when the
108 * codec DAI is active.
109 */
110 if (!codec->active && (reg >= UDA1380_MVOL))
111 return 0;
112 pr_debug("uda1380: hw write %x val %x\n", reg, value);
113 if (codec->hw_write(codec->control_data, data, 3) == 3) {
114 unsigned int val;
115 i2c_master_send(codec->control_data, data, 1);
116 i2c_master_recv(codec->control_data, data, 2);
117 val = (data[0]<<8) | data[1];
118 if (val != value) {
119 pr_debug("uda1380: READ BACK VAL %x\n",
120 (data[0]<<8) | data[1]);
121 return -EIO;
122 }
123 if (reg >= 0x10)
124 clear_bit(reg - 0x10, &uda1380_cache_dirty);
125 return 0;
126 } else
127 return -EIO;
128 }
129
130 #define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0)
131
132 static void uda1380_flush_work(struct work_struct *work)
133 {
134 int bit, reg;
135
136 for_each_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
137 reg = 0x10 + bit;
138 pr_debug("uda1380: flush reg %x val %x:\n", reg,
139 uda1380_read_reg_cache(uda1380_codec, reg));
140 uda1380_write(uda1380_codec, reg,
141 uda1380_read_reg_cache(uda1380_codec, reg));
142 clear_bit(bit, &uda1380_cache_dirty);
143 }
144 }
145
146 /* declarations of ALSA reg_elem_REAL controls */
147 static const char *uda1380_deemp[] = {
148 "None",
149 "32kHz",
150 "44.1kHz",
151 "48kHz",
152 "96kHz",
153 };
154 static const char *uda1380_input_sel[] = {
155 "Line",
156 "Mic + Line R",
157 "Line L",
158 "Mic",
159 };
160 static const char *uda1380_output_sel[] = {
161 "DAC",
162 "Analog Mixer",
163 };
164 static const char *uda1380_spf_mode[] = {
165 "Flat",
166 "Minimum1",
167 "Minimum2",
168 "Maximum"
169 };
170 static const char *uda1380_capture_sel[] = {
171 "ADC",
172 "Digital Mixer"
173 };
174 static const char *uda1380_sel_ns[] = {
175 "3rd-order",
176 "5th-order"
177 };
178 static const char *uda1380_mix_control[] = {
179 "off",
180 "PCM only",
181 "before sound processing",
182 "after sound processing"
183 };
184 static const char *uda1380_sdet_setting[] = {
185 "3200",
186 "4800",
187 "9600",
188 "19200"
189 };
190 static const char *uda1380_os_setting[] = {
191 "single-speed",
192 "double-speed (no mixing)",
193 "quad-speed (no mixing)"
194 };
195
196 static const struct soc_enum uda1380_deemp_enum[] = {
197 SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp),
198 SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp),
199 };
200 static const struct soc_enum uda1380_input_sel_enum =
201 SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel); /* SEL_MIC, SEL_LNA */
202 static const struct soc_enum uda1380_output_sel_enum =
203 SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel); /* R02_EN_AVC */
204 static const struct soc_enum uda1380_spf_enum =
205 SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode); /* M */
206 static const struct soc_enum uda1380_capture_sel_enum =
207 SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel); /* SEL_SOURCE */
208 static const struct soc_enum uda1380_sel_ns_enum =
209 SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns); /* SEL_NS */
210 static const struct soc_enum uda1380_mix_enum =
211 SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control); /* MIX, MIX_POS */
212 static const struct soc_enum uda1380_sdet_enum =
213 SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting); /* SD_VALUE */
214 static const struct soc_enum uda1380_os_enum =
215 SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting); /* OS */
216
217 /*
218 * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
219 */
220 static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
221
222 /*
223 * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
224 * from -66 dB in 0.5 dB steps (2 dB steps, really) and
225 * from -52 dB in 0.25 dB steps
226 */
227 static const unsigned int mvol_tlv[] = {
228 TLV_DB_RANGE_HEAD(3),
229 0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
230 16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
231 44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0),
232 };
233
234 /*
235 * from -72 dB in 1.5 dB steps (6 dB steps really),
236 * from -66 dB in 0.75 dB steps (3 dB steps really),
237 * from -60 dB in 0.5 dB steps (2 dB steps really) and
238 * from -46 dB in 0.25 dB steps
239 */
240 static const unsigned int vc_tlv[] = {
241 TLV_DB_RANGE_HEAD(4),
242 0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
243 8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
244 16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
245 44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0),
246 };
247
248 /* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
249 static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
250
251 /* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
252 * off at 18 dB max) */
253 static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
254
255 /* from -63 to 24 dB in 0.5 dB steps (-128...48) */
256 static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
257
258 /* from 0 to 24 dB in 3 dB steps */
259 static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
260
261 /* from 0 to 30 dB in 2 dB steps */
262 static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
263
264 static const struct snd_kcontrol_new uda1380_snd_controls[] = {
265 SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv), /* AVCR, AVCL */
266 SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
267 SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv), /* VC2 */
268 SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv), /* VC1 */
269 SOC_ENUM("Sound Processing Filter", uda1380_spf_enum), /* M */
270 SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv), /* TRL, TRR */
271 SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv), /* BBL, BBR */
272 /**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
273 SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
274 SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
275 SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
276 SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
277 SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
278 SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
279 SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
280 SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
281 SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
282 SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
283 SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
284 /**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
285 SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
286 SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
287 SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */
288 SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0), /* SKIP_DCFIL (before decimator) */
289 SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0), /* EN_DCFIL (at output of decimator) */
290 SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), /* TODO: enum, see table 62 */
291 SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), /* AGC_LEVEL */
292 /* -5.5, -8, -11.5, -14 dBFS */
293 SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
294 };
295
296 /* Input mux */
297 static const struct snd_kcontrol_new uda1380_input_mux_control =
298 SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
299
300 /* Output mux */
301 static const struct snd_kcontrol_new uda1380_output_mux_control =
302 SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
303
304 /* Capture mux */
305 static const struct snd_kcontrol_new uda1380_capture_mux_control =
306 SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
307
308
309 static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
310 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
311 &uda1380_input_mux_control),
312 SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
313 &uda1380_output_mux_control),
314 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
315 &uda1380_capture_mux_control),
316 SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
317 SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
318 SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
319 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
320 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
321 SND_SOC_DAPM_INPUT("VINM"),
322 SND_SOC_DAPM_INPUT("VINL"),
323 SND_SOC_DAPM_INPUT("VINR"),
324 SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
325 SND_SOC_DAPM_OUTPUT("VOUTLHP"),
326 SND_SOC_DAPM_OUTPUT("VOUTRHP"),
327 SND_SOC_DAPM_OUTPUT("VOUTL"),
328 SND_SOC_DAPM_OUTPUT("VOUTR"),
329 SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
330 SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
331 };
332
333 static const struct snd_soc_dapm_route audio_map[] = {
334
335 /* output mux */
336 {"HeadPhone Driver", NULL, "Output Mux"},
337 {"VOUTR", NULL, "Output Mux"},
338 {"VOUTL", NULL, "Output Mux"},
339
340 {"Analog Mixer", NULL, "VINR"},
341 {"Analog Mixer", NULL, "VINL"},
342 {"Analog Mixer", NULL, "DAC"},
343
344 {"Output Mux", "DAC", "DAC"},
345 {"Output Mux", "Analog Mixer", "Analog Mixer"},
346
347 /* {"DAC", "Digital Mixer", "I2S" } */
348
349 /* headphone driver */
350 {"VOUTLHP", NULL, "HeadPhone Driver"},
351 {"VOUTRHP", NULL, "HeadPhone Driver"},
352
353 /* input mux */
354 {"Left ADC", NULL, "Input Mux"},
355 {"Input Mux", "Mic", "Mic LNA"},
356 {"Input Mux", "Mic + Line R", "Mic LNA"},
357 {"Input Mux", "Line L", "Left PGA"},
358 {"Input Mux", "Line", "Left PGA"},
359
360 /* right input */
361 {"Right ADC", "Mic + Line R", "Right PGA"},
362 {"Right ADC", "Line", "Right PGA"},
363
364 /* inputs */
365 {"Mic LNA", NULL, "VINM"},
366 {"Left PGA", NULL, "VINL"},
367 {"Right PGA", NULL, "VINR"},
368 };
369
370 static int uda1380_add_widgets(struct snd_soc_codec *codec)
371 {
372 snd_soc_dapm_new_controls(codec, uda1380_dapm_widgets,
373 ARRAY_SIZE(uda1380_dapm_widgets));
374
375 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
376
377 snd_soc_dapm_new_widgets(codec);
378 return 0;
379 }
380
381 static int uda1380_set_dai_fmt_both(struct snd_soc_dai *codec_dai,
382 unsigned int fmt)
383 {
384 struct snd_soc_codec *codec = codec_dai->codec;
385 int iface;
386
387 /* set up DAI based upon fmt */
388 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
389 iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
390
391 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
392 case SND_SOC_DAIFMT_I2S:
393 iface |= R01_SFORI_I2S | R01_SFORO_I2S;
394 break;
395 case SND_SOC_DAIFMT_LSB:
396 iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
397 break;
398 case SND_SOC_DAIFMT_MSB:
399 iface |= R01_SFORI_MSB | R01_SFORO_MSB;
400 }
401
402 /* DATAI is slave only, so in single-link mode, this has to be slave */
403 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
404 return -EINVAL;
405
406 uda1380_write(codec, UDA1380_IFACE, iface);
407
408 return 0;
409 }
410
411 static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
412 unsigned int fmt)
413 {
414 struct snd_soc_codec *codec = codec_dai->codec;
415 int iface;
416
417 /* set up DAI based upon fmt */
418 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
419 iface &= ~R01_SFORI_MASK;
420
421 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
422 case SND_SOC_DAIFMT_I2S:
423 iface |= R01_SFORI_I2S;
424 break;
425 case SND_SOC_DAIFMT_LSB:
426 iface |= R01_SFORI_LSB16;
427 break;
428 case SND_SOC_DAIFMT_MSB:
429 iface |= R01_SFORI_MSB;
430 }
431
432 /* DATAI is slave only, so this has to be slave */
433 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
434 return -EINVAL;
435
436 uda1380_write(codec, UDA1380_IFACE, iface);
437
438 return 0;
439 }
440
441 static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
442 unsigned int fmt)
443 {
444 struct snd_soc_codec *codec = codec_dai->codec;
445 int iface;
446
447 /* set up DAI based upon fmt */
448 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
449 iface &= ~(R01_SIM | R01_SFORO_MASK);
450
451 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
452 case SND_SOC_DAIFMT_I2S:
453 iface |= R01_SFORO_I2S;
454 break;
455 case SND_SOC_DAIFMT_LSB:
456 iface |= R01_SFORO_LSB16;
457 break;
458 case SND_SOC_DAIFMT_MSB:
459 iface |= R01_SFORO_MSB;
460 }
461
462 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
463 iface |= R01_SIM;
464
465 uda1380_write(codec, UDA1380_IFACE, iface);
466
467 return 0;
468 }
469
470 static int uda1380_trigger(struct snd_pcm_substream *substream, int cmd,
471 struct snd_soc_dai *dai)
472 {
473 struct snd_soc_pcm_runtime *rtd = substream->private_data;
474 struct snd_soc_device *socdev = rtd->socdev;
475 struct snd_soc_codec *codec = socdev->card->codec;
476 int mixer = uda1380_read_reg_cache(codec, UDA1380_MIXER);
477
478 switch (cmd) {
479 case SNDRV_PCM_TRIGGER_START:
480 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
481 uda1380_write_reg_cache(codec, UDA1380_MIXER,
482 mixer & ~R14_SILENCE);
483 schedule_work(&uda1380_work);
484 break;
485 case SNDRV_PCM_TRIGGER_STOP:
486 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
487 uda1380_write_reg_cache(codec, UDA1380_MIXER,
488 mixer | R14_SILENCE);
489 schedule_work(&uda1380_work);
490 break;
491 }
492 return 0;
493 }
494
495 static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
496 struct snd_pcm_hw_params *params,
497 struct snd_soc_dai *dai)
498 {
499 struct snd_soc_pcm_runtime *rtd = substream->private_data;
500 struct snd_soc_device *socdev = rtd->socdev;
501 struct snd_soc_codec *codec = socdev->card->codec;
502 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
503
504 /* set WSPLL power and divider if running from this clock */
505 if (clk & R00_DAC_CLK) {
506 int rate = params_rate(params);
507 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
508 clk &= ~0x3; /* clear SEL_LOOP_DIV */
509 switch (rate) {
510 case 6250 ... 12500:
511 clk |= 0x0;
512 break;
513 case 12501 ... 25000:
514 clk |= 0x1;
515 break;
516 case 25001 ... 50000:
517 clk |= 0x2;
518 break;
519 case 50001 ... 100000:
520 clk |= 0x3;
521 break;
522 }
523 uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
524 }
525
526 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
527 clk |= R00_EN_DAC | R00_EN_INT;
528 else
529 clk |= R00_EN_ADC | R00_EN_DEC;
530
531 uda1380_write(codec, UDA1380_CLK, clk);
532 return 0;
533 }
534
535 static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream,
536 struct snd_soc_dai *dai)
537 {
538 struct snd_soc_pcm_runtime *rtd = substream->private_data;
539 struct snd_soc_device *socdev = rtd->socdev;
540 struct snd_soc_codec *codec = socdev->card->codec;
541 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
542
543 /* shut down WSPLL power if running from this clock */
544 if (clk & R00_DAC_CLK) {
545 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
546 uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
547 }
548
549 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
550 clk &= ~(R00_EN_DAC | R00_EN_INT);
551 else
552 clk &= ~(R00_EN_ADC | R00_EN_DEC);
553
554 uda1380_write(codec, UDA1380_CLK, clk);
555 }
556
557 static int uda1380_set_bias_level(struct snd_soc_codec *codec,
558 enum snd_soc_bias_level level)
559 {
560 int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
561
562 switch (level) {
563 case SND_SOC_BIAS_ON:
564 case SND_SOC_BIAS_PREPARE:
565 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
566 break;
567 case SND_SOC_BIAS_STANDBY:
568 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS);
569 break;
570 case SND_SOC_BIAS_OFF:
571 uda1380_write(codec, UDA1380_PM, 0x0);
572 break;
573 }
574 codec->bias_level = level;
575 return 0;
576 }
577
578 #define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
579 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
580 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
581
582 static struct snd_soc_dai_ops uda1380_dai_ops = {
583 .hw_params = uda1380_pcm_hw_params,
584 .shutdown = uda1380_pcm_shutdown,
585 .trigger = uda1380_trigger,
586 .set_fmt = uda1380_set_dai_fmt_both,
587 };
588
589 static struct snd_soc_dai_ops uda1380_dai_ops_playback = {
590 .hw_params = uda1380_pcm_hw_params,
591 .shutdown = uda1380_pcm_shutdown,
592 .trigger = uda1380_trigger,
593 .set_fmt = uda1380_set_dai_fmt_playback,
594 };
595
596 static struct snd_soc_dai_ops uda1380_dai_ops_capture = {
597 .hw_params = uda1380_pcm_hw_params,
598 .shutdown = uda1380_pcm_shutdown,
599 .trigger = uda1380_trigger,
600 .set_fmt = uda1380_set_dai_fmt_capture,
601 };
602
603 struct snd_soc_dai uda1380_dai[] = {
604 {
605 .name = "UDA1380",
606 .playback = {
607 .stream_name = "Playback",
608 .channels_min = 1,
609 .channels_max = 2,
610 .rates = UDA1380_RATES,
611 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
612 .capture = {
613 .stream_name = "Capture",
614 .channels_min = 1,
615 .channels_max = 2,
616 .rates = UDA1380_RATES,
617 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
618 .ops = &uda1380_dai_ops,
619 },
620 { /* playback only - dual interface */
621 .name = "UDA1380",
622 .playback = {
623 .stream_name = "Playback",
624 .channels_min = 1,
625 .channels_max = 2,
626 .rates = UDA1380_RATES,
627 .formats = SNDRV_PCM_FMTBIT_S16_LE,
628 },
629 .ops = &uda1380_dai_ops_playback,
630 },
631 { /* capture only - dual interface*/
632 .name = "UDA1380",
633 .capture = {
634 .stream_name = "Capture",
635 .channels_min = 1,
636 .channels_max = 2,
637 .rates = UDA1380_RATES,
638 .formats = SNDRV_PCM_FMTBIT_S16_LE,
639 },
640 .ops = &uda1380_dai_ops_capture,
641 },
642 };
643 EXPORT_SYMBOL_GPL(uda1380_dai);
644
645 static int uda1380_suspend(struct platform_device *pdev, pm_message_t state)
646 {
647 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
648 struct snd_soc_codec *codec = socdev->card->codec;
649
650 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
651 return 0;
652 }
653
654 static int uda1380_resume(struct platform_device *pdev)
655 {
656 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
657 struct snd_soc_codec *codec = socdev->card->codec;
658 int i;
659 u8 data[2];
660 u16 *cache = codec->reg_cache;
661
662 /* Sync reg_cache with the hardware */
663 for (i = 0; i < ARRAY_SIZE(uda1380_reg); i++) {
664 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
665 data[1] = cache[i] & 0x00ff;
666 codec->hw_write(codec->control_data, data, 2);
667 }
668 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
669 uda1380_set_bias_level(codec, codec->suspend_bias_level);
670 return 0;
671 }
672
673 /*
674 * initialise the UDA1380 driver
675 * register mixer and dsp interfaces with the kernel
676 */
677 static int uda1380_init(struct snd_soc_device *socdev, int dac_clk)
678 {
679 struct snd_soc_codec *codec = socdev->card->codec;
680 int ret = 0;
681
682 codec->name = "UDA1380";
683 codec->owner = THIS_MODULE;
684 codec->read = uda1380_read_reg_cache;
685 codec->write = uda1380_write;
686 codec->set_bias_level = uda1380_set_bias_level;
687 codec->dai = uda1380_dai;
688 codec->num_dai = ARRAY_SIZE(uda1380_dai);
689 codec->reg_cache = kmemdup(uda1380_reg, sizeof(uda1380_reg),
690 GFP_KERNEL);
691 if (codec->reg_cache == NULL)
692 return -ENOMEM;
693 codec->reg_cache_size = ARRAY_SIZE(uda1380_reg);
694 codec->reg_cache_step = 1;
695 uda1380_reset(codec);
696
697 uda1380_codec = codec;
698 INIT_WORK(&uda1380_work, uda1380_flush_work);
699
700 /* register pcms */
701 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
702 if (ret < 0) {
703 pr_err("uda1380: failed to create pcms\n");
704 goto pcm_err;
705 }
706
707 /* power on device */
708 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
709 /* set clock input */
710 switch (dac_clk) {
711 case UDA1380_DAC_CLK_SYSCLK:
712 uda1380_write(codec, UDA1380_CLK, 0);
713 break;
714 case UDA1380_DAC_CLK_WSPLL:
715 uda1380_write(codec, UDA1380_CLK, R00_DAC_CLK);
716 break;
717 }
718
719 /* uda1380 init */
720 snd_soc_add_controls(codec, uda1380_snd_controls,
721 ARRAY_SIZE(uda1380_snd_controls));
722 uda1380_add_widgets(codec);
723 ret = snd_soc_init_card(socdev);
724 if (ret < 0) {
725 pr_err("uda1380: failed to register card\n");
726 goto card_err;
727 }
728
729 return ret;
730
731 card_err:
732 snd_soc_free_pcms(socdev);
733 snd_soc_dapm_free(socdev);
734 pcm_err:
735 kfree(codec->reg_cache);
736 return ret;
737 }
738
739 static struct snd_soc_device *uda1380_socdev;
740
741 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
742
743 static int uda1380_i2c_probe(struct i2c_client *i2c,
744 const struct i2c_device_id *id)
745 {
746 struct snd_soc_device *socdev = uda1380_socdev;
747 struct uda1380_setup_data *setup = socdev->codec_data;
748 struct snd_soc_codec *codec = socdev->card->codec;
749 int ret;
750
751 i2c_set_clientdata(i2c, codec);
752 codec->control_data = i2c;
753
754 ret = uda1380_init(socdev, setup->dac_clk);
755 if (ret < 0)
756 pr_err("uda1380: failed to initialise UDA1380\n");
757
758 return ret;
759 }
760
761 static int uda1380_i2c_remove(struct i2c_client *client)
762 {
763 struct snd_soc_codec *codec = i2c_get_clientdata(client);
764 kfree(codec->reg_cache);
765 return 0;
766 }
767
768 static const struct i2c_device_id uda1380_i2c_id[] = {
769 { "uda1380", 0 },
770 { }
771 };
772 MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
773
774 static struct i2c_driver uda1380_i2c_driver = {
775 .driver = {
776 .name = "UDA1380 I2C Codec",
777 .owner = THIS_MODULE,
778 },
779 .probe = uda1380_i2c_probe,
780 .remove = uda1380_i2c_remove,
781 .id_table = uda1380_i2c_id,
782 };
783
784 static int uda1380_add_i2c_device(struct platform_device *pdev,
785 const struct uda1380_setup_data *setup)
786 {
787 struct i2c_board_info info;
788 struct i2c_adapter *adapter;
789 struct i2c_client *client;
790 int ret;
791
792 ret = i2c_add_driver(&uda1380_i2c_driver);
793 if (ret != 0) {
794 dev_err(&pdev->dev, "can't add i2c driver\n");
795 return ret;
796 }
797
798 memset(&info, 0, sizeof(struct i2c_board_info));
799 info.addr = setup->i2c_address;
800 strlcpy(info.type, "uda1380", I2C_NAME_SIZE);
801
802 adapter = i2c_get_adapter(setup->i2c_bus);
803 if (!adapter) {
804 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
805 setup->i2c_bus);
806 goto err_driver;
807 }
808
809 client = i2c_new_device(adapter, &info);
810 i2c_put_adapter(adapter);
811 if (!client) {
812 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
813 (unsigned int)info.addr);
814 goto err_driver;
815 }
816
817 return 0;
818
819 err_driver:
820 i2c_del_driver(&uda1380_i2c_driver);
821 return -ENODEV;
822 }
823 #endif
824
825 static int uda1380_probe(struct platform_device *pdev)
826 {
827 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
828 struct uda1380_setup_data *setup;
829 struct snd_soc_codec *codec;
830 int ret;
831
832 setup = socdev->codec_data;
833 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
834 if (codec == NULL)
835 return -ENOMEM;
836
837 socdev->card->codec = codec;
838 mutex_init(&codec->mutex);
839 INIT_LIST_HEAD(&codec->dapm_widgets);
840 INIT_LIST_HEAD(&codec->dapm_paths);
841
842 uda1380_socdev = socdev;
843 ret = -ENODEV;
844
845 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
846 if (setup->i2c_address) {
847 codec->hw_write = (hw_write_t)i2c_master_send;
848 ret = uda1380_add_i2c_device(pdev, setup);
849 }
850 #endif
851
852 if (ret != 0)
853 kfree(codec);
854 return ret;
855 }
856
857 /* power down chip */
858 static int uda1380_remove(struct platform_device *pdev)
859 {
860 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
861 struct snd_soc_codec *codec = socdev->card->codec;
862
863 if (codec->control_data)
864 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
865
866 snd_soc_free_pcms(socdev);
867 snd_soc_dapm_free(socdev);
868 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
869 i2c_unregister_device(codec->control_data);
870 i2c_del_driver(&uda1380_i2c_driver);
871 #endif
872 kfree(codec);
873
874 return 0;
875 }
876
877 struct snd_soc_codec_device soc_codec_dev_uda1380 = {
878 .probe = uda1380_probe,
879 .remove = uda1380_remove,
880 .suspend = uda1380_suspend,
881 .resume = uda1380_resume,
882 };
883 EXPORT_SYMBOL_GPL(soc_codec_dev_uda1380);
884
885 static int __init uda1380_modinit(void)
886 {
887 return snd_soc_register_dais(uda1380_dai, ARRAY_SIZE(uda1380_dai));
888 }
889 module_init(uda1380_modinit);
890
891 static void __exit uda1380_exit(void)
892 {
893 snd_soc_unregister_dais(uda1380_dai, ARRAY_SIZE(uda1380_dai));
894 }
895 module_exit(uda1380_exit);
896
897 MODULE_AUTHOR("Giorgio Padrin");
898 MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
899 MODULE_LICENSE("GPL");
Linux with added FPC-III support