2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/clk-provider.h>
17 #include <linux/of_fdt.h>
18 #include <linux/of_platform.h>
19 #include <linux/cache.h>
20 #include <asm/sections.h>
21 #include <asm/arcregs.h>
23 #include <asm/setup.h>
26 #include <asm/unwind.h>
28 #include <asm/mach_desc.h>
31 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
33 unsigned int intr_to_DE_cnt
;
35 /* Part of U-boot ABI: see head.S */
36 int __initdata uboot_tag
;
37 char __initdata
*uboot_arg
;
39 const struct machine_desc
*machine_desc
;
41 struct task_struct
*_current_task
[NR_CPUS
]; /* For stack switching */
43 struct cpuinfo_arc cpuinfo_arc700
[NR_CPUS
];
45 static void read_decode_ccm_bcr(struct cpuinfo_arc
*cpu
)
47 if (is_isa_arcompact()) {
48 struct bcr_iccm_arcompact iccm
;
49 struct bcr_dccm_arcompact dccm
;
51 READ_BCR(ARC_REG_ICCM_BUILD
, iccm
);
53 cpu
->iccm
.sz
= 4096 << iccm
.sz
; /* 8K to 512K */
54 cpu
->iccm
.base_addr
= iccm
.base
<< 16;
57 READ_BCR(ARC_REG_DCCM_BUILD
, dccm
);
60 cpu
->dccm
.sz
= 2048 << dccm
.sz
; /* 2K to 256K */
62 base
= read_aux_reg(ARC_REG_DCCM_BASE_BUILD
);
63 cpu
->dccm
.base_addr
= base
& ~0xF;
66 struct bcr_iccm_arcv2 iccm
;
67 struct bcr_dccm_arcv2 dccm
;
70 READ_BCR(ARC_REG_ICCM_BUILD
, iccm
);
72 cpu
->iccm
.sz
= 256 << iccm
.sz00
; /* 512B to 16M */
73 if (iccm
.sz00
== 0xF && iccm
.sz01
> 0)
74 cpu
->iccm
.sz
<<= iccm
.sz01
;
76 region
= read_aux_reg(ARC_REG_AUX_ICCM
);
77 cpu
->iccm
.base_addr
= region
& 0xF0000000;
80 READ_BCR(ARC_REG_DCCM_BUILD
, dccm
);
82 cpu
->dccm
.sz
= 256 << dccm
.sz0
;
83 if (dccm
.sz0
== 0xF && dccm
.sz1
> 0)
84 cpu
->dccm
.sz
<<= dccm
.sz1
;
86 region
= read_aux_reg(ARC_REG_AUX_DCCM
);
87 cpu
->dccm
.base_addr
= region
& 0xF0000000;
92 static void read_arc_build_cfg_regs(void)
94 struct bcr_timer timer
;
95 struct bcr_generic bcr
;
96 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
99 READ_BCR(AUX_IDENTITY
, cpu
->core
);
100 READ_BCR(ARC_REG_ISA_CFG_BCR
, cpu
->isa
);
102 READ_BCR(ARC_REG_TIMERS_BCR
, timer
);
103 cpu
->extn
.timer0
= timer
.t0
;
104 cpu
->extn
.timer1
= timer
.t1
;
105 cpu
->extn
.rtc
= timer
.rtc
;
107 cpu
->vec_base
= read_aux_reg(AUX_INTR_VEC_BASE
);
109 READ_BCR(ARC_REG_MUL_BCR
, cpu
->extn_mpy
);
111 cpu
->extn
.norm
= read_aux_reg(ARC_REG_NORM_BCR
) > 1 ? 1 : 0; /* 2,3 */
112 cpu
->extn
.barrel
= read_aux_reg(ARC_REG_BARREL_BCR
) > 1 ? 1 : 0; /* 2,3 */
113 cpu
->extn
.swap
= read_aux_reg(ARC_REG_SWAP_BCR
) ? 1 : 0; /* 1,3 */
114 cpu
->extn
.crc
= read_aux_reg(ARC_REG_CRC_BCR
) ? 1 : 0;
115 cpu
->extn
.minmax
= read_aux_reg(ARC_REG_MIXMAX_BCR
) > 1 ? 1 : 0; /* 2 */
116 READ_BCR(ARC_REG_XY_MEM_BCR
, cpu
->extn_xymem
);
118 /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
119 read_decode_ccm_bcr(cpu
);
121 read_decode_mmu_bcr();
122 read_decode_cache_bcr();
124 if (is_isa_arcompact()) {
125 struct bcr_fp_arcompact sp
, dp
;
126 struct bcr_bpu_arcompact bpu
;
128 READ_BCR(ARC_REG_FP_BCR
, sp
);
129 READ_BCR(ARC_REG_DPFP_BCR
, dp
);
130 cpu
->extn
.fpu_sp
= sp
.ver
? 1 : 0;
131 cpu
->extn
.fpu_dp
= dp
.ver
? 1 : 0;
133 READ_BCR(ARC_REG_BPU_BCR
, bpu
);
134 cpu
->bpu
.ver
= bpu
.ver
;
135 cpu
->bpu
.full
= bpu
.fam
? 1 : 0;
137 cpu
->bpu
.num_cache
= 256 << (bpu
.ent
- 1);
138 cpu
->bpu
.num_pred
= 256 << (bpu
.ent
- 1);
141 struct bcr_fp_arcv2 spdp
;
142 struct bcr_bpu_arcv2 bpu
;
144 READ_BCR(ARC_REG_FP_V2_BCR
, spdp
);
145 cpu
->extn
.fpu_sp
= spdp
.sp
? 1 : 0;
146 cpu
->extn
.fpu_dp
= spdp
.dp
? 1 : 0;
148 READ_BCR(ARC_REG_BPU_BCR
, bpu
);
149 cpu
->bpu
.ver
= bpu
.ver
;
150 cpu
->bpu
.full
= bpu
.ft
;
151 cpu
->bpu
.num_cache
= 256 << bpu
.bce
;
152 cpu
->bpu
.num_pred
= 2048 << bpu
.pte
;
155 READ_BCR(ARC_REG_AP_BCR
, bcr
);
156 cpu
->extn
.ap
= bcr
.ver
? 1 : 0;
158 READ_BCR(ARC_REG_SMART_BCR
, bcr
);
159 cpu
->extn
.smart
= bcr
.ver
? 1 : 0;
161 READ_BCR(ARC_REG_RTT_BCR
, bcr
);
162 cpu
->extn
.rtt
= bcr
.ver
? 1 : 0;
164 cpu
->extn
.debug
= cpu
->extn
.ap
| cpu
->extn
.smart
| cpu
->extn
.rtt
;
167 static const struct cpuinfo_data arc_cpu_tbl
[] = {
168 #ifdef CONFIG_ISA_ARCOMPACT
169 { {0x20, "ARC 600" }, 0x2F},
170 { {0x30, "ARC 700" }, 0x33},
171 { {0x34, "ARC 700 R4.10"}, 0x34},
172 { {0x35, "ARC 700 R4.11"}, 0x35},
174 { {0x50, "ARC HS38 R2.0"}, 0x51},
175 { {0x52, "ARC HS38 R2.1"}, 0x52},
181 static char *arc_cpu_mumbojumbo(int cpu_id
, char *buf
, int len
)
183 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
184 struct bcr_identity
*core
= &cpu
->core
;
185 const struct cpuinfo_data
*tbl
;
192 if (is_isa_arcompact()) {
193 isa_nm
= "ARCompact";
194 be
= IS_ENABLED(CONFIG_CPU_BIG_ENDIAN
);
196 atomic
= cpu
->isa
.atomic1
;
197 if (!cpu
->isa
.ver
) /* ISA BCR absent, use Kconfig info */
198 atomic
= IS_ENABLED(CONFIG_ARC_HAS_LLSC
);
202 atomic
= cpu
->isa
.atomic
;
205 n
+= scnprintf(buf
+ n
, len
- n
,
206 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
207 core
->family
, core
->cpu_id
, core
->chip_id
);
209 for (tbl
= &arc_cpu_tbl
[0]; tbl
->info
.id
!= 0; tbl
++) {
210 if ((core
->family
>= tbl
->info
.id
) &&
211 (core
->family
<= tbl
->up_range
)) {
212 n
+= scnprintf(buf
+ n
, len
- n
,
213 "processor [%d]\t: %s (%s ISA) %s\n",
214 cpu_id
, tbl
->info
.str
, isa_nm
,
215 IS_AVAIL1(be
, "[Big-Endian]"));
220 if (tbl
->info
.id
== 0)
221 n
+= scnprintf(buf
+ n
, len
- n
, "UNKNOWN ARC Processor\n");
223 n
+= scnprintf(buf
+ n
, len
- n
, "CPU speed\t: %u.%02u Mhz\n",
224 (unsigned int)(arc_get_core_freq() / 1000000),
225 (unsigned int)(arc_get_core_freq() / 10000) % 100);
227 n
+= scnprintf(buf
+ n
, len
- n
, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
228 IS_AVAIL1(cpu
->extn
.timer0
, "Timer0 "),
229 IS_AVAIL1(cpu
->extn
.timer1
, "Timer1 "),
230 IS_AVAIL2(cpu
->extn
.rtc
, "Local-64-bit-Ctr ",
231 CONFIG_ARC_HAS_RTC
));
233 n
+= i
= scnprintf(buf
+ n
, len
- n
, "%s%s%s%s%s",
234 IS_AVAIL2(atomic
, "atomic ", CONFIG_ARC_HAS_LLSC
),
235 IS_AVAIL2(cpu
->isa
.ldd
, "ll64 ", CONFIG_ARC_HAS_LL64
),
236 IS_AVAIL1(cpu
->isa
.unalign
, "unalign (not used)"));
239 n
+= scnprintf(buf
+ n
, len
- n
, "\n\t\t: ");
241 if (cpu
->extn_mpy
.ver
) {
242 if (cpu
->extn_mpy
.ver
<= 0x2) { /* ARCompact */
243 n
+= scnprintf(buf
+ n
, len
- n
, "mpy ");
245 int opt
= 2; /* stock MPY/MPYH */
247 if (cpu
->extn_mpy
.dsp
) /* OPT 7-9 */
248 opt
= cpu
->extn_mpy
.dsp
+ 6;
250 n
+= scnprintf(buf
+ n
, len
- n
, "mpy[opt %d] ", opt
);
254 n
+= scnprintf(buf
+ n
, len
- n
, "%s%s%s%s%s%s%s%s\n",
255 IS_AVAIL1(cpu
->isa
.div_rem
, "div_rem "),
256 IS_AVAIL1(cpu
->extn
.norm
, "norm "),
257 IS_AVAIL1(cpu
->extn
.barrel
, "barrel-shift "),
258 IS_AVAIL1(cpu
->extn
.swap
, "swap "),
259 IS_AVAIL1(cpu
->extn
.minmax
, "minmax "),
260 IS_AVAIL1(cpu
->extn
.crc
, "crc "),
261 IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE
));
264 n
+= scnprintf(buf
+ n
, len
- n
,
265 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
266 IS_AVAIL1(cpu
->bpu
.full
, "full"),
267 IS_AVAIL1(!cpu
->bpu
.full
, "partial"),
268 cpu
->bpu
.num_cache
, cpu
->bpu
.num_pred
);
273 static char *arc_extn_mumbojumbo(int cpu_id
, char *buf
, int len
)
276 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
280 n
+= scnprintf(buf
+ n
, len
- n
,
281 "Vector Table\t: %#x\nUncached Base\t: %#lx\n",
282 cpu
->vec_base
, perip_base
);
284 if (cpu
->extn
.fpu_sp
|| cpu
->extn
.fpu_dp
)
285 n
+= scnprintf(buf
+ n
, len
- n
, "FPU\t\t: %s%s\n",
286 IS_AVAIL1(cpu
->extn
.fpu_sp
, "SP "),
287 IS_AVAIL1(cpu
->extn
.fpu_dp
, "DP "));
290 n
+= scnprintf(buf
+ n
, len
- n
, "DEBUG\t\t: %s%s%s\n",
291 IS_AVAIL1(cpu
->extn
.ap
, "ActionPoint "),
292 IS_AVAIL1(cpu
->extn
.smart
, "smaRT "),
293 IS_AVAIL1(cpu
->extn
.rtt
, "RTT "));
295 if (cpu
->dccm
.sz
|| cpu
->iccm
.sz
)
296 n
+= scnprintf(buf
+ n
, len
- n
, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
297 cpu
->dccm
.base_addr
, TO_KB(cpu
->dccm
.sz
),
298 cpu
->iccm
.base_addr
, TO_KB(cpu
->iccm
.sz
));
300 n
+= scnprintf(buf
+ n
, len
- n
,
301 "OS ABI [v3]\t: no-legacy-syscalls\n");
306 static void arc_chk_core_config(void)
308 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
311 if (!cpu
->extn
.timer0
)
312 panic("Timer0 is not present!\n");
314 if (!cpu
->extn
.timer1
)
315 panic("Timer1 is not present!\n");
317 if (IS_ENABLED(CONFIG_ARC_HAS_RTC
) && !cpu
->extn
.rtc
)
318 panic("RTC is not present\n");
320 #ifdef CONFIG_ARC_HAS_DCCM
322 * DCCM can be arbit placed in hardware.
323 * Make sure it's placement/sz matches what Linux is built with
325 if ((unsigned int)__arc_dccm_base
!= cpu
->dccm
.base_addr
)
326 panic("Linux built with incorrect DCCM Base address\n");
328 if (CONFIG_ARC_DCCM_SZ
!= cpu
->dccm
.sz
)
329 panic("Linux built with incorrect DCCM Size\n");
332 #ifdef CONFIG_ARC_HAS_ICCM
333 if (CONFIG_ARC_ICCM_SZ
!= cpu
->iccm
.sz
)
334 panic("Linux built with incorrect ICCM Size\n");
338 * FP hardware/software config sanity
339 * -If hardware contains DPFP, kernel needs to save/restore FPU state
340 * -If not, it will crash trying to save/restore the non-existant regs
342 * (only DPDP checked since SP has no arch visible regs)
344 fpu_enabled
= IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE
);
346 if (cpu
->extn
.fpu_dp
&& !fpu_enabled
)
347 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
348 else if (!cpu
->extn
.fpu_dp
&& fpu_enabled
)
349 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
353 * Initialize and setup the processor core
354 * This is called by all the CPUs thus should not do special case stuff
355 * such as only for boot CPU etc
358 void setup_processor(void)
361 int cpu_id
= smp_processor_id();
363 read_arc_build_cfg_regs();
366 printk(arc_cpu_mumbojumbo(cpu_id
, str
, sizeof(str
)));
371 printk(arc_extn_mumbojumbo(cpu_id
, str
, sizeof(str
)));
372 printk(arc_platform_smp_cpuinfo());
374 arc_chk_core_config();
377 static inline int is_kernel(unsigned long addr
)
379 if (addr
>= (unsigned long)_stext
&& addr
<= (unsigned long)_end
)
384 void __init
setup_arch(char **cmdline_p
)
386 #ifdef CONFIG_ARC_UBOOT_SUPPORT
387 /* make sure that uboot passed pointer to cmdline/dtb is valid */
388 if (uboot_tag
&& is_kernel((unsigned long)uboot_arg
))
389 panic("Invalid uboot arg\n");
391 /* See if u-boot passed an external Device Tree blob */
392 machine_desc
= setup_machine_fdt(uboot_arg
); /* uboot_tag == 2 */
396 /* No, so try the embedded one */
397 machine_desc
= setup_machine_fdt(__dtb_start
);
399 panic("Embedded DT invalid\n");
402 * If we are here, it is established that @uboot_arg didn't
403 * point to DT blob. Instead if u-boot says it is cmdline,
404 * Appent to embedded DT cmdline.
405 * setup_machine_fdt() would have populated @boot_command_line
407 if (uboot_tag
== 1) {
408 /* Ensure a whitespace between the 2 cmdlines */
409 strlcat(boot_command_line
, " ", COMMAND_LINE_SIZE
);
410 strlcat(boot_command_line
, uboot_arg
,
415 /* Save unparsed command line copy for /proc/cmdline */
416 *cmdline_p
= boot_command_line
;
418 /* To force early parsing of things like mem=xxx */
421 /* Platform/board specific: e.g. early console registration */
422 if (machine_desc
->init_early
)
423 machine_desc
->init_early();
430 /* copy flat DT out of .init and then unflatten it */
431 unflatten_and_copy_device_tree();
433 /* Can be issue if someone passes cmd line arg "ro"
434 * But that is unlikely so keeping it as it is
436 root_mountflags
&= ~MS_RDONLY
;
438 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
439 conswitchp
= &dummy_con
;
445 static int __init
customize_machine(void)
449 * Traverses flattened DeviceTree - registering platform devices
450 * (if any) complete with their resources
452 of_platform_default_populate(NULL
, NULL
, NULL
);
454 if (machine_desc
->init_machine
)
455 machine_desc
->init_machine();
459 arch_initcall(customize_machine
);
461 static int __init
init_late_machine(void)
463 if (machine_desc
->init_late
)
464 machine_desc
->init_late();
468 late_initcall(init_late_machine
);
470 * Get CPU information for use by the procfs.
473 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
474 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
476 static int show_cpuinfo(struct seq_file
*m
, void *v
)
479 int cpu_id
= ptr_to_cpu(v
);
481 if (!cpu_online(cpu_id
)) {
482 seq_printf(m
, "processor [%d]\t: Offline\n", cpu_id
);
486 str
= (char *)__get_free_page(GFP_TEMPORARY
);
490 seq_printf(m
, arc_cpu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
492 seq_printf(m
, "Bogo MIPS\t: %lu.%02lu\n",
493 loops_per_jiffy
/ (500000 / HZ
),
494 (loops_per_jiffy
/ (5000 / HZ
)) % 100);
496 seq_printf(m
, arc_mmu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
497 seq_printf(m
, arc_cache_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
498 seq_printf(m
, arc_extn_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
499 seq_printf(m
, arc_platform_smp_cpuinfo());
501 free_page((unsigned long)str
);
508 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
511 * Callback returns cpu-id to iterator for show routine, NULL to stop.
512 * However since NULL is also a valid cpu-id (0), we use a round-about
513 * way to pass it w/o having to kmalloc/free a 2 byte string.
514 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
516 return *pos
< num_possible_cpus() ? cpu_to_ptr(*pos
) : NULL
;
519 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
522 return c_start(m
, pos
);
525 static void c_stop(struct seq_file
*m
, void *v
)
529 const struct seq_operations cpuinfo_op
= {
536 static DEFINE_PER_CPU(struct cpu
, cpu_topology
);
538 static int __init
topology_init(void)
542 for_each_present_cpu(cpu
)
543 register_cpu(&per_cpu(cpu_topology
, cpu
), cpu
);
548 subsys_initcall(topology_init
);