| blob | a6f7b20df61687a6445de264a17bc7e0ec44bb96 |
1 /*
2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
22 #include <asm/page.h>
24 /*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53 STACK_SIZE = 1 << STACK_SHIFT
55 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
57 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
58 _TIF_MCCK_PENDING)
59 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
60 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
62 #define BASED(name) name-system_call(%r13)
64 #ifdef CONFIG_TRACE_IRQFLAGS
65 .macro TRACE_IRQS_ON
66 basr %r2,%r0
67 brasl %r14,trace_hardirqs_on_caller
68 .endm
70 .macro TRACE_IRQS_OFF
71 basr %r2,%r0
72 brasl %r14,trace_hardirqs_off_caller
73 .endm
75 .macro TRACE_IRQS_CHECK
76 basr %r2,%r0
77 tm SP_PSW(%r15),0x03 # irqs enabled?
78 jz 0f
79 brasl %r14,trace_hardirqs_on_caller
80 j 1f
81 0: brasl %r14,trace_hardirqs_off_caller
82 1:
83 .endm
84 #else
85 #define TRACE_IRQS_ON
86 #define TRACE_IRQS_OFF
87 #define TRACE_IRQS_CHECK
88 #endif
90 #ifdef CONFIG_LOCKDEP
91 .macro LOCKDEP_SYS_EXIT
92 tm SP_PSW+1(%r15),0x01 # returning to user ?
93 jz 0f
94 brasl %r14,lockdep_sys_exit
95 0:
96 .endm
97 #else
98 #define LOCKDEP_SYS_EXIT
99 #endif
101 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
102 lg %r10,\lc_from
103 slg %r10,\lc_to
104 alg %r10,\lc_sum
105 stg %r10,\lc_sum
106 .endm
108 /*
109 * Register usage in interrupt handlers:
110 * R9 - pointer to current task structure
111 * R13 - pointer to literal pool
112 * R14 - return register for function calls
113 * R15 - kernel stack pointer
114 */
116 .macro SAVE_ALL_BASE savearea
117 stmg %r12,%r15,\savearea
118 larl %r13,system_call
119 .endm
121 .macro SAVE_ALL_SVC psworg,savearea
122 la %r12,\psworg
123 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
124 .endm
126 .macro SAVE_ALL_SYNC psworg,savearea
127 la %r12,\psworg
128 tm \psworg+1,0x01 # test problem state bit
129 jz 2f # skip stack setup save
130 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
131 #ifdef CONFIG_CHECK_STACK
132 j 3f
133 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
134 jz stack_overflow
135 3:
136 #endif
137 2:
138 .endm
140 .macro SAVE_ALL_ASYNC psworg,savearea
141 la %r12,\psworg
142 tm \psworg+1,0x01 # test problem state bit
143 jnz 1f # from user -> load kernel stack
144 clc \psworg+8(8),BASED(.Lcritical_end)
145 jhe 0f
146 clc \psworg+8(8),BASED(.Lcritical_start)
147 jl 0f
148 brasl %r14,cleanup_critical
149 tm 1(%r12),0x01 # retest problem state after cleanup
150 jnz 1f
151 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
152 slgr %r14,%r15
153 srag %r14,%r14,STACK_SHIFT
154 jz 2f
155 1: lg %r15,__LC_ASYNC_STACK # load async stack
156 #ifdef CONFIG_CHECK_STACK
157 j 3f
158 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
159 jz stack_overflow
160 3:
161 #endif
162 2:
163 .endm
165 .macro CREATE_STACK_FRAME psworg,savearea
166 aghi %r15,-SP_SIZE # make room for registers & psw
167 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
168 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
169 icm %r12,3,__LC_SVC_ILC
170 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
171 st %r12,SP_SVCNR(%r15)
172 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
173 la %r12,0
174 stg %r12,__SF_BACKCHAIN(%r15)
175 .endm
177 .macro RESTORE_ALL psworg,sync
178 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
179 .if !\sync
180 ni \psworg+1,0xfd # clear wait state bit
181 .endif
182 lg %r14,__LC_VDSO_PER_CPU
183 lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user
184 stpt __LC_EXIT_TIMER
185 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
186 lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user
187 lpswe \psworg # back to caller
188 .endm
190 /*
191 * Scheduler resume function, called by switch_to
192 * gpr2 = (task_struct *) prev
193 * gpr3 = (task_struct *) next
194 * Returns:
195 * gpr2 = prev
196 */
197 .globl __switch_to
198 __switch_to:
199 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
200 jz __switch_to_noper # if not we're fine
201 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
202 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
203 je __switch_to_noper # we got away without bashing TLB's
204 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
205 __switch_to_noper:
206 lg %r4,__THREAD_info(%r2) # get thread_info of prev
207 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
208 jz __switch_to_no_mcck
209 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
210 lg %r4,__THREAD_info(%r3) # get thread_info of next
211 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
212 __switch_to_no_mcck:
213 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
214 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
215 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
216 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
217 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
218 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
219 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
220 stg %r3,__LC_THREAD_INFO
221 aghi %r3,STACK_SIZE
222 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
223 br %r14
225 __critical_start:
226 /*
227 * SVC interrupt handler routine. System calls are synchronous events and
228 * are executed with interrupts enabled.
229 */
231 .globl system_call
232 system_call:
233 stpt __LC_SYNC_ENTER_TIMER
234 sysc_saveall:
235 SAVE_ALL_BASE __LC_SAVE_AREA
236 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
237 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
238 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
239 sysc_vtime:
240 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
241 sysc_stime:
242 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
243 sysc_update:
244 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
245 sysc_do_svc:
246 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
247 ltgr %r7,%r7 # test for svc 0
248 jnz sysc_nr_ok
249 # svc 0: system call number in %r1
250 cl %r1,BASED(.Lnr_syscalls)
251 jnl sysc_nr_ok
252 lgfr %r7,%r1 # clear high word in r1
253 sysc_nr_ok:
254 mvc SP_ARGS(8,%r15),SP_R7(%r15)
255 sysc_do_restart:
256 sth %r7,SP_SVCNR(%r15)
257 sllg %r7,%r7,2 # svc number * 4
258 larl %r10,sys_call_table
259 #ifdef CONFIG_COMPAT
260 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
261 jno sysc_noemu
262 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
263 sysc_noemu:
264 #endif
265 tm __TI_flags+6(%r9),_TIF_SYSCALL
266 lgf %r8,0(%r7,%r10) # load address of system call routine
267 jnz sysc_tracesys
268 basr %r14,%r8 # call sys_xxxx
269 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
271 sysc_return:
272 tm __TI_flags+7(%r9),_TIF_WORK_SVC
273 jnz sysc_work # there is work to do (signals etc.)
274 sysc_restore:
275 #ifdef CONFIG_TRACE_IRQFLAGS
276 larl %r1,sysc_restore_trace_psw
277 lpswe 0(%r1)
278 sysc_restore_trace:
279 TRACE_IRQS_CHECK
280 LOCKDEP_SYS_EXIT
281 #endif
282 sysc_leave:
283 RESTORE_ALL __LC_RETURN_PSW,1
284 sysc_done:
286 #ifdef CONFIG_TRACE_IRQFLAGS
287 .section .data,"aw",@progbits
288 .align 8
289 .globl sysc_restore_trace_psw
290 sysc_restore_trace_psw:
291 .quad 0, sysc_restore_trace
292 .previous
293 #endif
295 #
296 # recheck if there is more work to do
297 #
298 sysc_work_loop:
299 tm __TI_flags+7(%r9),_TIF_WORK_SVC
300 jz sysc_restore # there is no work to do
301 #
302 # One of the work bits is on. Find out which one.
303 #
304 sysc_work:
305 tm SP_PSW+1(%r15),0x01 # returning to user ?
306 jno sysc_restore
307 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
308 jo sysc_mcck_pending
309 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
310 jo sysc_reschedule
311 tm __TI_flags+7(%r9),_TIF_SIGPENDING
312 jnz sysc_sigpending
313 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
314 jnz sysc_notify_resume
315 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
316 jo sysc_restart
317 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
318 jo sysc_singlestep
319 j sysc_restore
320 sysc_work_done:
322 #
323 # _TIF_NEED_RESCHED is set, call schedule
324 #
325 sysc_reschedule:
326 larl %r14,sysc_work_loop
327 jg schedule # return point is sysc_return
329 #
330 # _TIF_MCCK_PENDING is set, call handler
331 #
332 sysc_mcck_pending:
333 larl %r14,sysc_work_loop
334 jg s390_handle_mcck # TIF bit will be cleared by handler
336 #
337 # _TIF_SIGPENDING is set, call do_signal
338 #
339 sysc_sigpending:
340 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
341 la %r2,SP_PTREGS(%r15) # load pt_regs
342 brasl %r14,do_signal # call do_signal
343 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
344 jo sysc_restart
345 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
346 jo sysc_singlestep
347 j sysc_work_loop
349 #
350 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
351 #
352 sysc_notify_resume:
353 la %r2,SP_PTREGS(%r15) # load pt_regs
354 larl %r14,sysc_work_loop
355 jg do_notify_resume # call do_notify_resume
357 #
358 # _TIF_RESTART_SVC is set, set up registers and restart svc
359 #
360 sysc_restart:
361 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
362 lg %r7,SP_R2(%r15) # load new svc number
363 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
364 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
365 j sysc_do_restart # restart svc
367 #
368 # _TIF_SINGLE_STEP is set, call do_single_step
369 #
370 sysc_singlestep:
371 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
372 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
373 la %r2,SP_PTREGS(%r15) # address of register-save area
374 larl %r14,sysc_return # load adr. of system return
375 jg do_single_step # branch to do_sigtrap
377 #
378 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
379 # and after the system call
380 #
381 sysc_tracesys:
382 la %r2,SP_PTREGS(%r15) # load pt_regs
383 la %r3,0
384 srl %r7,2
385 stg %r7,SP_R2(%r15)
386 brasl %r14,do_syscall_trace_enter
387 lghi %r0,NR_syscalls
388 clgr %r0,%r2
389 jnh sysc_tracenogo
390 sllg %r7,%r2,2 # svc number *4
391 lgf %r8,0(%r7,%r10)
392 sysc_tracego:
393 lmg %r3,%r6,SP_R3(%r15)
394 lg %r2,SP_ORIG_R2(%r15)
395 basr %r14,%r8 # call sys_xxx
396 stg %r2,SP_R2(%r15) # store return value
397 sysc_tracenogo:
398 tm __TI_flags+6(%r9),_TIF_SYSCALL
399 jz sysc_return
400 la %r2,SP_PTREGS(%r15) # load pt_regs
401 larl %r14,sysc_return # return point is sysc_return
402 jg do_syscall_trace_exit
404 #
405 # a new process exits the kernel with ret_from_fork
406 #
407 .globl ret_from_fork
408 ret_from_fork:
409 lg %r13,__LC_SVC_NEW_PSW+8
410 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
411 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
412 jo 0f
413 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
414 0: brasl %r14,schedule_tail
415 TRACE_IRQS_ON
416 stosm 24(%r15),0x03 # reenable interrupts
417 j sysc_tracenogo
419 #
420 # kernel_execve function needs to deal with pt_regs that is not
421 # at the usual place
422 #
423 .globl kernel_execve
424 kernel_execve:
425 stmg %r12,%r15,96(%r15)
426 lgr %r14,%r15
427 aghi %r15,-SP_SIZE
428 stg %r14,__SF_BACKCHAIN(%r15)
429 la %r12,SP_PTREGS(%r15)
430 xc 0(__PT_SIZE,%r12),0(%r12)
431 lgr %r5,%r12
432 brasl %r14,do_execve
433 ltgfr %r2,%r2
434 je 0f
435 aghi %r15,SP_SIZE
436 lmg %r12,%r15,96(%r15)
437 br %r14
438 # execve succeeded.
439 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
440 lg %r15,__LC_KERNEL_STACK # load ksp
441 aghi %r15,-SP_SIZE # make room for registers & psw
442 lg %r13,__LC_SVC_NEW_PSW+8
443 lg %r9,__LC_THREAD_INFO
444 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
445 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
446 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
447 brasl %r14,execve_tail
448 j sysc_return
450 /*
451 * Program check handler routine
452 */
454 .globl pgm_check_handler
455 pgm_check_handler:
456 /*
457 * First we need to check for a special case:
458 * Single stepping an instruction that disables the PER event mask will
459 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
460 * For a single stepped SVC the program check handler gets control after
461 * the SVC new PSW has been loaded. But we want to execute the SVC first and
462 * then handle the PER event. Therefore we update the SVC old PSW to point
463 * to the pgm_check_handler and branch to the SVC handler after we checked
464 * if we have to load the kernel stack register.
465 * For every other possible cause for PER event without the PER mask set
466 * we just ignore the PER event (FIXME: is there anything we have to do
467 * for LPSW?).
468 */
469 stpt __LC_SYNC_ENTER_TIMER
470 SAVE_ALL_BASE __LC_SAVE_AREA
471 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
472 jnz pgm_per # got per exception -> special case
473 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
474 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
475 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
476 jz pgm_no_vtime
477 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
478 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
479 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
480 pgm_no_vtime:
481 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
482 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
483 TRACE_IRQS_OFF
484 lgf %r3,__LC_PGM_ILC # load program interruption code
485 lghi %r8,0x7f
486 ngr %r8,%r3
487 pgm_do_call:
488 sll %r8,3
489 larl %r1,pgm_check_table
490 lg %r1,0(%r8,%r1) # load address of handler routine
491 la %r2,SP_PTREGS(%r15) # address of register-save area
492 larl %r14,sysc_return
493 br %r1 # branch to interrupt-handler
495 #
496 # handle per exception
497 #
498 pgm_per:
499 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
500 jnz pgm_per_std # ok, normal per event from user space
501 # ok its one of the special cases, now we need to find out which one
502 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
503 je pgm_svcper
504 # no interesting special case, ignore PER event
505 lmg %r12,%r15,__LC_SAVE_AREA
506 lpswe __LC_PGM_OLD_PSW
508 #
509 # Normal per exception
510 #
511 pgm_per_std:
512 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
513 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
514 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
515 jz pgm_no_vtime2
516 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
517 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
518 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
519 pgm_no_vtime2:
520 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
521 TRACE_IRQS_OFF
522 lg %r1,__TI_task(%r9)
523 tm SP_PSW+1(%r15),0x01 # kernel per event ?
524 jz kernel_per
525 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
526 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
527 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
528 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
529 lgf %r3,__LC_PGM_ILC # load program interruption code
530 lghi %r8,0x7f
531 ngr %r8,%r3 # clear per-event-bit and ilc
532 je sysc_return
533 j pgm_do_call
535 #
536 # it was a single stepped SVC that is causing all the trouble
537 #
538 pgm_svcper:
539 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
540 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
541 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
542 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
543 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
544 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
545 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
546 lg %r1,__TI_task(%r9)
547 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
548 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
549 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
550 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
551 TRACE_IRQS_ON
552 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
553 j sysc_do_svc
555 #
556 # per was called from kernel, must be kprobes
557 #
558 kernel_per:
559 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
560 la %r2,SP_PTREGS(%r15) # address of register-save area
561 larl %r14,sysc_restore # load adr. of system ret, no work
562 jg do_single_step # branch to do_single_step
564 /*
565 * IO interrupt handler routine
566 */
567 .globl io_int_handler
568 io_int_handler:
569 stck __LC_INT_CLOCK
570 stpt __LC_ASYNC_ENTER_TIMER
571 SAVE_ALL_BASE __LC_SAVE_AREA+32
572 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
573 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
574 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
575 jz io_no_vtime
576 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
577 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
578 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
579 io_no_vtime:
580 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
581 TRACE_IRQS_OFF
582 la %r2,SP_PTREGS(%r15) # address of register-save area
583 brasl %r14,do_IRQ # call standard irq handler
584 io_return:
585 tm __TI_flags+7(%r9),_TIF_WORK_INT
586 jnz io_work # there is work to do (signals etc.)
587 io_restore:
588 #ifdef CONFIG_TRACE_IRQFLAGS
589 larl %r1,io_restore_trace_psw
590 lpswe 0(%r1)
591 io_restore_trace:
592 TRACE_IRQS_CHECK
593 LOCKDEP_SYS_EXIT
594 #endif
595 io_leave:
596 RESTORE_ALL __LC_RETURN_PSW,0
597 io_done:
599 #ifdef CONFIG_TRACE_IRQFLAGS
600 .section .data,"aw",@progbits
601 .align 8
602 .globl io_restore_trace_psw
603 io_restore_trace_psw:
604 .quad 0, io_restore_trace
605 .previous
606 #endif
608 #
609 # There is work todo, we need to check if we return to userspace, then
610 # check, if we are in SIE, if yes leave it
611 #
612 io_work:
613 tm SP_PSW+1(%r15),0x01 # returning to user ?
614 #ifndef CONFIG_PREEMPT
615 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
616 jnz io_work_user # yes -> no need to check for SIE
617 la %r1, BASED(sie_opcode) # we return to kernel here
618 lg %r2, SP_PSW+8(%r15)
619 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
620 jne io_restore # no-> return to kernel
621 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
622 aghi %r1, 4
623 stg %r1, SP_PSW+8(%r15)
624 j io_restore # return to kernel
625 #else
626 jno io_restore # no-> skip resched & signal
627 #endif
628 #else
629 jnz io_work_user # yes -> do resched & signal
630 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
631 la %r1, BASED(sie_opcode)
632 lg %r2, SP_PSW+8(%r15)
633 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
634 jne 0f # no -> leave PSW alone
635 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
636 aghi %r1, 4
637 stg %r1, SP_PSW+8(%r15)
638 0:
639 #endif
640 # check for preemptive scheduling
641 icm %r0,15,__TI_precount(%r9)
642 jnz io_restore # preemption is disabled
643 # switch to kernel stack
644 lg %r1,SP_R15(%r15)
645 aghi %r1,-SP_SIZE
646 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
647 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
648 lgr %r15,%r1
649 io_resume_loop:
650 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
651 jno io_restore
652 larl %r14,io_resume_loop
653 jg preempt_schedule_irq
654 #endif
656 io_work_user:
657 lg %r1,__LC_KERNEL_STACK
658 aghi %r1,-SP_SIZE
659 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
660 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
661 lgr %r15,%r1
662 #
663 # One of the work bits is on. Find out which one.
664 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
665 # and _TIF_MCCK_PENDING
666 #
667 io_work_loop:
668 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
669 jo io_mcck_pending
670 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
671 jo io_reschedule
672 tm __TI_flags+7(%r9),_TIF_SIGPENDING
673 jnz io_sigpending
674 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
675 jnz io_notify_resume
676 j io_restore
677 io_work_done:
679 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
680 sie_opcode:
681 .long 0xb2140000
682 #endif
684 #
685 # _TIF_MCCK_PENDING is set, call handler
686 #
687 io_mcck_pending:
688 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
689 j io_work_loop
691 #
692 # _TIF_NEED_RESCHED is set, call schedule
693 #
694 io_reschedule:
695 TRACE_IRQS_ON
696 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
697 brasl %r14,schedule # call scheduler
698 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
699 TRACE_IRQS_OFF
700 tm __TI_flags+7(%r9),_TIF_WORK_INT
701 jz io_restore # there is no work to do
702 j io_work_loop
704 #
705 # _TIF_SIGPENDING or is set, call do_signal
706 #
707 io_sigpending:
708 TRACE_IRQS_ON
709 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
710 la %r2,SP_PTREGS(%r15) # load pt_regs
711 brasl %r14,do_signal # call do_signal
712 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
713 TRACE_IRQS_OFF
714 j io_work_loop
716 #
717 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
718 #
719 io_notify_resume:
720 TRACE_IRQS_ON
721 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
722 la %r2,SP_PTREGS(%r15) # load pt_regs
723 brasl %r14,do_notify_resume # call do_notify_resume
724 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
725 TRACE_IRQS_OFF
726 j io_work_loop
728 /*
729 * External interrupt handler routine
730 */
731 .globl ext_int_handler
732 ext_int_handler:
733 stck __LC_INT_CLOCK
734 stpt __LC_ASYNC_ENTER_TIMER
735 SAVE_ALL_BASE __LC_SAVE_AREA+32
736 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
737 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
738 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
739 jz ext_no_vtime
740 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
741 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
742 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
743 ext_no_vtime:
744 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
745 TRACE_IRQS_OFF
746 la %r2,SP_PTREGS(%r15) # address of register-save area
747 llgh %r3,__LC_EXT_INT_CODE # get interruption code
748 brasl %r14,do_extint
749 j io_return
751 __critical_end:
753 /*
754 * Machine check handler routines
755 */
756 .globl mcck_int_handler
757 mcck_int_handler:
758 stck __LC_INT_CLOCK
759 la %r1,4095 # revalidate r1
760 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
761 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
762 SAVE_ALL_BASE __LC_SAVE_AREA+64
763 la %r12,__LC_MCK_OLD_PSW
764 tm __LC_MCCK_CODE,0x80 # system damage?
765 jo mcck_int_main # yes -> rest of mcck code invalid
766 la %r14,4095
767 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
768 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
769 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
770 jo 1f
771 la %r14,__LC_SYNC_ENTER_TIMER
772 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
773 jl 0f
774 la %r14,__LC_ASYNC_ENTER_TIMER
775 0: clc 0(8,%r14),__LC_EXIT_TIMER
776 jl 0f
777 la %r14,__LC_EXIT_TIMER
778 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
779 jl 0f
780 la %r14,__LC_LAST_UPDATE_TIMER
781 0: spt 0(%r14)
782 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
783 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
784 jno mcck_int_main # no -> skip cleanup critical
785 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
786 jnz mcck_int_main # from user -> load kernel stack
787 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
788 jhe mcck_int_main
789 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
790 jl mcck_int_main
791 brasl %r14,cleanup_critical
792 mcck_int_main:
793 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
794 slgr %r14,%r15
795 srag %r14,%r14,PAGE_SHIFT
796 jz 0f
797 lg %r15,__LC_PANIC_STACK # load panic stack
798 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
799 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
800 jno mcck_no_vtime # no -> no timer update
801 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
802 jz mcck_no_vtime
803 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
804 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
805 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
806 mcck_no_vtime:
807 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
808 la %r2,SP_PTREGS(%r15) # load pt_regs
809 brasl %r14,s390_do_machine_check
810 tm SP_PSW+1(%r15),0x01 # returning to user ?
811 jno mcck_return
812 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
813 aghi %r1,-SP_SIZE
814 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
815 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
816 lgr %r15,%r1
817 stosm __SF_EMPTY(%r15),0x04 # turn dat on
818 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
819 jno mcck_return
820 TRACE_IRQS_OFF
821 brasl %r14,s390_handle_mcck
822 TRACE_IRQS_ON
823 mcck_return:
824 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
825 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
826 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
827 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
828 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
829 jno 0f
830 stpt __LC_EXIT_TIMER
831 0: lpswe __LC_RETURN_MCCK_PSW # back to caller
833 /*
834 * Restart interruption handler, kick starter for additional CPUs
835 */
836 #ifdef CONFIG_SMP
837 __CPUINIT
838 .globl restart_int_handler
839 restart_int_handler:
840 basr %r1,0
841 restart_base:
842 spt restart_vtime-restart_base(%r1)
843 stck __LC_LAST_UPDATE_CLOCK
844 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
845 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
846 lg %r15,__LC_SAVE_AREA+120 # load ksp
847 lghi %r10,__LC_CREGS_SAVE_AREA
848 lctlg %c0,%c15,0(%r10) # get new ctl regs
849 lghi %r10,__LC_AREGS_SAVE_AREA
850 lam %a0,%a15,0(%r10)
851 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
852 lg %r1,__LC_THREAD_INFO
853 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
854 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
855 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
856 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
857 jg start_secondary
858 .align 8
859 restart_vtime:
860 .long 0x7fffffff,0xffffffff
861 .previous
862 #else
863 /*
864 * If we do not run with SMP enabled, let the new CPU crash ...
865 */
866 .globl restart_int_handler
867 restart_int_handler:
868 basr %r1,0
869 restart_base:
870 lpswe restart_crash-restart_base(%r1)
871 .align 8
872 restart_crash:
873 .long 0x000a0000,0x00000000,0x00000000,0x00000000
874 restart_go:
875 #endif
877 #ifdef CONFIG_CHECK_STACK
878 /*
879 * The synchronous or the asynchronous stack overflowed. We are dead.
880 * No need to properly save the registers, we are going to panic anyway.
881 * Setup a pt_regs so that show_trace can provide a good call trace.
882 */
883 stack_overflow:
884 lg %r15,__LC_PANIC_STACK # change to panic stack
885 aghi %r15,-SP_SIZE
886 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
887 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
888 la %r1,__LC_SAVE_AREA
889 chi %r12,__LC_SVC_OLD_PSW
890 je 0f
891 chi %r12,__LC_PGM_OLD_PSW
892 je 0f
893 la %r1,__LC_SAVE_AREA+32
894 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
895 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
896 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
897 la %r2,SP_PTREGS(%r15) # load pt_regs
898 jg kernel_stack_overflow
899 #endif
901 cleanup_table_system_call:
902 .quad system_call, sysc_do_svc
903 cleanup_table_sysc_return:
904 .quad sysc_return, sysc_leave
905 cleanup_table_sysc_leave:
906 .quad sysc_leave, sysc_done
907 cleanup_table_sysc_work_loop:
908 .quad sysc_work_loop, sysc_work_done
909 cleanup_table_io_return:
910 .quad io_return, io_leave
911 cleanup_table_io_leave:
912 .quad io_leave, io_done
913 cleanup_table_io_work_loop:
914 .quad io_work_loop, io_work_done
916 cleanup_critical:
917 clc 8(8,%r12),BASED(cleanup_table_system_call)
918 jl 0f
919 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
920 jl cleanup_system_call
921 0:
922 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
923 jl 0f
924 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
925 jl cleanup_sysc_return
926 0:
927 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
928 jl 0f
929 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
930 jl cleanup_sysc_leave
931 0:
932 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
933 jl 0f
934 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
935 jl cleanup_sysc_return
936 0:
937 clc 8(8,%r12),BASED(cleanup_table_io_return)
938 jl 0f
939 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
940 jl cleanup_io_return
941 0:
942 clc 8(8,%r12),BASED(cleanup_table_io_leave)
943 jl 0f
944 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
945 jl cleanup_io_leave
946 0:
947 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
948 jl 0f
949 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
950 jl cleanup_io_return
951 0:
952 br %r14
954 cleanup_system_call:
955 mvc __LC_RETURN_PSW(16),0(%r12)
956 cghi %r12,__LC_MCK_OLD_PSW
957 je 0f
958 la %r12,__LC_SAVE_AREA+32
959 j 1f
960 0: la %r12,__LC_SAVE_AREA+64
961 1:
962 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
963 jh 0f
964 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
965 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
966 jhe cleanup_vtime
967 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
968 jh 0f
969 mvc __LC_SAVE_AREA(32),0(%r12)
970 0: stg %r13,8(%r12)
971 stg %r12,__LC_SAVE_AREA+96 # argh
972 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
973 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
974 lg %r12,__LC_SAVE_AREA+96 # argh
975 stg %r15,24(%r12)
976 llgh %r7,__LC_SVC_INT_CODE
977 cleanup_vtime:
978 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
979 jhe cleanup_stime
980 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
981 cleanup_stime:
982 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
983 jh cleanup_update
984 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
985 cleanup_update:
986 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
987 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
988 la %r12,__LC_RETURN_PSW
989 br %r14
990 cleanup_system_call_insn:
991 .quad sysc_saveall
992 .quad system_call
993 .quad sysc_vtime
994 .quad sysc_stime
995 .quad sysc_update
997 cleanup_sysc_return:
998 mvc __LC_RETURN_PSW(8),0(%r12)
999 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
1000 la %r12,__LC_RETURN_PSW
1001 br %r14
1003 cleanup_sysc_leave:
1004 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
1005 je 3f
1006 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
1007 jhe 0f
1008 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1009 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1010 cghi %r12,__LC_MCK_OLD_PSW
1011 jne 1f
1012 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1013 j 2f
1014 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1015 2: lmg %r0,%r11,SP_R0(%r15)
1016 lg %r15,SP_R15(%r15)
1017 3: la %r12,__LC_RETURN_PSW
1018 br %r14
1019 cleanup_sysc_leave_insn:
1020 .quad sysc_done - 4
1021 .quad sysc_done - 16
1023 cleanup_io_return:
1024 mvc __LC_RETURN_PSW(8),0(%r12)
1025 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
1026 la %r12,__LC_RETURN_PSW
1027 br %r14
1029 cleanup_io_leave:
1030 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
1031 je 3f
1032 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
1033 jhe 0f
1034 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1035 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1036 cghi %r12,__LC_MCK_OLD_PSW
1037 jne 1f
1038 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1039 j 2f
1040 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1041 2: lmg %r0,%r11,SP_R0(%r15)
1042 lg %r15,SP_R15(%r15)
1043 3: la %r12,__LC_RETURN_PSW
1044 br %r14
1045 cleanup_io_leave_insn:
1046 .quad io_done - 4
1047 .quad io_done - 16
1049 /*
1050 * Integer constants
1051 */
1052 .align 4
1053 .Lconst:
1054 .Lnr_syscalls: .long NR_syscalls
1055 .L0x0130: .short 0x130
1056 .L0x0140: .short 0x140
1057 .L0x0150: .short 0x150
1058 .L0x0160: .short 0x160
1059 .L0x0170: .short 0x170
1060 .Lcritical_start:
1061 .quad __critical_start
1062 .Lcritical_end:
1063 .quad __critical_end
1065 .section .rodata, "a"
1066 #define SYSCALL(esa,esame,emu) .long esame
1067 .globl sys_call_table
1068 sys_call_table:
1069 #include "syscalls.S"
1070 #undef SYSCALL
1072 #ifdef CONFIG_COMPAT
1074 #define SYSCALL(esa,esame,emu) .long emu
1075 sys_call_table_emu:
1076 #include "syscalls.S"
1077 #undef SYSCALL
1078 #endif