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x86/amd-iommu: Add function to complete a tlb flush
[linux/fpc-iii.git] / drivers / isdn / hardware / mISDN / mISDNisar.c
blobde352a17673a8e7a31bcc6a86085a13f80107124
1 /*
2 * mISDNisar.c ISAR (Siemens PSB 7110) specific functions
3 *
4 * Author Karsten Keil (keil@isdn4linux.de)
5 *
6 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 */
22
23 /* define this to enable static debug messages, if you kernel supports
24 * dynamic debugging, you should use debugfs for this
25 */
26 /* #define DEBUG */
27
28 #include <linux/delay.h>
29 #include <linux/vmalloc.h>
30 #include <linux/mISDNhw.h>
31 #include "isar.h"
32
33 #define ISAR_REV "2.1"
34
35 MODULE_AUTHOR("Karsten Keil");
36 MODULE_LICENSE("GPL v2");
37 MODULE_VERSION(ISAR_REV);
38
39 #define DEBUG_HW_FIRMWARE_FIFO 0x10000
40
41 static const u8 faxmodulation_s[] = "3,24,48,72,73,74,96,97,98,121,122,145,146";
42 static const u8 faxmodulation[] = {3, 24, 48, 72, 73, 74, 96, 97, 98, 121,
43 122, 145, 146};
44 #define FAXMODCNT 13
45
46 static void isar_setup(struct isar_hw *);
47
48 static inline int
49 waitforHIA(struct isar_hw *isar, int timeout)
50 {
51 int t = timeout;
52 u8 val = isar->read_reg(isar->hw, ISAR_HIA);
53
54 while ((val & 1) && t) {
55 udelay(1);
56 t--;
57 val = isar->read_reg(isar->hw, ISAR_HIA);
58 }
59 pr_debug("%s: HIA after %dus\n", isar->name, timeout - t);
60 return timeout;
61 }
62
63 /*
64 * send msg to ISAR mailbox
65 * if msg is NULL use isar->buf
66 */
67 static int
68 send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg)
69 {
70 if (!waitforHIA(isar, 1000))
71 return 0;
72 pr_debug("send_mbox(%02x,%02x,%d)\n", his, creg, len);
73 isar->write_reg(isar->hw, ISAR_CTRL_H, creg);
74 isar->write_reg(isar->hw, ISAR_CTRL_L, len);
75 isar->write_reg(isar->hw, ISAR_WADR, 0);
76 if (!msg)
77 msg = isar->buf;
78 if (msg && len) {
79 isar->write_fifo(isar->hw, ISAR_MBOX, msg, len);
80 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
81 int l = 0;
82
83 while (l < (int)len) {
84 hex_dump_to_buffer(msg + l, len - l, 32, 1,
85 isar->log, 256, 1);
86 pr_debug("%s: %s %02x: %s\n", isar->name,
87 __func__, l, isar->log);
88 l += 32;
89 }
90 }
91 }
92 isar->write_reg(isar->hw, ISAR_HIS, his);
93 waitforHIA(isar, 1000);
94 return 1;
95 }
96
97 /*
98 * receive message from ISAR mailbox
99 * if msg is NULL use isar->buf
100 */
101 static void
102 rcv_mbox(struct isar_hw *isar, u8 *msg)
103 {
104 if (!msg)
105 msg = isar->buf;
106 isar->write_reg(isar->hw, ISAR_RADR, 0);
107 if (msg && isar->clsb) {
108 isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb);
109 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
110 int l = 0;
111
112 while (l < (int)isar->clsb) {
113 hex_dump_to_buffer(msg + l, isar->clsb - l, 32,
114 1, isar->log, 256, 1);
115 pr_debug("%s: %s %02x: %s\n", isar->name,
116 __func__, l, isar->log);
117 l += 32;
118 }
119 }
120 }
121 isar->write_reg(isar->hw, ISAR_IIA, 0);
122 }
123
124 static inline void
125 get_irq_infos(struct isar_hw *isar)
126 {
127 isar->iis = isar->read_reg(isar->hw, ISAR_IIS);
128 isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H);
129 isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L);
130 pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name,
131 isar->iis, isar->cmsb, isar->clsb);
132 }
133
134 /*
135 * poll answer message from ISAR mailbox
136 * should be used only with ISAR IRQs disabled before DSP was started
137 *
138 */
139 static int
140 poll_mbox(struct isar_hw *isar, int maxdelay)
141 {
142 int t = maxdelay;
143 u8 irq;
144
145 irq = isar->read_reg(isar->hw, ISAR_IRQBIT);
146 while (t && !(irq & ISAR_IRQSTA)) {
147 udelay(1);
148 t--;
149 }
150 if (t) {
151 get_irq_infos(isar);
152 rcv_mbox(isar, NULL);
153 }
154 pr_debug("%s: pulled %d bytes after %d us\n",
155 isar->name, isar->clsb, maxdelay - t);
156 return t;
157 }
158
159 static int
160 ISARVersion(struct isar_hw *isar)
161 {
162 int ver;
163
164 /* disable ISAR IRQ */
165 isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
166 isar->buf[0] = ISAR_MSG_HWVER;
167 isar->buf[1] = 0;
168 isar->buf[2] = 1;
169 if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL))
170 return -1;
171 if (!poll_mbox(isar, 1000))
172 return -2;
173 if (isar->iis == ISAR_IIS_VNR) {
174 if (isar->clsb == 1) {
175 ver = isar->buf[0] & 0xf;
176 return ver;
177 }
178 return -3;
179 }
180 return -4;
181 }
182
183 static int
184 load_firmware(struct isar_hw *isar, const u8 *buf, int size)
185 {
186 u32 saved_debug = isar->ch[0].bch.debug;
187 int ret, cnt;
188 u8 nom, noc;
189 u16 left, val, *sp = (u16 *)buf;
190 u8 *mp;
191 u_long flags;
192
193 struct {
194 u16 sadr;
195 u16 len;
196 u16 d_key;
197 } blk_head;
198
199 if (1 != isar->version) {
200 pr_err("%s: ISAR wrong version %d firmware download aborted\n",
201 isar->name, isar->version);
202 return -EINVAL;
203 }
204 if (!(saved_debug & DEBUG_HW_FIRMWARE_FIFO))
205 isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO;
206 pr_debug("%s: load firmware %d words (%d bytes)\n",
207 isar->name, size/2, size);
208 cnt = 0;
209 size /= 2;
210 /* disable ISAR IRQ */
211 spin_lock_irqsave(isar->hwlock, flags);
212 isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
213 spin_unlock_irqrestore(isar->hwlock, flags);
214 while (cnt < size) {
215 blk_head.sadr = le16_to_cpu(*sp++);
216 blk_head.len = le16_to_cpu(*sp++);
217 blk_head.d_key = le16_to_cpu(*sp++);
218 cnt += 3;
219 pr_debug("ISAR firmware block (%#x,%d,%#x)\n",
220 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff);
221 left = blk_head.len;
222 if (cnt + left > size) {
223 pr_info("%s: firmware error have %d need %d words\n",
224 isar->name, size, cnt + left);
225 ret = -EINVAL;
226 goto reterrflg;
227 }
228 spin_lock_irqsave(isar->hwlock, flags);
229 if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff,
230 0, NULL)) {
231 pr_info("ISAR send_mbox dkey failed\n");
232 ret = -ETIME;
233 goto reterror;
234 }
235 if (!poll_mbox(isar, 1000)) {
236 pr_warning("ISAR poll_mbox dkey failed\n");
237 ret = -ETIME;
238 goto reterror;
239 }
240 spin_unlock_irqrestore(isar->hwlock, flags);
241 if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) {
242 pr_info("ISAR wrong dkey response (%x,%x,%x)\n",
243 isar->iis, isar->cmsb, isar->clsb);
244 ret = 1;
245 goto reterrflg;
246 }
247 while (left > 0) {
248 if (left > 126)
249 noc = 126;
250 else
251 noc = left;
252 nom = (2 * noc) + 3;
253 mp = isar->buf;
254 /* the ISAR is big endian */
255 *mp++ = blk_head.sadr >> 8;
256 *mp++ = blk_head.sadr & 0xFF;
257 left -= noc;
258 cnt += noc;
259 *mp++ = noc;
260 pr_debug("%s: load %3d words at %04x\n", isar->name,
261 noc, blk_head.sadr);
262 blk_head.sadr += noc;
263 while (noc) {
264 val = le16_to_cpu(*sp++);
265 *mp++ = val >> 8;
266 *mp++ = val & 0xFF;;
267 noc--;
268 }
269 spin_lock_irqsave(isar->hwlock, flags);
270 if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) {
271 pr_info("ISAR send_mbox prog failed\n");
272 ret = -ETIME;
273 goto reterror;
274 }
275 if (!poll_mbox(isar, 1000)) {
276 pr_info("ISAR poll_mbox prog failed\n");
277 ret = -ETIME;
278 goto reterror;
279 }
280 spin_unlock_irqrestore(isar->hwlock, flags);
281 if ((isar->iis != ISAR_IIS_FIRM) ||
282 isar->cmsb || isar->clsb) {
283 pr_info("ISAR wrong prog response (%x,%x,%x)\n",
284 isar->iis, isar->cmsb, isar->clsb);
285 ret = -EIO;
286 goto reterrflg;
287 }
288 }
289 pr_debug("%s: ISAR firmware block %d words loaded\n",
290 isar->name, blk_head.len);
291 }
292 isar->ch[0].bch.debug = saved_debug;
293 /* 10ms delay */
294 cnt = 10;
295 while (cnt--)
296 mdelay(1);
297 isar->buf[0] = 0xff;
298 isar->buf[1] = 0xfe;
299 isar->bstat = 0;
300 spin_lock_irqsave(isar->hwlock, flags);
301 if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) {
302 pr_info("ISAR send_mbox start dsp failed\n");
303 ret = -ETIME;
304 goto reterror;
305 }
306 if (!poll_mbox(isar, 1000)) {
307 pr_info("ISAR poll_mbox start dsp failed\n");
308 ret = -ETIME;
309 goto reterror;
310 }
311 if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) {
312 pr_info("ISAR wrong start dsp response (%x,%x,%x)\n",
313 isar->iis, isar->cmsb, isar->clsb);
314 ret = -EIO;
315 goto reterror;
316 } else
317 pr_debug("%s: ISAR start dsp success\n", isar->name);
318
319 /* NORMAL mode entered */
320 /* Enable IRQs of ISAR */
321 isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA);
322 spin_unlock_irqrestore(isar->hwlock, flags);
323 cnt = 1000; /* max 1s */
324 while ((!isar->bstat) && cnt) {
325 mdelay(1);
326 cnt--;
327 }
328 if (!cnt) {
329 pr_info("ISAR no general status event received\n");
330 ret = -ETIME;
331 goto reterrflg;
332 } else
333 pr_debug("%s: ISAR general status event %x\n",
334 isar->name, isar->bstat);
335 /* 10ms delay */
336 cnt = 10;
337 while (cnt--)
338 mdelay(1);
339 isar->iis = 0;
340 spin_lock_irqsave(isar->hwlock, flags);
341 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
342 pr_info("ISAR send_mbox self tst failed\n");
343 ret = -ETIME;
344 goto reterror;
345 }
346 spin_unlock_irqrestore(isar->hwlock, flags);
347 cnt = 10000; /* max 100 ms */
348 while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
349 udelay(10);
350 cnt--;
351 }
352 mdelay(1);
353 if (!cnt) {
354 pr_info("ISAR no self tst response\n");
355 ret = -ETIME;
356 goto reterrflg;
357 }
358 if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1)
359 && (isar->buf[0] == 0))
360 pr_debug("%s: ISAR selftest OK\n", isar->name);
361 else {
362 pr_info("ISAR selftest not OK %x/%x/%x\n",
363 isar->cmsb, isar->clsb, isar->buf[0]);
364 ret = -EIO;
365 goto reterrflg;
366 }
367 spin_lock_irqsave(isar->hwlock, flags);
368 isar->iis = 0;
369 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
370 pr_info("ISAR RQST SVN failed\n");
371 ret = -ETIME;
372 goto reterror;
373 }
374 spin_unlock_irqrestore(isar->hwlock, flags);
375 cnt = 30000; /* max 300 ms */
376 while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
377 udelay(10);
378 cnt--;
379 }
380 mdelay(1);
381 if (!cnt) {
382 pr_info("ISAR no SVN response\n");
383 ret = -ETIME;
384 goto reterrflg;
385 } else {
386 if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) {
387 pr_notice("%s: ISAR software version %#x\n",
388 isar->name, isar->buf[0]);
389 } else {
390 pr_info("%s: ISAR wrong swver response (%x,%x)"
391 " cnt(%d)\n", isar->name, isar->cmsb,
392 isar->clsb, cnt);
393 ret = -EIO;
394 goto reterrflg;
395 }
396 }
397 spin_lock_irqsave(isar->hwlock, flags);
398 isar_setup(isar);
399 spin_unlock_irqrestore(isar->hwlock, flags);
400 ret = 0;
401 reterrflg:
402 spin_lock_irqsave(isar->hwlock, flags);
403 reterror:
404 isar->ch[0].bch.debug = saved_debug;
405 if (ret)
406 /* disable ISAR IRQ */
407 isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
408 spin_unlock_irqrestore(isar->hwlock, flags);
409 return ret;
410 }
411
412 static inline void
413 deliver_status(struct isar_ch *ch, int status)
414 {
415 pr_debug("%s: HL->LL FAXIND %x\n", ch->is->name, status);
416 _queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC);
417 }
418
419 static inline void
420 isar_rcv_frame(struct isar_ch *ch)
421 {
422 u8 *ptr;
423
424 if (!ch->is->clsb) {
425 pr_debug("%s; ISAR zero len frame\n", ch->is->name);
426 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
427 return;
428 }
429 switch (ch->bch.state) {
430 case ISDN_P_NONE:
431 pr_debug("%s: ISAR protocol 0 spurious IIS_RDATA %x/%x/%x\n",
432 ch->is->name, ch->is->iis, ch->is->cmsb, ch->is->clsb);
433 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
434 break;
435 case ISDN_P_B_RAW:
436 case ISDN_P_B_L2DTMF:
437 case ISDN_P_B_MODEM_ASYNC:
438 if (!ch->bch.rx_skb) {
439 ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen,
440 GFP_ATOMIC);
441 if (unlikely(!ch->bch.rx_skb)) {
442 pr_info("%s: B receive out of memory\n",
443 ch->is->name);
444 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
445 break;
446 }
447 }
448 rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
449 recv_Bchannel(&ch->bch, 0);
450 break;
451 case ISDN_P_B_HDLC:
452 if (!ch->bch.rx_skb) {
453 ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen,
454 GFP_ATOMIC);
455 if (unlikely(!ch->bch.rx_skb)) {
456 pr_info("%s: B receive out of memory\n",
457 ch->is->name);
458 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
459 break;
460 }
461 }
462 if ((ch->bch.rx_skb->len + ch->is->clsb) >
463 (ch->bch.maxlen + 2)) {
464 pr_debug("%s: incoming packet too large\n",
465 ch->is->name);
466 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
467 skb_trim(ch->bch.rx_skb, 0);
468 break;
469 }
470 if (ch->is->cmsb & HDLC_ERROR) {
471 pr_debug("%s: ISAR frame error %x len %d\n",
472 ch->is->name, ch->is->cmsb, ch->is->clsb);
473 #ifdef ERROR_STATISTIC
474 if (ch->is->cmsb & HDLC_ERR_RER)
475 ch->bch.err_inv++;
476 if (ch->is->cmsb & HDLC_ERR_CER)
477 ch->bch.err_crc++;
478 #endif
479 skb_trim(ch->bch.rx_skb, 0);
480 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
481 break;
482 }
483 if (ch->is->cmsb & HDLC_FSD)
484 skb_trim(ch->bch.rx_skb, 0);
485 ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
486 rcv_mbox(ch->is, ptr);
487 if (ch->is->cmsb & HDLC_FED) {
488 if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
489 pr_debug("%s: ISAR frame to short %d\n",
490 ch->is->name, ch->bch.rx_skb->len);
491 skb_trim(ch->bch.rx_skb, 0);
492 break;
493 }
494 skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
495 recv_Bchannel(&ch->bch, 0);
496 }
497 break;
498 case ISDN_P_B_T30_FAX:
499 if (ch->state != STFAX_ACTIV) {
500 pr_debug("%s: isar_rcv_frame: not ACTIV\n",
501 ch->is->name);
502 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
503 if (ch->bch.rx_skb)
504 skb_trim(ch->bch.rx_skb, 0);
505 break;
506 }
507 if (!ch->bch.rx_skb) {
508 ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen,
509 GFP_ATOMIC);
510 if (unlikely(!ch->bch.rx_skb)) {
511 pr_info("%s: B receive out of memory\n",
512 __func__);
513 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
514 break;
515 }
516 }
517 if (ch->cmd == PCTRL_CMD_FRM) {
518 rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
519 pr_debug("%s: isar_rcv_frame: %d\n",
520 ch->is->name, ch->bch.rx_skb->len);
521 if (ch->is->cmsb & SART_NMD) { /* ABORT */
522 pr_debug("%s: isar_rcv_frame: no more data\n",
523 ch->is->name);
524 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
525 send_mbox(ch->is, SET_DPS(ch->dpath) |
526 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
527 0, NULL);
528 ch->state = STFAX_ESCAPE;
529 /* set_skb_flag(skb, DF_NOMOREDATA); */
530 }
531 recv_Bchannel(&ch->bch, 0);
532 if (ch->is->cmsb & SART_NMD)
533 deliver_status(ch, HW_MOD_NOCARR);
534 break;
535 }
536 if (ch->cmd != PCTRL_CMD_FRH) {
537 pr_debug("%s: isar_rcv_frame: unknown fax mode %x\n",
538 ch->is->name, ch->cmd);
539 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
540 if (ch->bch.rx_skb)
541 skb_trim(ch->bch.rx_skb, 0);
542 break;
543 }
544 /* PCTRL_CMD_FRH */
545 if ((ch->bch.rx_skb->len + ch->is->clsb) >
546 (ch->bch.maxlen + 2)) {
547 pr_info("%s: %s incoming packet too large\n",
548 ch->is->name, __func__);
549 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
550 skb_trim(ch->bch.rx_skb, 0);
551 break;
552 } else if (ch->is->cmsb & HDLC_ERROR) {
553 pr_info("%s: ISAR frame error %x len %d\n",
554 ch->is->name, ch->is->cmsb, ch->is->clsb);
555 skb_trim(ch->bch.rx_skb, 0);
556 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
557 break;
558 }
559 if (ch->is->cmsb & HDLC_FSD)
560 skb_trim(ch->bch.rx_skb, 0);
561 ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
562 rcv_mbox(ch->is, ptr);
563 if (ch->is->cmsb & HDLC_FED) {
564 if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
565 pr_info("%s: ISAR frame to short %d\n",
566 ch->is->name, ch->bch.rx_skb->len);
567 skb_trim(ch->bch.rx_skb, 0);
568 break;
569 }
570 skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
571 recv_Bchannel(&ch->bch, 0);
572 }
573 if (ch->is->cmsb & SART_NMD) { /* ABORT */
574 pr_debug("%s: isar_rcv_frame: no more data\n",
575 ch->is->name);
576 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
577 if (ch->bch.rx_skb)
578 skb_trim(ch->bch.rx_skb, 0);
579 send_mbox(ch->is, SET_DPS(ch->dpath) |
580 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
581 ch->state = STFAX_ESCAPE;
582 deliver_status(ch, HW_MOD_NOCARR);
583 }
584 break;
585 default:
586 pr_info("isar_rcv_frame protocol (%x)error\n", ch->bch.state);
587 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
588 break;
589 }
590 }
591
592 static void
593 isar_fill_fifo(struct isar_ch *ch)
594 {
595 int count;
596 u8 msb;
597 u8 *ptr;
598
599 pr_debug("%s: ch%d tx_skb %p tx_idx %d\n",
600 ch->is->name, ch->bch.nr, ch->bch.tx_skb, ch->bch.tx_idx);
601 if (!ch->bch.tx_skb)
602 return;
603 count = ch->bch.tx_skb->len - ch->bch.tx_idx;
604 if (count <= 0)
605 return;
606 if (!(ch->is->bstat &
607 (ch->dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))
608 return;
609 if (count > ch->mml) {
610 msb = 0;
611 count = ch->mml;
612 } else {
613 msb = HDLC_FED;
614 }
615 ptr = ch->bch.tx_skb->data + ch->bch.tx_idx;
616 if (!ch->bch.tx_idx) {
617 pr_debug("%s: frame start\n", ch->is->name);
618 if ((ch->bch.state == ISDN_P_B_T30_FAX) &&
619 (ch->cmd == PCTRL_CMD_FTH)) {
620 if (count > 1) {
621 if ((ptr[0] == 0xff) && (ptr[1] == 0x13)) {
622 /* last frame */
623 test_and_set_bit(FLG_LASTDATA,
624 &ch->bch.Flags);
625 pr_debug("%s: set LASTDATA\n",
626 ch->is->name);
627 if (msb == HDLC_FED)
628 test_and_set_bit(FLG_DLEETX,
629 &ch->bch.Flags);
630 }
631 }
632 }
633 msb |= HDLC_FST;
634 }
635 ch->bch.tx_idx += count;
636 switch (ch->bch.state) {
637 case ISDN_P_NONE:
638 pr_info("%s: wrong protocol 0\n", __func__);
639 break;
640 case ISDN_P_B_RAW:
641 case ISDN_P_B_L2DTMF:
642 case ISDN_P_B_MODEM_ASYNC:
643 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
644 0, count, ptr);
645 break;
646 case ISDN_P_B_HDLC:
647 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
648 msb, count, ptr);
649 break;
650 case ISDN_P_B_T30_FAX:
651 if (ch->state != STFAX_ACTIV)
652 pr_debug("%s: not ACTIV\n", ch->is->name);
653 else if (ch->cmd == PCTRL_CMD_FTH)
654 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
655 msb, count, ptr);
656 else if (ch->cmd == PCTRL_CMD_FTM)
657 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
658 0, count, ptr);
659 else
660 pr_debug("%s: not FTH/FTM\n", ch->is->name);
661 break;
662 default:
663 pr_info("%s: protocol(%x) error\n",
664 __func__, ch->bch.state);
665 break;
666 }
667 }
668
669 static inline struct isar_ch *
670 sel_bch_isar(struct isar_hw *isar, u8 dpath)
671 {
672 struct isar_ch *base = &isar->ch[0];
673
674 if ((!dpath) || (dpath > 2))
675 return NULL;
676 if (base->dpath == dpath)
677 return base;
678 base++;
679 if (base->dpath == dpath)
680 return base;
681 return NULL;
682 }
683
684 static void
685 send_next(struct isar_ch *ch)
686 {
687 pr_debug("%s: %s ch%d tx_skb %p tx_idx %d\n",
688 ch->is->name, __func__, ch->bch.nr,
689 ch->bch.tx_skb, ch->bch.tx_idx);
690 if (ch->bch.state == ISDN_P_B_T30_FAX) {
691 if (ch->cmd == PCTRL_CMD_FTH) {
692 if (test_bit(FLG_LASTDATA, &ch->bch.Flags)) {
693 pr_debug("set NMD_DATA\n");
694 test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
695 }
696 } else if (ch->cmd == PCTRL_CMD_FTM) {
697 if (test_bit(FLG_DLEETX, &ch->bch.Flags)) {
698 test_and_set_bit(FLG_LASTDATA, &ch->bch.Flags);
699 test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
700 }
701 }
702 }
703 if (ch->bch.tx_skb) {
704 /* send confirm, on trans, free on hdlc. */
705 if (test_bit(FLG_TRANSPARENT, &ch->bch.Flags))
706 confirm_Bsend(&ch->bch);
707 dev_kfree_skb(ch->bch.tx_skb);
708 }
709 if (get_next_bframe(&ch->bch))
710 isar_fill_fifo(ch);
711 else {
712 if (test_and_clear_bit(FLG_DLEETX, &ch->bch.Flags)) {
713 if (test_and_clear_bit(FLG_LASTDATA,
714 &ch->bch.Flags)) {
715 if (test_and_clear_bit(FLG_NMD_DATA,
716 &ch->bch.Flags)) {
717 u8 zd = 0;
718 send_mbox(ch->is, SET_DPS(ch->dpath) |
719 ISAR_HIS_SDATA, 0x01, 1, &zd);
720 }
721 test_and_set_bit(FLG_LL_OK, &ch->bch.Flags);
722 } else {
723 deliver_status(ch, HW_MOD_CONNECT);
724 }
725 }
726 }
727 }
728
729 static void
730 check_send(struct isar_hw *isar, u8 rdm)
731 {
732 struct isar_ch *ch;
733
734 pr_debug("%s: rdm %x\n", isar->name, rdm);
735 if (rdm & BSTAT_RDM1) {
736 ch = sel_bch_isar(isar, 1);
737 if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
738 if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
739 ch->bch.tx_idx))
740 isar_fill_fifo(ch);
741 else
742 send_next(ch);
743 }
744 }
745 if (rdm & BSTAT_RDM2) {
746 ch = sel_bch_isar(isar, 2);
747 if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
748 if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
749 ch->bch.tx_idx))
750 isar_fill_fifo(ch);
751 else
752 send_next(ch);
753 }
754 }
755 }
756
757 const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4",
758 "300", "600", "1200", "2400", "4800", "7200",
759 "9600nt", "9600t", "12000", "14400", "WRONG"};
760 const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
761 "Bell103", "V23", "Bell202", "V17", "V29", "V27ter"};
762
763 static void
764 isar_pump_status_rsp(struct isar_ch *ch) {
765 u8 ril = ch->is->buf[0];
766 u8 rim;
767
768 if (!test_and_clear_bit(ISAR_RATE_REQ, &ch->is->Flags))
769 return;
770 if (ril > 14) {
771 pr_info("%s: wrong pstrsp ril=%d\n", ch->is->name, ril);
772 ril = 15;
773 }
774 switch (ch->is->buf[1]) {
775 case 0:
776 rim = 0;
777 break;
778 case 0x20:
779 rim = 2;
780 break;
781 case 0x40:
782 rim = 3;
783 break;
784 case 0x41:
785 rim = 4;
786 break;
787 case 0x51:
788 rim = 5;
789 break;
790 case 0x61:
791 rim = 6;
792 break;
793 case 0x71:
794 rim = 7;
795 break;
796 case 0x82:
797 rim = 8;
798 break;
799 case 0x92:
800 rim = 9;
801 break;
802 case 0xa2:
803 rim = 10;
804 break;
805 default:
806 rim = 1;
807 break;
808 }
809 sprintf(ch->conmsg, "%s %s", dmril[ril], dmrim[rim]);
810 pr_debug("%s: pump strsp %s\n", ch->is->name, ch->conmsg);
811 }
812
813 static void
814 isar_pump_statev_modem(struct isar_ch *ch, u8 devt) {
815 u8 dps = SET_DPS(ch->dpath);
816
817 switch (devt) {
818 case PSEV_10MS_TIMER:
819 pr_debug("%s: pump stev TIMER\n", ch->is->name);
820 break;
821 case PSEV_CON_ON:
822 pr_debug("%s: pump stev CONNECT\n", ch->is->name);
823 deliver_status(ch, HW_MOD_CONNECT);
824 break;
825 case PSEV_CON_OFF:
826 pr_debug("%s: pump stev NO CONNECT\n", ch->is->name);
827 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
828 deliver_status(ch, HW_MOD_NOCARR);
829 break;
830 case PSEV_V24_OFF:
831 pr_debug("%s: pump stev V24 OFF\n", ch->is->name);
832 break;
833 case PSEV_CTS_ON:
834 pr_debug("%s: pump stev CTS ON\n", ch->is->name);
835 break;
836 case PSEV_CTS_OFF:
837 pr_debug("%s pump stev CTS OFF\n", ch->is->name);
838 break;
839 case PSEV_DCD_ON:
840 pr_debug("%s: pump stev CARRIER ON\n", ch->is->name);
841 test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
842 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
843 break;
844 case PSEV_DCD_OFF:
845 pr_debug("%s: pump stev CARRIER OFF\n", ch->is->name);
846 break;
847 case PSEV_DSR_ON:
848 pr_debug("%s: pump stev DSR ON\n", ch->is->name);
849 break;
850 case PSEV_DSR_OFF:
851 pr_debug("%s: pump stev DSR_OFF\n", ch->is->name);
852 break;
853 case PSEV_REM_RET:
854 pr_debug("%s: pump stev REMOTE RETRAIN\n", ch->is->name);
855 break;
856 case PSEV_REM_REN:
857 pr_debug("%s: pump stev REMOTE RENEGOTIATE\n", ch->is->name);
858 break;
859 case PSEV_GSTN_CLR:
860 pr_debug("%s: pump stev GSTN CLEAR\n", ch->is->name);
861 break;
862 default:
863 pr_info("u%s: nknown pump stev %x\n", ch->is->name, devt);
864 break;
865 }
866 }
867
868 static void
869 isar_pump_statev_fax(struct isar_ch *ch, u8 devt) {
870 u8 dps = SET_DPS(ch->dpath);
871 u8 p1;
872
873 switch (devt) {
874 case PSEV_10MS_TIMER:
875 pr_debug("%s: pump stev TIMER\n", ch->is->name);
876 break;
877 case PSEV_RSP_READY:
878 pr_debug("%s: pump stev RSP_READY\n", ch->is->name);
879 ch->state = STFAX_READY;
880 deliver_status(ch, HW_MOD_READY);
881 #ifdef AUTOCON
882 if (test_bit(BC_FLG_ORIG, &ch->bch.Flags))
883 isar_pump_cmd(bch, HW_MOD_FRH, 3);
884 else
885 isar_pump_cmd(bch, HW_MOD_FTH, 3);
886 #endif
887 break;
888 case PSEV_LINE_TX_H:
889 if (ch->state == STFAX_LINE) {
890 pr_debug("%s: pump stev LINE_TX_H\n", ch->is->name);
891 ch->state = STFAX_CONT;
892 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
893 PCTRL_CMD_CONT, 0, NULL);
894 } else {
895 pr_debug("%s: pump stev LINE_TX_H wrong st %x\n",
896 ch->is->name, ch->state);
897 }
898 break;
899 case PSEV_LINE_RX_H:
900 if (ch->state == STFAX_LINE) {
901 pr_debug("%s: pump stev LINE_RX_H\n", ch->is->name);
902 ch->state = STFAX_CONT;
903 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
904 PCTRL_CMD_CONT, 0, NULL);
905 } else {
906 pr_debug("%s: pump stev LINE_RX_H wrong st %x\n",
907 ch->is->name, ch->state);
908 }
909 break;
910 case PSEV_LINE_TX_B:
911 if (ch->state == STFAX_LINE) {
912 pr_debug("%s: pump stev LINE_TX_B\n", ch->is->name);
913 ch->state = STFAX_CONT;
914 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
915 PCTRL_CMD_CONT, 0, NULL);
916 } else {
917 pr_debug("%s: pump stev LINE_TX_B wrong st %x\n",
918 ch->is->name, ch->state);
919 }
920 break;
921 case PSEV_LINE_RX_B:
922 if (ch->state == STFAX_LINE) {
923 pr_debug("%s: pump stev LINE_RX_B\n", ch->is->name);
924 ch->state = STFAX_CONT;
925 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
926 PCTRL_CMD_CONT, 0, NULL);
927 } else {
928 pr_debug("%s: pump stev LINE_RX_B wrong st %x\n",
929 ch->is->name, ch->state);
930 }
931 break;
932 case PSEV_RSP_CONN:
933 if (ch->state == STFAX_CONT) {
934 pr_debug("%s: pump stev RSP_CONN\n", ch->is->name);
935 ch->state = STFAX_ACTIV;
936 test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
937 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
938 if (ch->cmd == PCTRL_CMD_FTH) {
939 int delay = (ch->mod == 3) ? 1000 : 200;
940 /* 1s (200 ms) Flags before data */
941 if (test_and_set_bit(FLG_FTI_RUN,
942 &ch->bch.Flags))
943 del_timer(&ch->ftimer);
944 ch->ftimer.expires =
945 jiffies + ((delay * HZ)/1000);
946 test_and_set_bit(FLG_LL_CONN,
947 &ch->bch.Flags);
948 add_timer(&ch->ftimer);
949 } else {
950 deliver_status(ch, HW_MOD_CONNECT);
951 }
952 } else {
953 pr_debug("%s: pump stev RSP_CONN wrong st %x\n",
954 ch->is->name, ch->state);
955 }
956 break;
957 case PSEV_FLAGS_DET:
958 pr_debug("%s: pump stev FLAGS_DET\n", ch->is->name);
959 break;
960 case PSEV_RSP_DISC:
961 pr_debug("%s: pump stev RSP_DISC state(%d)\n",
962 ch->is->name, ch->state);
963 if (ch->state == STFAX_ESCAPE) {
964 p1 = 5;
965 switch (ch->newcmd) {
966 case 0:
967 ch->state = STFAX_READY;
968 break;
969 case PCTRL_CMD_FTM:
970 p1 = 2;
971 case PCTRL_CMD_FTH:
972 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
973 PCTRL_CMD_SILON, 1, &p1);
974 ch->state = STFAX_SILDET;
975 break;
976 case PCTRL_CMD_FRH:
977 case PCTRL_CMD_FRM:
978 ch->mod = ch->newmod;
979 p1 = ch->newmod;
980 ch->newmod = 0;
981 ch->cmd = ch->newcmd;
982 ch->newcmd = 0;
983 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
984 ch->cmd, 1, &p1);
985 ch->state = STFAX_LINE;
986 ch->try_mod = 3;
987 break;
988 default:
989 pr_debug("%s: RSP_DISC unknown newcmd %x\n",
990 ch->is->name, ch->newcmd);
991 break;
992 }
993 } else if (ch->state == STFAX_ACTIV) {
994 if (test_and_clear_bit(FLG_LL_OK, &ch->bch.Flags))
995 deliver_status(ch, HW_MOD_OK);
996 else if (ch->cmd == PCTRL_CMD_FRM)
997 deliver_status(ch, HW_MOD_NOCARR);
998 else
999 deliver_status(ch, HW_MOD_FCERROR);
1000 ch->state = STFAX_READY;
1001 } else if (ch->state != STFAX_SILDET) {
1002 /* ignore in STFAX_SILDET */
1003 ch->state = STFAX_READY;
1004 deliver_status(ch, HW_MOD_FCERROR);
1005 }
1006 break;
1007 case PSEV_RSP_SILDET:
1008 pr_debug("%s: pump stev RSP_SILDET\n", ch->is->name);
1009 if (ch->state == STFAX_SILDET) {
1010 ch->mod = ch->newmod;
1011 p1 = ch->newmod;
1012 ch->newmod = 0;
1013 ch->cmd = ch->newcmd;
1014 ch->newcmd = 0;
1015 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
1016 ch->cmd, 1, &p1);
1017 ch->state = STFAX_LINE;
1018 ch->try_mod = 3;
1019 }
1020 break;
1021 case PSEV_RSP_SILOFF:
1022 pr_debug("%s: pump stev RSP_SILOFF\n", ch->is->name);
1023 break;
1024 case PSEV_RSP_FCERR:
1025 if (ch->state == STFAX_LINE) {
1026 pr_debug("%s: pump stev RSP_FCERR try %d\n",
1027 ch->is->name, ch->try_mod);
1028 if (ch->try_mod--) {
1029 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
1030 ch->cmd, 1, &ch->mod);
1031 break;
1032 }
1033 }
1034 pr_debug("%s: pump stev RSP_FCERR\n", ch->is->name);
1035 ch->state = STFAX_ESCAPE;
1036 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
1037 0, NULL);
1038 deliver_status(ch, HW_MOD_FCERROR);
1039 break;
1040 default:
1041 break;
1042 }
1043 }
1044
1045 void
1046 mISDNisar_irq(struct isar_hw *isar)
1047 {
1048 struct isar_ch *ch;
1049
1050 get_irq_infos(isar);
1051 switch (isar->iis & ISAR_IIS_MSCMSD) {
1052 case ISAR_IIS_RDATA:
1053 ch = sel_bch_isar(isar, isar->iis >> 6);
1054 if (ch)
1055 isar_rcv_frame(ch);
1056 else {
1057 pr_debug("%s: ISAR spurious IIS_RDATA %x/%x/%x\n",
1058 isar->name, isar->iis, isar->cmsb,
1059 isar->clsb);
1060 isar->write_reg(isar->hw, ISAR_IIA, 0);
1061 }
1062 break;
1063 case ISAR_IIS_GSTEV:
1064 isar->write_reg(isar->hw, ISAR_IIA, 0);
1065 isar->bstat |= isar->cmsb;
1066 check_send(isar, isar->cmsb);
1067 break;
1068 case ISAR_IIS_BSTEV:
1069 #ifdef ERROR_STATISTIC
1070 ch = sel_bch_isar(isar, isar->iis >> 6);
1071 if (ch) {
1072 if (isar->cmsb == BSTEV_TBO)
1073 ch->bch.err_tx++;
1074 if (isar->cmsb == BSTEV_RBO)
1075 ch->bch.err_rdo++;
1076 }
1077 #endif
1078 pr_debug("%s: Buffer STEV dpath%d msb(%x)\n",
1079 isar->name, isar->iis>>6, isar->cmsb);
1080 isar->write_reg(isar->hw, ISAR_IIA, 0);
1081 break;
1082 case ISAR_IIS_PSTEV:
1083 ch = sel_bch_isar(isar, isar->iis >> 6);
1084 if (ch) {
1085 rcv_mbox(isar, NULL);
1086 if (ch->bch.state == ISDN_P_B_MODEM_ASYNC)
1087 isar_pump_statev_modem(ch, isar->cmsb);
1088 else if (ch->bch.state == ISDN_P_B_T30_FAX)
1089 isar_pump_statev_fax(ch, isar->cmsb);
1090 else if (ch->bch.state == ISDN_P_B_RAW) {
1091 int tt;
1092 tt = isar->cmsb | 0x30;
1093 if (tt == 0x3e)
1094 tt = '*';
1095 else if (tt == 0x3f)
1096 tt = '#';
1097 else if (tt > '9')
1098 tt += 7;
1099 tt |= DTMF_TONE_VAL;
1100 _queue_data(&ch->bch.ch, PH_CONTROL_IND,
1101 MISDN_ID_ANY, sizeof(tt), &tt,
1102 GFP_ATOMIC);
1103 } else
1104 pr_debug("%s: ISAR IIS_PSTEV pm %d sta %x\n",
1105 isar->name, ch->bch.state,
1106 isar->cmsb);
1107 } else {
1108 pr_debug("%s: ISAR spurious IIS_PSTEV %x/%x/%x\n",
1109 isar->name, isar->iis, isar->cmsb,
1110 isar->clsb);
1111 isar->write_reg(isar->hw, ISAR_IIA, 0);
1112 }
1113 break;
1114 case ISAR_IIS_PSTRSP:
1115 ch = sel_bch_isar(isar, isar->iis >> 6);
1116 if (ch) {
1117 rcv_mbox(isar, NULL);
1118 isar_pump_status_rsp(ch);
1119 } else {
1120 pr_debug("%s: ISAR spurious IIS_PSTRSP %x/%x/%x\n",
1121 isar->name, isar->iis, isar->cmsb,
1122 isar->clsb);
1123 isar->write_reg(isar->hw, ISAR_IIA, 0);
1124 }
1125 break;
1126 case ISAR_IIS_DIAG:
1127 case ISAR_IIS_BSTRSP:
1128 case ISAR_IIS_IOM2RSP:
1129 rcv_mbox(isar, NULL);
1130 break;
1131 case ISAR_IIS_INVMSG:
1132 rcv_mbox(isar, NULL);
1133 pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb);
1134 break;
1135 default:
1136 rcv_mbox(isar, NULL);
1137 pr_debug("%s: unhandled msg iis(%x) ctrl(%x/%x)\n",
1138 isar->name, isar->iis, isar->cmsb, isar->clsb);
1139 break;
1140 }
1141 }
1142 EXPORT_SYMBOL(mISDNisar_irq);
1143
1144 static void
1145 ftimer_handler(unsigned long data)
1146 {
1147 struct isar_ch *ch = (struct isar_ch *)data;
1148
1149 pr_debug("%s: ftimer flags %lx\n", ch->is->name, ch->bch.Flags);
1150 test_and_clear_bit(FLG_FTI_RUN, &ch->bch.Flags);
1151 if (test_and_clear_bit(FLG_LL_CONN, &ch->bch.Flags))
1152 deliver_status(ch, HW_MOD_CONNECT);
1153 }
1154
1155 static void
1156 setup_pump(struct isar_ch *ch) {
1157 u8 dps = SET_DPS(ch->dpath);
1158 u8 ctrl, param[6];
1159
1160 switch (ch->bch.state) {
1161 case ISDN_P_NONE:
1162 case ISDN_P_B_RAW:
1163 case ISDN_P_B_HDLC:
1164 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL);
1165 break;
1166 case ISDN_P_B_L2DTMF:
1167 if (test_bit(FLG_DTMFSEND, &ch->bch.Flags)) {
1168 param[0] = 5; /* TOA 5 db */
1169 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
1170 PMOD_DTMF_TRANS, 1, param);
1171 } else {
1172 param[0] = 40; /* REL -46 dbm */
1173 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
1174 PMOD_DTMF, 1, param);
1175 }
1176 case ISDN_P_B_MODEM_ASYNC:
1177 ctrl = PMOD_DATAMODEM;
1178 if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
1179 ctrl |= PCTRL_ORIG;
1180 param[5] = PV32P6_CTN;
1181 } else {
1182 param[5] = PV32P6_ATN;
1183 }
1184 param[0] = 6; /* 6 db */
1185 param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B |
1186 PV32P2_V22C | PV32P2_V21 | PV32P2_BEL;
1187 param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B;
1188 param[3] = PV32P4_UT144;
1189 param[4] = PV32P5_UT144;
1190 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param);
1191 break;
1192 case ISDN_P_B_T30_FAX:
1193 ctrl = PMOD_FAX;
1194 if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
1195 ctrl |= PCTRL_ORIG;
1196 param[1] = PFAXP2_CTN;
1197 } else {
1198 param[1] = PFAXP2_ATN;
1199 }
1200 param[0] = 6; /* 6 db */
1201 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param);
1202 ch->state = STFAX_NULL;
1203 ch->newcmd = 0;
1204 ch->newmod = 0;
1205 test_and_set_bit(FLG_FTI_RUN, &ch->bch.Flags);
1206 break;
1207 }
1208 udelay(1000);
1209 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1210 udelay(1000);
1211 }
1212
1213 static void
1214 setup_sart(struct isar_ch *ch) {
1215 u8 dps = SET_DPS(ch->dpath);
1216 u8 ctrl, param[2] = {0, 0};
1217
1218 switch (ch->bch.state) {
1219 case ISDN_P_NONE:
1220 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE,
1221 0, NULL);
1222 break;
1223 case ISDN_P_B_RAW:
1224 case ISDN_P_B_L2DTMF:
1225 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_BINARY,
1226 2, param);
1227 break;
1228 case ISDN_P_B_HDLC:
1229 case ISDN_P_B_T30_FAX:
1230 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_HDLC,
1231 1, param);
1232 break;
1233 case ISDN_P_B_MODEM_ASYNC:
1234 ctrl = SMODE_V14 | SCTRL_HDMC_BOTH;
1235 param[0] = S_P1_CHS_8;
1236 param[1] = S_P2_BFT_DEF;
1237 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, ctrl, 2, param);
1238 break;
1239 }
1240 udelay(1000);
1241 send_mbox(ch->is, dps | ISAR_HIS_BSTREQ, 0, 0, NULL);
1242 udelay(1000);
1243 }
1244
1245 static void
1246 setup_iom2(struct isar_ch *ch) {
1247 u8 dps = SET_DPS(ch->dpath);
1248 u8 cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD, 0, 0, 0, 0};
1249
1250 if (ch->bch.nr == 2) {
1251 msg[1] = 1;
1252 msg[3] = 1;
1253 }
1254 switch (ch->bch.state) {
1255 case ISDN_P_NONE:
1256 cmsb = 0;
1257 /* dummy slot */
1258 msg[1] = ch->dpath + 2;
1259 msg[3] = ch->dpath + 2;
1260 break;
1261 case ISDN_P_B_RAW:
1262 case ISDN_P_B_HDLC:
1263 break;
1264 case ISDN_P_B_MODEM_ASYNC:
1265 case ISDN_P_B_T30_FAX:
1266 cmsb |= IOM_CTRL_RCV;
1267 case ISDN_P_B_L2DTMF:
1268 if (test_bit(FLG_DTMFSEND, &ch->bch.Flags))
1269 cmsb |= IOM_CTRL_RCV;
1270 cmsb |= IOM_CTRL_ALAW;
1271 break;
1272 }
1273 send_mbox(ch->is, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg);
1274 udelay(1000);
1275 send_mbox(ch->is, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL);
1276 udelay(1000);
1277 }
1278
1279 static int
1280 modeisar(struct isar_ch *ch, u32 bprotocol)
1281 {
1282 /* Here we are selecting the best datapath for requested protocol */
1283 if (ch->bch.state == ISDN_P_NONE) { /* New Setup */
1284 switch (bprotocol) {
1285 case ISDN_P_NONE: /* init */
1286 if (!ch->dpath)
1287 /* no init for dpath 0 */
1288 return 0;
1289 test_and_clear_bit(FLG_HDLC, &ch->bch.Flags);
1290 test_and_clear_bit(FLG_TRANSPARENT, &ch->bch.Flags);
1291 break;
1292 case ISDN_P_B_RAW:
1293 case ISDN_P_B_HDLC:
1294 /* best is datapath 2 */
1295 if (!test_and_set_bit(ISAR_DP2_USE, &ch->is->Flags))
1296 ch->dpath = 2;
1297 else if (!test_and_set_bit(ISAR_DP1_USE,
1298 &ch->is->Flags))
1299 ch->dpath = 1;
1300 else {
1301 pr_info("modeisar both pathes in use\n");
1302 return -EBUSY;
1303 }
1304 if (bprotocol == ISDN_P_B_HDLC)
1305 test_and_set_bit(FLG_HDLC, &ch->bch.Flags);
1306 else
1307 test_and_set_bit(FLG_TRANSPARENT,
1308 &ch->bch.Flags);
1309 break;
1310 case ISDN_P_B_MODEM_ASYNC:
1311 case ISDN_P_B_T30_FAX:
1312 case ISDN_P_B_L2DTMF:
1313 /* only datapath 1 */
1314 if (!test_and_set_bit(ISAR_DP1_USE, &ch->is->Flags))
1315 ch->dpath = 1;
1316 else {
1317 pr_info("%s: ISAR modeisar analog functions"
1318 "only with DP1\n", ch->is->name);
1319 return -EBUSY;
1320 }
1321 break;
1322 default:
1323 pr_info("%s: protocol not known %x\n", ch->is->name,
1324 bprotocol);
1325 return -ENOPROTOOPT;
1326 }
1327 }
1328 pr_debug("%s: ISAR ch%d dp%d protocol %x->%x\n", ch->is->name,
1329 ch->bch.nr, ch->dpath, ch->bch.state, bprotocol);
1330 ch->bch.state = bprotocol;
1331 setup_pump(ch);
1332 setup_iom2(ch);
1333 setup_sart(ch);
1334 if (ch->bch.state == ISDN_P_NONE) {
1335 /* Clear resources */
1336 if (ch->dpath == 1)
1337 test_and_clear_bit(ISAR_DP1_USE, &ch->is->Flags);
1338 else if (ch->dpath == 2)
1339 test_and_clear_bit(ISAR_DP2_USE, &ch->is->Flags);
1340 ch->dpath = 0;
1341 ch->is->ctrl(ch->is->hw, HW_DEACT_IND, ch->bch.nr);
1342 } else
1343 ch->is->ctrl(ch->is->hw, HW_ACTIVATE_IND, ch->bch.nr);
1344 return 0;
1345 }
1346
1347 static void
1348 isar_pump_cmd(struct isar_ch *ch, u32 cmd, u8 para)
1349 {
1350 u8 dps = SET_DPS(ch->dpath);
1351 u8 ctrl = 0, nom = 0, p1 = 0;
1352
1353 pr_debug("%s: isar_pump_cmd %x/%x state(%x)\n",
1354 ch->is->name, cmd, para, ch->bch.state);
1355 switch (cmd) {
1356 case HW_MOD_FTM:
1357 if (ch->state == STFAX_READY) {
1358 p1 = para;
1359 ctrl = PCTRL_CMD_FTM;
1360 nom = 1;
1361 ch->state = STFAX_LINE;
1362 ch->cmd = ctrl;
1363 ch->mod = para;
1364 ch->newmod = 0;
1365 ch->newcmd = 0;
1366 ch->try_mod = 3;
1367 } else if ((ch->state == STFAX_ACTIV) &&
1368 (ch->cmd == PCTRL_CMD_FTM) && (ch->mod == para))
1369 deliver_status(ch, HW_MOD_CONNECT);
1370 else {
1371 ch->newmod = para;
1372 ch->newcmd = PCTRL_CMD_FTM;
1373 nom = 0;
1374 ctrl = PCTRL_CMD_ESC;
1375 ch->state = STFAX_ESCAPE;
1376 }
1377 break;
1378 case HW_MOD_FTH:
1379 if (ch->state == STFAX_READY) {
1380 p1 = para;
1381 ctrl = PCTRL_CMD_FTH;
1382 nom = 1;
1383 ch->state = STFAX_LINE;
1384 ch->cmd = ctrl;
1385 ch->mod = para;
1386 ch->newmod = 0;
1387 ch->newcmd = 0;
1388 ch->try_mod = 3;
1389 } else if ((ch->state == STFAX_ACTIV) &&
1390 (ch->cmd == PCTRL_CMD_FTH) && (ch->mod == para))
1391 deliver_status(ch, HW_MOD_CONNECT);
1392 else {
1393 ch->newmod = para;
1394 ch->newcmd = PCTRL_CMD_FTH;
1395 nom = 0;
1396 ctrl = PCTRL_CMD_ESC;
1397 ch->state = STFAX_ESCAPE;
1398 }
1399 break;
1400 case HW_MOD_FRM:
1401 if (ch->state == STFAX_READY) {
1402 p1 = para;
1403 ctrl = PCTRL_CMD_FRM;
1404 nom = 1;
1405 ch->state = STFAX_LINE;
1406 ch->cmd = ctrl;
1407 ch->mod = para;
1408 ch->newmod = 0;
1409 ch->newcmd = 0;
1410 ch->try_mod = 3;
1411 } else if ((ch->state == STFAX_ACTIV) &&
1412 (ch->cmd == PCTRL_CMD_FRM) && (ch->mod == para))
1413 deliver_status(ch, HW_MOD_CONNECT);
1414 else {
1415 ch->newmod = para;
1416 ch->newcmd = PCTRL_CMD_FRM;
1417 nom = 0;
1418 ctrl = PCTRL_CMD_ESC;
1419 ch->state = STFAX_ESCAPE;
1420 }
1421 break;
1422 case HW_MOD_FRH:
1423 if (ch->state == STFAX_READY) {
1424 p1 = para;
1425 ctrl = PCTRL_CMD_FRH;
1426 nom = 1;
1427 ch->state = STFAX_LINE;
1428 ch->cmd = ctrl;
1429 ch->mod = para;
1430 ch->newmod = 0;
1431 ch->newcmd = 0;
1432 ch->try_mod = 3;
1433 } else if ((ch->state == STFAX_ACTIV) &&
1434 (ch->cmd == PCTRL_CMD_FRH) && (ch->mod == para))
1435 deliver_status(ch, HW_MOD_CONNECT);
1436 else {
1437 ch->newmod = para;
1438 ch->newcmd = PCTRL_CMD_FRH;
1439 nom = 0;
1440 ctrl = PCTRL_CMD_ESC;
1441 ch->state = STFAX_ESCAPE;
1442 }
1443 break;
1444 case PCTRL_CMD_TDTMF:
1445 p1 = para;
1446 nom = 1;
1447 ctrl = PCTRL_CMD_TDTMF;
1448 break;
1449 }
1450 if (ctrl)
1451 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1);
1452 }
1453
1454 static void
1455 isar_setup(struct isar_hw *isar)
1456 {
1457 u8 msg;
1458 int i;
1459
1460 /* Dpath 1, 2 */
1461 msg = 61;
1462 for (i = 0; i < 2; i++) {
1463 /* Buffer Config */
1464 send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
1465 ISAR_HIS_P12CFG, 4, 1, &msg);
1466 isar->ch[i].mml = msg;
1467 isar->ch[i].bch.state = 0;
1468 isar->ch[i].dpath = i + 1;
1469 modeisar(&isar->ch[i], ISDN_P_NONE);
1470 }
1471 }
1472
1473 static int
1474 isar_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)
1475 {
1476 struct bchannel *bch = container_of(ch, struct bchannel, ch);
1477 struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
1478 int ret = -EINVAL;
1479 struct mISDNhead *hh = mISDN_HEAD_P(skb);
1480 u32 id, *val;
1481 u_long flags;
1482
1483 switch (hh->prim) {
1484 case PH_DATA_REQ:
1485 spin_lock_irqsave(ich->is->hwlock, flags);
1486 ret = bchannel_senddata(bch, skb);
1487 if (ret > 0) { /* direct TX */
1488 id = hh->id; /* skb can be freed */
1489 ret = 0;
1490 isar_fill_fifo(ich);
1491 spin_unlock_irqrestore(ich->is->hwlock, flags);
1492 if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
1493 queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
1494 } else
1495 spin_unlock_irqrestore(ich->is->hwlock, flags);
1496 return ret;
1497 case PH_ACTIVATE_REQ:
1498 spin_lock_irqsave(ich->is->hwlock, flags);
1499 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
1500 ret = modeisar(ich, ch->protocol);
1501 else
1502 ret = 0;
1503 spin_unlock_irqrestore(ich->is->hwlock, flags);
1504 if (!ret)
1505 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
1506 NULL, GFP_KERNEL);
1507 break;
1508 case PH_DEACTIVATE_REQ:
1509 spin_lock_irqsave(ich->is->hwlock, flags);
1510 mISDN_clear_bchannel(bch);
1511 modeisar(ich, ISDN_P_NONE);
1512 spin_unlock_irqrestore(ich->is->hwlock, flags);
1513 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
1514 NULL, GFP_KERNEL);
1515 ret = 0;
1516 break;
1517 case PH_CONTROL_REQ:
1518 val = (u32 *)skb->data;
1519 pr_debug("%s: PH_CONTROL | REQUEST %x/%x\n", ich->is->name,
1520 hh->id, *val);
1521 if ((hh->id == 0) && ((*val & ~DTMF_TONE_MASK) ==
1522 DTMF_TONE_VAL)) {
1523 if (bch->state == ISDN_P_B_L2DTMF) {
1524 char tt = *val & DTMF_TONE_MASK;
1525
1526 if (tt == '*')
1527 tt = 0x1e;
1528 else if (tt == '#')
1529 tt = 0x1f;
1530 else if (tt > '9')
1531 tt -= 7;
1532 tt &= 0x1f;
1533 spin_lock_irqsave(ich->is->hwlock, flags);
1534 isar_pump_cmd(ich, PCTRL_CMD_TDTMF, tt);
1535 spin_unlock_irqrestore(ich->is->hwlock, flags);
1536 } else {
1537 pr_info("%s: DTMF send wrong protocol %x\n",
1538 __func__, bch->state);
1539 return -EINVAL;
1540 }
1541 } else if ((hh->id == HW_MOD_FRM) || (hh->id == HW_MOD_FRH) ||
1542 (hh->id == HW_MOD_FTM) || (hh->id == HW_MOD_FTH)) {
1543 for (id = 0; id < FAXMODCNT; id++)
1544 if (faxmodulation[id] == *val)
1545 break;
1546 if ((FAXMODCNT > id) &&
1547 test_bit(FLG_INITIALIZED, &bch->Flags)) {
1548 pr_debug("%s: isar: new mod\n", ich->is->name);
1549 isar_pump_cmd(ich, hh->id, *val);
1550 ret = 0;
1551 } else {
1552 pr_info("%s: wrong modulation\n",
1553 ich->is->name);
1554 ret = -EINVAL;
1555 }
1556 } else if (hh->id == HW_MOD_LASTDATA)
1557 test_and_set_bit(FLG_DLEETX, &bch->Flags);
1558 else {
1559 pr_info("%s: unknown PH_CONTROL_REQ %x\n",
1560 ich->is->name, hh->id);
1561 ret = -EINVAL;
1562 }
1563 default:
1564 pr_info("%s: %s unknown prim(%x,%x)\n",
1565 ich->is->name, __func__, hh->prim, hh->id);
1566 ret = -EINVAL;
1567 }
1568 if (!ret)
1569 dev_kfree_skb(skb);
1570 return ret;
1571 }
1572
1573 static int
1574 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
1575 {
1576 int ret = 0;
1577
1578 switch (cq->op) {
1579 case MISDN_CTRL_GETOP:
1580 cq->op = 0;
1581 break;
1582 /* Nothing implemented yet */
1583 case MISDN_CTRL_FILL_EMPTY:
1584 default:
1585 pr_info("%s: unknown Op %x\n", __func__, cq->op);
1586 ret = -EINVAL;
1587 break;
1588 }
1589 return ret;
1590 }
1591
1592 static int
1593 isar_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1594 {
1595 struct bchannel *bch = container_of(ch, struct bchannel, ch);
1596 struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
1597 int ret = -EINVAL;
1598 u_long flags;
1599
1600 pr_debug("%s: %s cmd:%x %p\n", ich->is->name, __func__, cmd, arg);
1601 switch (cmd) {
1602 case CLOSE_CHANNEL:
1603 test_and_clear_bit(FLG_OPEN, &bch->Flags);
1604 if (test_bit(FLG_ACTIVE, &bch->Flags)) {
1605 spin_lock_irqsave(ich->is->hwlock, flags);
1606 mISDN_freebchannel(bch);
1607 modeisar(ich, ISDN_P_NONE);
1608 spin_unlock_irqrestore(ich->is->hwlock, flags);
1609 } else {
1610 skb_queue_purge(&bch->rqueue);
1611 bch->rcount = 0;
1612 }
1613 ch->protocol = ISDN_P_NONE;
1614 ch->peer = NULL;
1615 module_put(ich->is->owner);
1616 ret = 0;
1617 break;
1618 case CONTROL_CHANNEL:
1619 ret = channel_bctrl(bch, arg);
1620 break;
1621 default:
1622 pr_info("%s: %s unknown prim(%x)\n",
1623 ich->is->name, __func__, cmd);
1624 }
1625 return ret;
1626 }
1627
1628 static void
1629 free_isar(struct isar_hw *isar)
1630 {
1631 modeisar(&isar->ch[0], ISDN_P_NONE);
1632 modeisar(&isar->ch[1], ISDN_P_NONE);
1633 del_timer(&isar->ch[0].ftimer);
1634 del_timer(&isar->ch[1].ftimer);
1635 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
1636 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
1637 }
1638
1639 static int
1640 init_isar(struct isar_hw *isar)
1641 {
1642 int cnt = 3;
1643
1644 while (cnt--) {
1645 isar->version = ISARVersion(isar);
1646 if (isar->ch[0].bch.debug & DEBUG_HW)
1647 pr_notice("%s: Testing version %d (%d time)\n",
1648 isar->name, isar->version, 3 - cnt);
1649 if (isar->version == 1)
1650 break;
1651 isar->ctrl(isar->hw, HW_RESET_REQ, 0);
1652 }
1653 if (isar->version != 1)
1654 return -EINVAL;
1655 isar->ch[0].ftimer.function = &ftimer_handler;
1656 isar->ch[0].ftimer.data = (long)&isar->ch[0];
1657 init_timer(&isar->ch[0].ftimer);
1658 test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
1659 isar->ch[1].ftimer.function = &ftimer_handler;
1660 isar->ch[1].ftimer.data = (long)&isar->ch[1];
1661 init_timer(&isar->ch[1].ftimer);
1662 test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
1663 return 0;
1664 }
1665
1666 static int
1667 isar_open(struct isar_hw *isar, struct channel_req *rq)
1668 {
1669 struct bchannel *bch;
1670
1671 if (rq->adr.channel > 2)
1672 return -EINVAL;
1673 if (rq->protocol == ISDN_P_NONE)
1674 return -EINVAL;
1675 bch = &isar->ch[rq->adr.channel - 1].bch;
1676 if (test_and_set_bit(FLG_OPEN, &bch->Flags))
1677 return -EBUSY; /* b-channel can be only open once */
1678 test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
1679 bch->ch.protocol = rq->protocol;
1680 rq->ch = &bch->ch;
1681 return 0;
1682 }
1683
1684 u32
1685 mISDNisar_init(struct isar_hw *isar, void *hw)
1686 {
1687 u32 ret, i;
1688
1689 isar->hw = hw;
1690 for (i = 0; i < 2; i++) {
1691 isar->ch[i].bch.nr = i + 1;
1692 mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM);
1693 isar->ch[i].bch.ch.nr = i + 1;
1694 isar->ch[i].bch.ch.send = &isar_l2l1;
1695 isar->ch[i].bch.ch.ctrl = isar_bctrl;
1696 isar->ch[i].bch.hw = hw;
1697 isar->ch[i].is = isar;
1698 }
1699
1700 isar->init = &init_isar;
1701 isar->release = &free_isar;
1702 isar->firmware = &load_firmware;
1703 isar->open = &isar_open;
1704
1705 ret = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1706 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)) |
1707 (1 << (ISDN_P_B_L2DTMF & ISDN_P_B_MASK)) |
1708 (1 << (ISDN_P_B_MODEM_ASYNC & ISDN_P_B_MASK)) |
1709 (1 << (ISDN_P_B_T30_FAX & ISDN_P_B_MASK));
1710
1711 return ret;
1712 }
1713 EXPORT_SYMBOL(mISDNisar_init);
1714
1715 static int isar_mod_init(void)
1716 {
1717 pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV);
1718 return 0;
1719 }
1720
1721 static void isar_mod_cleanup(void)
1722 {
1723 pr_notice("mISDN: ISAR module unloaded\n");
1724 }
1725 module_init(isar_mod_init);
1726 module_exit(isar_mod_cleanup);
Linux with added FPC-III support