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x86/amd-iommu: Add function to complete a tlb flush
[linux/fpc-iii.git] / drivers / media / video / cx23885 / cx23885.h
blobcc7a165561ff5cdfc584fdf943e4a0f59cc00a11
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c-algo-bit.h>
25 #include <linux/kdev_t.h>
26
27 #include <media/v4l2-device.h>
28 #include <media/tuner.h>
29 #include <media/tveeprom.h>
30 #include <media/videobuf-dma-sg.h>
31 #include <media/videobuf-dvb.h>
32
33 #include "btcx-risc.h"
34 #include "cx23885-reg.h"
35 #include "media/cx2341x.h"
36
37 #include <linux/version.h>
38 #include <linux/mutex.h>
39
40 #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 2)
41
42 #define UNSET (-1U)
43
44 #define CX23885_MAXBOARDS 8
45
46 /* Max number of inputs by card */
47 #define MAX_CX23885_INPUT 8
48 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49 #define RESOURCE_OVERLAY 1
50 #define RESOURCE_VIDEO 2
51 #define RESOURCE_VBI 4
52
53 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
54
55 #define CX23885_BOARD_NOAUTO UNSET
56 #define CX23885_BOARD_UNKNOWN 0
57 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
58 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
59 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
60 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
61 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
62 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
63 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
64 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
65 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
66 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
67 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
68 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
69 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
70 #define CX23885_BOARD_TBS_6920 14
71 #define CX23885_BOARD_TEVII_S470 15
72 #define CX23885_BOARD_DVBWORLD_2005 16
73 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
74 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
75 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
76 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
77 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
78 #define CX23885_BOARD_MYGICA_X8506 22
79 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
80 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
81 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
82
83 #define GPIO_0 0x00000001
84 #define GPIO_1 0x00000002
85 #define GPIO_2 0x00000004
86 #define GPIO_3 0x00000008
87 #define GPIO_4 0x00000010
88 #define GPIO_5 0x00000020
89 #define GPIO_6 0x00000040
90 #define GPIO_7 0x00000080
91 #define GPIO_8 0x00000100
92 #define GPIO_9 0x00000200
93 #define GPIO_10 0x00000400
94 #define GPIO_11 0x00000800
95 #define GPIO_12 0x00001000
96 #define GPIO_13 0x00002000
97 #define GPIO_14 0x00004000
98 #define GPIO_15 0x00008000
99
100 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
101 #define CX23885_NORMS (\
102 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
103 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
104 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
105 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
106
107 struct cx23885_fmt {
108 char *name;
109 u32 fourcc; /* v4l2 format id */
110 int depth;
111 int flags;
112 u32 cxformat;
113 };
114
115 struct cx23885_ctrl {
116 struct v4l2_queryctrl v;
117 u32 off;
118 u32 reg;
119 u32 mask;
120 u32 shift;
121 };
122
123 struct cx23885_tvnorm {
124 char *name;
125 v4l2_std_id id;
126 u32 cxiformat;
127 u32 cxoformat;
128 };
129
130 struct cx23885_fh {
131 struct cx23885_dev *dev;
132 enum v4l2_buf_type type;
133 int radio;
134 u32 resources;
135
136 /* video overlay */
137 struct v4l2_window win;
138 struct v4l2_clip *clips;
139 unsigned int nclips;
140
141 /* video capture */
142 struct cx23885_fmt *fmt;
143 unsigned int width, height;
144
145 /* vbi capture */
146 struct videobuf_queue vidq;
147 struct videobuf_queue vbiq;
148
149 /* MPEG Encoder specifics ONLY */
150 struct videobuf_queue mpegq;
151 atomic_t v4l_reading;
152 };
153
154 enum cx23885_itype {
155 CX23885_VMUX_COMPOSITE1 = 1,
156 CX23885_VMUX_COMPOSITE2,
157 CX23885_VMUX_COMPOSITE3,
158 CX23885_VMUX_COMPOSITE4,
159 CX23885_VMUX_SVIDEO,
160 CX23885_VMUX_TELEVISION,
161 CX23885_VMUX_CABLE,
162 CX23885_VMUX_DVB,
163 CX23885_VMUX_DEBUG,
164 CX23885_RADIO,
165 };
166
167 enum cx23885_src_sel_type {
168 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
169 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
170 };
171
172 /* buffer for one video frame */
173 struct cx23885_buffer {
174 /* common v4l buffer stuff -- must be first */
175 struct videobuf_buffer vb;
176
177 /* cx23885 specific */
178 unsigned int bpl;
179 struct btcx_riscmem risc;
180 struct cx23885_fmt *fmt;
181 u32 count;
182 };
183
184 struct cx23885_input {
185 enum cx23885_itype type;
186 unsigned int vmux;
187 u32 gpio0, gpio1, gpio2, gpio3;
188 };
189
190 typedef enum {
191 CX23885_MPEG_UNDEFINED = 0,
192 CX23885_MPEG_DVB,
193 CX23885_ANALOG_VIDEO,
194 CX23885_MPEG_ENCODER,
195 } port_t;
196
197 struct cx23885_board {
198 char *name;
199 port_t porta, portb, portc;
200 unsigned int tuner_type;
201 unsigned int radio_type;
202 unsigned char tuner_addr;
203 unsigned char radio_addr;
204
205 /* Vendors can and do run the PCIe bridge at different
206 * clock rates, driven physically by crystals on the PCBs.
207 * The core has to accomodate this. This allows the user
208 * to add new boards with new frequencys. The value is
209 * expressed in Hz.
210 *
211 * The core framework will default this value based on
212 * current designs, but it can vary.
213 */
214 u32 clk_freq;
215 struct cx23885_input input[MAX_CX23885_INPUT];
216 int cimax; /* for NetUP */
217 };
218
219 struct cx23885_subid {
220 u16 subvendor;
221 u16 subdevice;
222 u32 card;
223 };
224
225 struct cx23885_i2c {
226 struct cx23885_dev *dev;
227
228 int nr;
229
230 /* i2c i/o */
231 struct i2c_adapter i2c_adap;
232 struct i2c_algo_bit_data i2c_algo;
233 struct i2c_client i2c_client;
234 u32 i2c_rc;
235
236 /* 885 registers used for raw addess */
237 u32 i2c_period;
238 u32 reg_ctrl;
239 u32 reg_stat;
240 u32 reg_addr;
241 u32 reg_rdata;
242 u32 reg_wdata;
243 };
244
245 struct cx23885_dmaqueue {
246 struct list_head active;
247 struct list_head queued;
248 struct timer_list timeout;
249 struct btcx_riscmem stopper;
250 u32 count;
251 };
252
253 struct cx23885_tsport {
254 struct cx23885_dev *dev;
255
256 int nr;
257 int sram_chno;
258
259 struct videobuf_dvb_frontends frontends;
260
261 /* dma queues */
262 struct cx23885_dmaqueue mpegq;
263 u32 ts_packet_size;
264 u32 ts_packet_count;
265
266 int width;
267 int height;
268
269 spinlock_t slock;
270
271 /* registers */
272 u32 reg_gpcnt;
273 u32 reg_gpcnt_ctl;
274 u32 reg_dma_ctl;
275 u32 reg_lngth;
276 u32 reg_hw_sop_ctrl;
277 u32 reg_gen_ctrl;
278 u32 reg_bd_pkt_status;
279 u32 reg_sop_status;
280 u32 reg_fifo_ovfl_stat;
281 u32 reg_vld_misc;
282 u32 reg_ts_clk_en;
283 u32 reg_ts_int_msk;
284 u32 reg_ts_int_stat;
285 u32 reg_src_sel;
286
287 /* Default register vals */
288 int pci_irqmask;
289 u32 dma_ctl_val;
290 u32 ts_int_msk_val;
291 u32 gen_ctrl_val;
292 u32 ts_clk_en_val;
293 u32 src_sel_val;
294 u32 vld_misc_val;
295 u32 hw_sop_ctrl_val;
296
297 /* Allow a single tsport to have multiple frontends */
298 u32 num_frontends;
299 void *port_priv;
300
301 /* FIXME: temporary hack */
302 int (*set_frontend_save) (struct dvb_frontend *,
303 struct dvb_frontend_parameters *);
304 };
305
306 struct cx23885_dev {
307 struct list_head devlist;
308 atomic_t refcount;
309 struct v4l2_device v4l2_dev;
310
311 /* pci stuff */
312 struct pci_dev *pci;
313 unsigned char pci_rev, pci_lat;
314 int pci_bus, pci_slot;
315 u32 __iomem *lmmio;
316 u8 __iomem *bmmio;
317 int pci_irqmask;
318 int hwrevision;
319
320 /* This valud is board specific and is used to configure the
321 * AV core so we see nice clean and stable video and audio. */
322 u32 clk_freq;
323
324 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
325 struct cx23885_i2c i2c_bus[3];
326
327 int nr;
328 struct mutex lock;
329 struct mutex gpio_lock;
330
331 /* board details */
332 unsigned int board;
333 char name[32];
334
335 struct cx23885_tsport ts1, ts2;
336
337 /* sram configuration */
338 struct sram_channel *sram_channels;
339
340 enum {
341 CX23885_BRIDGE_UNDEFINED = 0,
342 CX23885_BRIDGE_885 = 885,
343 CX23885_BRIDGE_887 = 887,
344 CX23885_BRIDGE_888 = 888,
345 } bridge;
346
347 /* Analog video */
348 u32 resources;
349 unsigned int input;
350 u32 tvaudio;
351 v4l2_std_id tvnorm;
352 unsigned int tuner_type;
353 unsigned char tuner_addr;
354 unsigned int radio_type;
355 unsigned char radio_addr;
356 unsigned int has_radio;
357 struct v4l2_subdev *sd_cx25840;
358
359 /* V4l */
360 u32 freq;
361 struct video_device *video_dev;
362 struct video_device *vbi_dev;
363 struct video_device *radio_dev;
364
365 struct cx23885_dmaqueue vidq;
366 struct cx23885_dmaqueue vbiq;
367 spinlock_t slock;
368
369 /* MPEG Encoder ONLY settings */
370 u32 cx23417_mailbox;
371 struct cx2341x_mpeg_params mpeg_params;
372 struct video_device *v4l_device;
373 atomic_t v4l_reader_count;
374 struct cx23885_tvnorm encodernorm;
375
376 };
377
378 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
379 {
380 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
381 }
382
383 #define call_all(dev, o, f, args...) \
384 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
385
386 extern struct list_head cx23885_devlist;
387
388 #define SRAM_CH01 0 /* Video A */
389 #define SRAM_CH02 1 /* VBI A */
390 #define SRAM_CH03 2 /* Video B */
391 #define SRAM_CH04 3 /* Transport via B */
392 #define SRAM_CH05 4 /* VBI B */
393 #define SRAM_CH06 5 /* Video C */
394 #define SRAM_CH07 6 /* Transport via C */
395 #define SRAM_CH08 7 /* Audio Internal A */
396 #define SRAM_CH09 8 /* Audio Internal B */
397 #define SRAM_CH10 9 /* Audio External */
398 #define SRAM_CH11 10 /* COMB_3D_N */
399 #define SRAM_CH12 11 /* Comb 3D N1 */
400 #define SRAM_CH13 12 /* Comb 3D N2 */
401 #define SRAM_CH14 13 /* MOE Vid */
402 #define SRAM_CH15 14 /* MOE RSLT */
403
404 struct sram_channel {
405 char *name;
406 u32 cmds_start;
407 u32 ctrl_start;
408 u32 cdt;
409 u32 fifo_start;
410 u32 fifo_size;
411 u32 ptr1_reg;
412 u32 ptr2_reg;
413 u32 cnt1_reg;
414 u32 cnt2_reg;
415 u32 jumponly;
416 };
417
418 /* ----------------------------------------------------------- */
419
420 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
421 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
422
423 #define cx_andor(reg, mask, value) \
424 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
425 ((value) & (mask)), dev->lmmio+((reg)>>2))
426
427 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
428 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
429
430 /* ----------------------------------------------------------- */
431 /* cx23885-core.c */
432
433 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
434 struct sram_channel *ch,
435 unsigned int bpl, u32 risc);
436
437 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
438 struct sram_channel *ch);
439
440 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
441 u32 reg, u32 mask, u32 value);
442
443 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
444 struct scatterlist *sglist,
445 unsigned int top_offset, unsigned int bottom_offset,
446 unsigned int bpl, unsigned int padding, unsigned int lines);
447
448 void cx23885_cancel_buffers(struct cx23885_tsport *port);
449
450 extern int cx23885_restart_queue(struct cx23885_tsport *port,
451 struct cx23885_dmaqueue *q);
452
453 extern void cx23885_wakeup(struct cx23885_tsport *port,
454 struct cx23885_dmaqueue *q, u32 count);
455
456 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
457 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
458 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
459 int asoutput);
460
461
462 /* ----------------------------------------------------------- */
463 /* cx23885-cards.c */
464 extern struct cx23885_board cx23885_boards[];
465 extern const unsigned int cx23885_bcount;
466
467 extern struct cx23885_subid cx23885_subids[];
468 extern const unsigned int cx23885_idcount;
469
470 extern int cx23885_tuner_callback(void *priv, int component,
471 int command, int arg);
472 extern void cx23885_card_list(struct cx23885_dev *dev);
473 extern int cx23885_ir_init(struct cx23885_dev *dev);
474 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
475 extern void cx23885_card_setup(struct cx23885_dev *dev);
476 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
477
478 extern int cx23885_dvb_register(struct cx23885_tsport *port);
479 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
480
481 extern int cx23885_buf_prepare(struct videobuf_queue *q,
482 struct cx23885_tsport *port,
483 struct cx23885_buffer *buf,
484 enum v4l2_field field);
485 extern void cx23885_buf_queue(struct cx23885_tsport *port,
486 struct cx23885_buffer *buf);
487 extern void cx23885_free_buffer(struct videobuf_queue *q,
488 struct cx23885_buffer *buf);
489
490 /* ----------------------------------------------------------- */
491 /* cx23885-video.c */
492 /* Video */
493 extern int cx23885_video_register(struct cx23885_dev *dev);
494 extern void cx23885_video_unregister(struct cx23885_dev *dev);
495 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
496
497 /* ----------------------------------------------------------- */
498 /* cx23885-vbi.c */
499 extern int cx23885_vbi_fmt(struct file *file, void *priv,
500 struct v4l2_format *f);
501 extern void cx23885_vbi_timeout(unsigned long data);
502 extern struct videobuf_queue_ops cx23885_vbi_qops;
503
504 /* cx23885-i2c.c */
505 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
506 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
507 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
508
509 /* ----------------------------------------------------------- */
510 /* cx23885-417.c */
511 extern int cx23885_417_register(struct cx23885_dev *dev);
512 extern void cx23885_417_unregister(struct cx23885_dev *dev);
513 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
514 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
515 extern void cx23885_mc417_init(struct cx23885_dev *dev);
516 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
517 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
518 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
519 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
520 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
521
522
523 /* ----------------------------------------------------------- */
524 /* tv norms */
525
526 static inline unsigned int norm_maxw(v4l2_std_id norm)
527 {
528 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
529 }
530
531 static inline unsigned int norm_maxh(v4l2_std_id norm)
532 {
533 return (norm & V4L2_STD_625_50) ? 576 : 480;
534 }
535
536 static inline unsigned int norm_swidth(v4l2_std_id norm)
537 {
538 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
539 }
Linux with added FPC-III support