drivers/net/mlx4/mlx4.h

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007 Cisco Systems.  All rights reserved.
   5  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   6  * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
   7  *
   8  * This software is available to you under a choice of one of two
   9  * licenses.  You may choose to be licensed under the terms of the GNU
  10  * General Public License (GPL) Version 2, available from the file
  11  * COPYING in the main directory of this source tree, or the
  12  * OpenIB.org BSD license below:
  13  *
  14  *     Redistribution and use in source and binary forms, with or
  15  *     without modification, are permitted provided that the following
  16  *     conditions are met:
  17  *
  18  *      - Redistributions of source code must retain the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer.
  21  *
  22  *      - Redistributions in binary form must reproduce the above
  23  *        copyright notice, this list of conditions and the following
  24  *        disclaimer in the documentation and/or other materials
  25  *        provided with the distribution.
  26  *
  27  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34  * SOFTWARE.
  35  */
  36
  37 #ifndef MLX4_H
  38 #define MLX4_H
  39
  40 #include <linux/mutex.h>
  41 #include <linux/radix-tree.h>
  42 #include <linux/timer.h>
  43 #include <linux/workqueue.h>
  44
  45 #include <linux/mlx4/device.h>
  46 #include <linux/mlx4/driver.h>
  47 #include <linux/mlx4/doorbell.h>
  48
  49 #define DRV_NAME        "mlx4_core"
  50 #define PFX             DRV_NAME ": "
  51 #define DRV_VERSION     "0.01"
  52 #define DRV_RELDATE     "May 1, 2007"
  53
  54 enum {
  55         MLX4_HCR_BASE           = 0x80680,
  56         MLX4_HCR_SIZE           = 0x0001c,
  57         MLX4_CLR_INT_SIZE       = 0x00008
  58 };
  59
  60 enum {
  61         MLX4_MGM_ENTRY_SIZE     =  0x100,
  62         MLX4_QP_PER_MGM         = 4 * (MLX4_MGM_ENTRY_SIZE / 16 - 2),
  63         MLX4_MTT_ENTRY_PER_SEG  = 8
  64 };
  65
  66 enum {
  67         MLX4_NUM_PDS            = 1 << 15
  68 };
  69
  70 enum {
  71         MLX4_CMPT_TYPE_QP       = 0,
  72         MLX4_CMPT_TYPE_SRQ      = 1,
  73         MLX4_CMPT_TYPE_CQ       = 2,
  74         MLX4_CMPT_TYPE_EQ       = 3,
  75         MLX4_CMPT_NUM_TYPE
  76 };
  77
  78 enum {
  79         MLX4_CMPT_SHIFT         = 24,
  80         MLX4_NUM_CMPTS          = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT
  81 };
  82
  83 #ifdef CONFIG_MLX4_DEBUG
  84 extern int mlx4_debug_level;
  85 #else /* CONFIG_MLX4_DEBUG */
  86 #define mlx4_debug_level        (0)
  87 #endif /* CONFIG_MLX4_DEBUG */
  88
  89 #define mlx4_dbg(mdev, format, arg...)                                  \
  90         do {                                                            \
  91                 if (mlx4_debug_level)                                   \
  92                         dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
  93         } while (0)
  94
  95 #define mlx4_err(mdev, format, arg...) \
  96         dev_err(&mdev->pdev->dev, format, ## arg)
  97 #define mlx4_info(mdev, format, arg...) \
  98         dev_info(&mdev->pdev->dev, format, ## arg)
  99 #define mlx4_warn(mdev, format, arg...) \
 100         dev_warn(&mdev->pdev->dev, format, ## arg)
 101
 102 struct mlx4_bitmap {
 103         u32                     last;
 104         u32                     top;
 105         u32                     max;
 106         u32                     reserved_top;
 107         u32                     mask;
 108         spinlock_t              lock;
 109         unsigned long          *table;
 110 };
 111
 112 struct mlx4_buddy {
 113         unsigned long         **bits;
 114         unsigned int           *num_free;
 115         int                     max_order;
 116         spinlock_t              lock;
 117 };
 118
 119 struct mlx4_icm;
 120
 121 struct mlx4_icm_table {
 122         u64                     virt;
 123         int                     num_icm;
 124         int                     num_obj;
 125         int                     obj_size;
 126         int                     lowmem;
 127         int                     coherent;
 128         struct mutex            mutex;
 129         struct mlx4_icm       **icm;
 130 };
 131
 132 struct mlx4_eq {
 133         struct mlx4_dev        *dev;
 134         void __iomem           *doorbell;
 135         int                     eqn;
 136         u32                     cons_index;
 137         u16                     irq;
 138         u16                     have_irq;
 139         int                     nent;
 140         struct mlx4_buf_list   *page_list;
 141         struct mlx4_mtt         mtt;
 142 };
 143
 144 struct mlx4_profile {
 145         int                     num_qp;
 146         int                     rdmarc_per_qp;
 147         int                     num_srq;
 148         int                     num_cq;
 149         int                     num_mcg;
 150         int                     num_mpt;
 151         int                     num_mtt;
 152 };
 153
 154 struct mlx4_fw {
 155         u64                     clr_int_base;
 156         u64                     catas_offset;
 157         struct mlx4_icm        *fw_icm;
 158         struct mlx4_icm        *aux_icm;
 159         u32                     catas_size;
 160         u16                     fw_pages;
 161         u8                      clr_int_bar;
 162         u8                      catas_bar;
 163 };
 164
 165 struct mlx4_cmd {
 166         struct pci_pool        *pool;
 167         void __iomem           *hcr;
 168         struct mutex            hcr_mutex;
 169         struct semaphore        poll_sem;
 170         struct semaphore        event_sem;
 171         int                     max_cmds;
 172         spinlock_t              context_lock;
 173         int                     free_head;
 174         struct mlx4_cmd_context *context;
 175         u16                     token_mask;
 176         u8                      use_events;
 177         u8                      toggle;
 178 };
 179
 180 struct mlx4_uar_table {
 181         struct mlx4_bitmap      bitmap;
 182 };
 183
 184 struct mlx4_mr_table {
 185         struct mlx4_bitmap      mpt_bitmap;
 186         struct mlx4_buddy       mtt_buddy;
 187         u64                     mtt_base;
 188         u64                     mpt_base;
 189         struct mlx4_icm_table   mtt_table;
 190         struct mlx4_icm_table   dmpt_table;
 191 };
 192
 193 struct mlx4_cq_table {
 194         struct mlx4_bitmap      bitmap;
 195         spinlock_t              lock;
 196         struct radix_tree_root  tree;
 197         struct mlx4_icm_table   table;
 198         struct mlx4_icm_table   cmpt_table;
 199 };
 200
 201 struct mlx4_eq_table {
 202         struct mlx4_bitmap      bitmap;
 203         char                   *irq_names;
 204         void __iomem           *clr_int;
 205         void __iomem          **uar_map;
 206         u32                     clr_mask;
 207         struct mlx4_eq         *eq;
 208         struct mlx4_icm_table   table;
 209         struct mlx4_icm_table   cmpt_table;
 210         int                     have_irq;
 211         u8                      inta_pin;
 212 };
 213
 214 struct mlx4_srq_table {
 215         struct mlx4_bitmap      bitmap;
 216         spinlock_t              lock;
 217         struct radix_tree_root  tree;
 218         struct mlx4_icm_table   table;
 219         struct mlx4_icm_table   cmpt_table;
 220 };
 221
 222 struct mlx4_qp_table {
 223         struct mlx4_bitmap      bitmap;
 224         u32                     rdmarc_base;
 225         int                     rdmarc_shift;
 226         spinlock_t              lock;
 227         struct mlx4_icm_table   qp_table;
 228         struct mlx4_icm_table   auxc_table;
 229         struct mlx4_icm_table   altc_table;
 230         struct mlx4_icm_table   rdmarc_table;
 231         struct mlx4_icm_table   cmpt_table;
 232 };
 233
 234 struct mlx4_mcg_table {
 235         struct mutex            mutex;
 236         struct mlx4_bitmap      bitmap;
 237         struct mlx4_icm_table   table;
 238 };
 239
 240 struct mlx4_catas_err {
 241         u32 __iomem            *map;
 242         struct timer_list       timer;
 243         struct list_head        list;
 244 };
 245
 246 #define MLX4_MAX_MAC_NUM        128
 247 #define MLX4_MAC_TABLE_SIZE     (MLX4_MAX_MAC_NUM << 3)
 248
 249 struct mlx4_mac_table {
 250         __be64                  entries[MLX4_MAX_MAC_NUM];
 251         int                     refs[MLX4_MAX_MAC_NUM];
 252         struct mutex            mutex;
 253         int                     total;
 254         int                     max;
 255 };
 256
 257 #define MLX4_MAX_VLAN_NUM       128
 258 #define MLX4_VLAN_TABLE_SIZE    (MLX4_MAX_VLAN_NUM << 2)
 259
 260 struct mlx4_vlan_table {
 261         __be32                  entries[MLX4_MAX_VLAN_NUM];
 262         int                     refs[MLX4_MAX_VLAN_NUM];
 263         struct mutex            mutex;
 264         int                     total;
 265         int                     max;
 266 };
 267
 268 struct mlx4_port_info {
 269         struct mlx4_dev        *dev;
 270         int                     port;
 271         char                    dev_name[16];
 272         struct device_attribute port_attr;
 273         enum mlx4_port_type     tmp_type;
 274         struct mlx4_mac_table   mac_table;
 275         struct mlx4_vlan_table  vlan_table;
 276 };
 277
 278 struct mlx4_sense {
 279         struct mlx4_dev         *dev;
 280         u8                      do_sense_port[MLX4_MAX_PORTS + 1];
 281         u8                      sense_allowed[MLX4_MAX_PORTS + 1];
 282         struct delayed_work     sense_poll;
 283 };
 284
 285 struct mlx4_priv {
 286         struct mlx4_dev         dev;
 287
 288         struct list_head        dev_list;
 289         struct list_head        ctx_list;
 290         spinlock_t              ctx_lock;
 291
 292         struct list_head        pgdir_list;
 293         struct mutex            pgdir_mutex;
 294
 295         struct mlx4_fw          fw;
 296         struct mlx4_cmd         cmd;
 297
 298         struct mlx4_bitmap      pd_bitmap;
 299         struct mlx4_uar_table   uar_table;
 300         struct mlx4_mr_table    mr_table;
 301         struct mlx4_cq_table    cq_table;
 302         struct mlx4_eq_table    eq_table;
 303         struct mlx4_srq_table   srq_table;
 304         struct mlx4_qp_table    qp_table;
 305         struct mlx4_mcg_table   mcg_table;
 306
 307         struct mlx4_catas_err   catas_err;
 308
 309         void __iomem           *clr_base;
 310
 311         struct mlx4_uar         driver_uar;
 312         void __iomem           *kar;
 313         struct mlx4_port_info   port[MLX4_MAX_PORTS + 1];
 314         struct mlx4_sense       sense;
 315         struct mutex            port_mutex;
 316 };
 317
 318 static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev)
 319 {
 320         return container_of(dev, struct mlx4_priv, dev);
 321 }
 322
 323 #define MLX4_SENSE_RANGE        (HZ * 3)
 324
 325 extern struct workqueue_struct *mlx4_wq;
 326
 327 u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap);
 328 void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj);
 329 u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align);
 330 void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt);
 331 int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask,
 332                      u32 reserved_bot, u32 resetrved_top);
 333 void mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap);
 334
 335 int mlx4_reset(struct mlx4_dev *dev);
 336
 337 int mlx4_alloc_eq_table(struct mlx4_dev *dev);
 338 void mlx4_free_eq_table(struct mlx4_dev *dev);
 339
 340 int mlx4_init_pd_table(struct mlx4_dev *dev);
 341 int mlx4_init_uar_table(struct mlx4_dev *dev);
 342 int mlx4_init_mr_table(struct mlx4_dev *dev);
 343 int mlx4_init_eq_table(struct mlx4_dev *dev);
 344 int mlx4_init_cq_table(struct mlx4_dev *dev);
 345 int mlx4_init_qp_table(struct mlx4_dev *dev);
 346 int mlx4_init_srq_table(struct mlx4_dev *dev);
 347 int mlx4_init_mcg_table(struct mlx4_dev *dev);
 348
 349 void mlx4_cleanup_pd_table(struct mlx4_dev *dev);
 350 void mlx4_cleanup_uar_table(struct mlx4_dev *dev);
 351 void mlx4_cleanup_mr_table(struct mlx4_dev *dev);
 352 void mlx4_cleanup_eq_table(struct mlx4_dev *dev);
 353 void mlx4_cleanup_cq_table(struct mlx4_dev *dev);
 354 void mlx4_cleanup_qp_table(struct mlx4_dev *dev);
 355 void mlx4_cleanup_srq_table(struct mlx4_dev *dev);
 356 void mlx4_cleanup_mcg_table(struct mlx4_dev *dev);
 357
 358 void mlx4_start_catas_poll(struct mlx4_dev *dev);
 359 void mlx4_stop_catas_poll(struct mlx4_dev *dev);
 360 void mlx4_catas_init(void);
 361 int mlx4_restart_one(struct pci_dev *pdev);
 362 int mlx4_register_device(struct mlx4_dev *dev);
 363 void mlx4_unregister_device(struct mlx4_dev *dev);
 364 void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, int port);
 365
 366 struct mlx4_dev_cap;
 367 struct mlx4_init_hca_param;
 368
 369 u64 mlx4_make_profile(struct mlx4_dev *dev,
 370                       struct mlx4_profile *request,
 371                       struct mlx4_dev_cap *dev_cap,
 372                       struct mlx4_init_hca_param *init_hca);
 373
 374 int mlx4_cmd_init(struct mlx4_dev *dev);
 375 void mlx4_cmd_cleanup(struct mlx4_dev *dev);
 376 void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param);
 377 int mlx4_cmd_use_events(struct mlx4_dev *dev);
 378 void mlx4_cmd_use_polling(struct mlx4_dev *dev);
 379
 380 void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn);
 381 void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type);
 382
 383 void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type);
 384
 385 void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type);
 386
 387 void mlx4_handle_catas_err(struct mlx4_dev *dev);
 388
 389 void mlx4_do_sense_ports(struct mlx4_dev *dev,
 390                          enum mlx4_port_type *stype,
 391                          enum mlx4_port_type *defaults);
 392 void mlx4_start_sense(struct mlx4_dev *dev);
 393 void mlx4_stop_sense(struct mlx4_dev *dev);
 394 void mlx4_sense_init(struct mlx4_dev *dev);
 395 int mlx4_check_port_params(struct mlx4_dev *dev,
 396                            enum mlx4_port_type *port_type);
 397 int mlx4_change_port_types(struct mlx4_dev *dev,
 398                            enum mlx4_port_type *port_types);
 399
 400 void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table);
 401 void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table);
 402
 403 int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port);
 404 int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps);
 405
 406 #endif /* MLX4_H */