drivers/net/wan/lmc/lmc_media.c

   1 /* $Id: lmc_media.c,v 1.13 2000/04/11 05:25:26 asj Exp $ */
   2
   3 #include <linux/kernel.h>
   4 #include <linux/string.h>
   5 #include <linux/timer.h>
   6 #include <linux/ptrace.h>
   7 #include <linux/errno.h>
   8 #include <linux/ioport.h>
   9 #include <linux/slab.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/in.h>
  12 #include <linux/if_arp.h>
  13 #include <linux/netdevice.h>
  14 #include <linux/etherdevice.h>
  15 #include <linux/skbuff.h>
  16 #include <linux/inet.h>
  17 #include <linux/bitops.h>
  18
  19 #include <asm/processor.h>             /* Processor type for cache alignment. */
  20 #include <asm/io.h>
  21 #include <asm/dma.h>
  22
  23 #include <asm/uaccess.h>
  24
  25 #include "lmc.h"
  26 #include "lmc_var.h"
  27 #include "lmc_ioctl.h"
  28 #include "lmc_debug.h"
  29
  30 #define CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 1
  31
  32  /*
  33   * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
  34   * All rights reserved.  www.lanmedia.com
  35   *
  36   * This code is written by:
  37   * Andrew Stanley-Jones (asj@cban.com)
  38   * Rob Braun (bbraun@vix.com),
  39   * Michael Graff (explorer@vix.com) and
  40   * Matt Thomas (matt@3am-software.com).
  41   *
  42   * This software may be used and distributed according to the terms
  43   * of the GNU General Public License version 2, incorporated herein by reference.
  44   */
  45
  46 /*
  47  * protocol independent method.
  48  */
  49 static void lmc_set_protocol (lmc_softc_t * const, lmc_ctl_t *);
  50
  51 /*
  52  * media independent methods to check on media status, link, light LEDs,
  53  * etc.
  54  */
  55 static void lmc_ds3_init (lmc_softc_t * const);
  56 static void lmc_ds3_default (lmc_softc_t * const);
  57 static void lmc_ds3_set_status (lmc_softc_t * const, lmc_ctl_t *);
  58 static void lmc_ds3_set_100ft (lmc_softc_t * const, int);
  59 static int lmc_ds3_get_link_status (lmc_softc_t * const);
  60 static void lmc_ds3_set_crc_length (lmc_softc_t * const, int);
  61 static void lmc_ds3_set_scram (lmc_softc_t * const, int);
  62 static void lmc_ds3_watchdog (lmc_softc_t * const);
  63
  64 static void lmc_hssi_init (lmc_softc_t * const);
  65 static void lmc_hssi_default (lmc_softc_t * const);
  66 static void lmc_hssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
  67 static void lmc_hssi_set_clock (lmc_softc_t * const, int);
  68 static int lmc_hssi_get_link_status (lmc_softc_t * const);
  69 static void lmc_hssi_set_link_status (lmc_softc_t * const, int);
  70 static void lmc_hssi_set_crc_length (lmc_softc_t * const, int);
  71 static void lmc_hssi_watchdog (lmc_softc_t * const);
  72
  73 static void lmc_ssi_init (lmc_softc_t * const);
  74 static void lmc_ssi_default (lmc_softc_t * const);
  75 static void lmc_ssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
  76 static void lmc_ssi_set_clock (lmc_softc_t * const, int);
  77 static void lmc_ssi_set_speed (lmc_softc_t * const, lmc_ctl_t *);
  78 static int lmc_ssi_get_link_status (lmc_softc_t * const);
  79 static void lmc_ssi_set_link_status (lmc_softc_t * const, int);
  80 static void lmc_ssi_set_crc_length (lmc_softc_t * const, int);
  81 static void lmc_ssi_watchdog (lmc_softc_t * const);
  82
  83 static void lmc_t1_init (lmc_softc_t * const);
  84 static void lmc_t1_default (lmc_softc_t * const);
  85 static void lmc_t1_set_status (lmc_softc_t * const, lmc_ctl_t *);
  86 static int lmc_t1_get_link_status (lmc_softc_t * const);
  87 static void lmc_t1_set_circuit_type (lmc_softc_t * const, int);
  88 static void lmc_t1_set_crc_length (lmc_softc_t * const, int);
  89 static void lmc_t1_set_clock (lmc_softc_t * const, int);
  90 static void lmc_t1_watchdog (lmc_softc_t * const);
  91
  92 static void lmc_dummy_set_1 (lmc_softc_t * const, int);
  93 static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *);
  94
  95 static inline void write_av9110_bit (lmc_softc_t *, int);
  96 static void write_av9110(lmc_softc_t *, u32, u32, u32, u32, u32);
  97
  98 lmc_media_t lmc_ds3_media = {
  99   lmc_ds3_init,                 /* special media init stuff */
 100   lmc_ds3_default,              /* reset to default state */
 101   lmc_ds3_set_status,           /* reset status to state provided */
 102   lmc_dummy_set_1,              /* set clock source */
 103   lmc_dummy_set2_1,             /* set line speed */
 104   lmc_ds3_set_100ft,            /* set cable length */
 105   lmc_ds3_set_scram,            /* set scrambler */
 106   lmc_ds3_get_link_status,      /* get link status */
 107   lmc_dummy_set_1,              /* set link status */
 108   lmc_ds3_set_crc_length,       /* set CRC length */
 109   lmc_dummy_set_1,              /* set T1 or E1 circuit type */
 110   lmc_ds3_watchdog
 111 };
 112
 113 lmc_media_t lmc_hssi_media = {
 114   lmc_hssi_init,                /* special media init stuff */
 115   lmc_hssi_default,             /* reset to default state */
 116   lmc_hssi_set_status,          /* reset status to state provided */
 117   lmc_hssi_set_clock,           /* set clock source */
 118   lmc_dummy_set2_1,             /* set line speed */
 119   lmc_dummy_set_1,              /* set cable length */
 120   lmc_dummy_set_1,              /* set scrambler */
 121   lmc_hssi_get_link_status,     /* get link status */
 122   lmc_hssi_set_link_status,     /* set link status */
 123   lmc_hssi_set_crc_length,      /* set CRC length */
 124   lmc_dummy_set_1,              /* set T1 or E1 circuit type */
 125   lmc_hssi_watchdog
 126 };
 127
 128 lmc_media_t lmc_ssi_media = { lmc_ssi_init,     /* special media init stuff */
 129   lmc_ssi_default,              /* reset to default state */
 130   lmc_ssi_set_status,           /* reset status to state provided */
 131   lmc_ssi_set_clock,            /* set clock source */
 132   lmc_ssi_set_speed,            /* set line speed */
 133   lmc_dummy_set_1,              /* set cable length */
 134   lmc_dummy_set_1,              /* set scrambler */
 135   lmc_ssi_get_link_status,      /* get link status */
 136   lmc_ssi_set_link_status,      /* set link status */
 137   lmc_ssi_set_crc_length,       /* set CRC length */
 138   lmc_dummy_set_1,              /* set T1 or E1 circuit type */
 139   lmc_ssi_watchdog
 140 };
 141
 142 lmc_media_t lmc_t1_media = {
 143   lmc_t1_init,                  /* special media init stuff */
 144   lmc_t1_default,               /* reset to default state */
 145   lmc_t1_set_status,            /* reset status to state provided */
 146   lmc_t1_set_clock,             /* set clock source */
 147   lmc_dummy_set2_1,             /* set line speed */
 148   lmc_dummy_set_1,              /* set cable length */
 149   lmc_dummy_set_1,              /* set scrambler */
 150   lmc_t1_get_link_status,       /* get link status */
 151   lmc_dummy_set_1,              /* set link status */
 152   lmc_t1_set_crc_length,        /* set CRC length */
 153   lmc_t1_set_circuit_type,      /* set T1 or E1 circuit type */
 154   lmc_t1_watchdog
 155 };
 156
 157 static void
 158 lmc_dummy_set_1 (lmc_softc_t * const sc, int a)
 159 {
 160 }
 161
 162 static void
 163 lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a)
 164 {
 165 }
 166
 167 /*
 168  *  HSSI methods
 169  */
 170
 171 static void
 172 lmc_hssi_init (lmc_softc_t * const sc)
 173 {
 174   sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200;
 175
 176   lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK);
 177 }
 178
 179 static void
 180 lmc_hssi_default (lmc_softc_t * const sc)
 181 {
 182   sc->lmc_miireg16 = LMC_MII16_LED_ALL;
 183
 184   sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
 185   sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
 186   sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
 187 }
 188
 189 /*
 190  * Given a user provided state, set ourselves up to match it.  This will
 191  * always reset the card if needed.
 192  */
 193 static void
 194 lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
 195 {
 196   if (ctl == NULL)
 197     {
 198       sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
 199       lmc_set_protocol (sc, NULL);
 200
 201       return;
 202     }
 203
 204   /*
 205    * check for change in clock source
 206    */
 207   if (ctl->clock_source && !sc->ictl.clock_source)
 208     {
 209       sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
 210       sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
 211     }
 212   else if (!ctl->clock_source && sc->ictl.clock_source)
 213     {
 214       sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
 215       sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
 216     }
 217
 218   lmc_set_protocol (sc, ctl);
 219 }
 220
 221 /*
 222  * 1 == internal, 0 == external
 223  */
 224 static void
 225 lmc_hssi_set_clock (lmc_softc_t * const sc, int ie)
 226 {
 227   int old;
 228   old = sc->ictl.clock_source;
 229   if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
 230     {
 231       sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK;
 232       LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 233       sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
 234       if(old != ie)
 235         printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
 236     }
 237   else
 238     {
 239       sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK);
 240       LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 241       sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
 242       if(old != ie)
 243         printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
 244     }
 245 }
 246
 247 /*
 248  * return hardware link status.
 249  * 0 == link is down, 1 == link is up.
 250  */
 251 static int
 252 lmc_hssi_get_link_status (lmc_softc_t * const sc)
 253 {
 254     /*
 255      * We're using the same code as SSI since
 256      * they're practically the same
 257      */
 258     return lmc_ssi_get_link_status(sc);
 259 }
 260
 261 static void
 262 lmc_hssi_set_link_status (lmc_softc_t * const sc, int state)
 263 {
 264   if (state == LMC_LINK_UP)
 265     sc->lmc_miireg16 |= LMC_MII16_HSSI_TA;
 266   else
 267     sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA;
 268
 269   lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
 270 }
 271
 272 /*
 273  * 0 == 16bit, 1 == 32bit
 274  */
 275 static void
 276 lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state)
 277 {
 278   if (state == LMC_CTL_CRC_LENGTH_32)
 279     {
 280       /* 32 bit */
 281       sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC;
 282       sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
 283     }
 284   else
 285     {
 286       /* 16 bit */
 287       sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC;
 288       sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
 289     }
 290
 291   lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
 292 }
 293
 294 static void
 295 lmc_hssi_watchdog (lmc_softc_t * const sc)
 296 {
 297   /* HSSI is blank */
 298 }
 299
 300 /*
 301  *  DS3 methods
 302  */
 303
 304 /*
 305  * Set cable length
 306  */
 307 static void
 308 lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie)
 309 {
 310   if (ie == LMC_CTL_CABLE_LENGTH_GT_100FT)
 311     {
 312       sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO;
 313       sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT;
 314     }
 315   else if (ie == LMC_CTL_CABLE_LENGTH_LT_100FT)
 316     {
 317       sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO;
 318       sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT;
 319     }
 320   lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
 321 }
 322
 323 static void
 324 lmc_ds3_default (lmc_softc_t * const sc)
 325 {
 326   sc->lmc_miireg16 = LMC_MII16_LED_ALL;
 327
 328   sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
 329   sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
 330   sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF);
 331   sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
 332 }
 333
 334 /*
 335  * Given a user provided state, set ourselves up to match it.  This will
 336  * always reset the card if needed.
 337  */
 338 static void
 339 lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
 340 {
 341   if (ctl == NULL)
 342     {
 343       sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length);
 344       sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff);
 345       lmc_set_protocol (sc, NULL);
 346
 347       return;
 348     }
 349
 350   /*
 351    * check for change in cable length setting
 352    */
 353   if (ctl->cable_length && !sc->ictl.cable_length)
 354     lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT);
 355   else if (!ctl->cable_length && sc->ictl.cable_length)
 356     lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
 357
 358   /*
 359    * Check for change in scrambler setting (requires reset)
 360    */
 361   if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff)
 362     lmc_ds3_set_scram (sc, LMC_CTL_ON);
 363   else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff)
 364     lmc_ds3_set_scram (sc, LMC_CTL_OFF);
 365
 366   lmc_set_protocol (sc, ctl);
 367 }
 368
 369 static void
 370 lmc_ds3_init (lmc_softc_t * const sc)
 371 {
 372   int i;
 373
 374   sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245;
 375
 376   /* writes zeros everywhere */
 377   for (i = 0; i < 21; i++)
 378     {
 379       lmc_mii_writereg (sc, 0, 17, i);
 380       lmc_mii_writereg (sc, 0, 18, 0);
 381     }
 382
 383   /* set some essential bits */
 384   lmc_mii_writereg (sc, 0, 17, 1);
 385   lmc_mii_writereg (sc, 0, 18, 0x25);   /* ser, xtx */
 386
 387   lmc_mii_writereg (sc, 0, 17, 5);
 388   lmc_mii_writereg (sc, 0, 18, 0x80);   /* emode */
 389
 390   lmc_mii_writereg (sc, 0, 17, 14);
 391   lmc_mii_writereg (sc, 0, 18, 0x30);   /* rcgen, tcgen */
 392
 393   /* clear counters and latched bits */
 394   for (i = 0; i < 21; i++)
 395     {
 396       lmc_mii_writereg (sc, 0, 17, i);
 397       lmc_mii_readreg (sc, 0, 18);
 398     }
 399 }
 400
 401 /*
 402  * 1 == DS3 payload scrambled, 0 == not scrambled
 403  */
 404 static void
 405 lmc_ds3_set_scram (lmc_softc_t * const sc, int ie)
 406 {
 407   if (ie == LMC_CTL_ON)
 408     {
 409       sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM;
 410       sc->ictl.scrambler_onoff = LMC_CTL_ON;
 411     }
 412   else
 413     {
 414       sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM;
 415       sc->ictl.scrambler_onoff = LMC_CTL_OFF;
 416     }
 417   lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
 418 }
 419
 420 /*
 421  * return hardware link status.
 422  * 0 == link is down, 1 == link is up.
 423  */
 424 static int
 425 lmc_ds3_get_link_status (lmc_softc_t * const sc)
 426 {
 427     u16 link_status, link_status_11;
 428     int ret = 1;
 429
 430     lmc_mii_writereg (sc, 0, 17, 7);
 431     link_status = lmc_mii_readreg (sc, 0, 18);
 432
 433     /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
 434      * led0 yellow = far-end adapter is in Red alarm condition
 435      * led1 blue   = received an Alarm Indication signal
 436      *               (upstream failure)
 437      * led2 Green  = power to adapter, Gate Array loaded & driver
 438      *               attached
 439      * led3 red    = Loss of Signal (LOS) or out of frame (OOF)
 440      *               conditions detected on T3 receive signal
 441      */
 442
 443     lmc_led_on(sc, LMC_DS3_LED2);
 444
 445     if ((link_status & LMC_FRAMER_REG0_DLOS) ||
 446         (link_status & LMC_FRAMER_REG0_OOFS)){
 447         ret = 0;
 448         if(sc->last_led_err[3] != 1){
 449             u16 r1;
 450             lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */
 451             r1 = lmc_mii_readreg (sc, 0, 18);
 452             r1 &= 0xfe;
 453             lmc_mii_writereg(sc, 0, 18, r1);
 454             printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name);
 455         }
 456         lmc_led_on(sc, LMC_DS3_LED3);   /* turn on red LED */
 457         sc->last_led_err[3] = 1;
 458     }
 459     else {
 460         lmc_led_off(sc, LMC_DS3_LED3);  /* turn on red LED */
 461         if(sc->last_led_err[3] == 1){
 462             u16 r1;
 463             lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */
 464             r1 = lmc_mii_readreg (sc, 0, 18);
 465             r1 |= 0x01;
 466             lmc_mii_writereg(sc, 0, 18, r1);
 467         }
 468         sc->last_led_err[3] = 0;
 469     }
 470
 471     lmc_mii_writereg(sc, 0, 17, 0x10);
 472     link_status_11 = lmc_mii_readreg(sc, 0, 18);
 473     if((link_status & LMC_FRAMER_REG0_AIS) ||
 474        (link_status_11 & LMC_FRAMER_REG10_XBIT)) {
 475         ret = 0;
 476         if(sc->last_led_err[0] != 1){
 477             printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name);
 478             printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name);
 479         }
 480         lmc_led_on(sc, LMC_DS3_LED0);
 481         sc->last_led_err[0] = 1;
 482     }
 483     else {
 484         lmc_led_off(sc, LMC_DS3_LED0);
 485         sc->last_led_err[0] = 0;
 486     }
 487
 488     lmc_mii_writereg (sc, 0, 17, 9);
 489     link_status = lmc_mii_readreg (sc, 0, 18);
 490
 491     if(link_status & LMC_FRAMER_REG9_RBLUE){
 492         ret = 0;
 493         if(sc->last_led_err[1] != 1){
 494             printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name);
 495         }
 496         lmc_led_on(sc, LMC_DS3_LED1);
 497         sc->last_led_err[1] = 1;
 498     }
 499     else {
 500         lmc_led_off(sc, LMC_DS3_LED1);
 501         sc->last_led_err[1] = 0;
 502     }
 503
 504     return ret;
 505 }
 506
 507 /*
 508  * 0 == 16bit, 1 == 32bit
 509  */
 510 static void
 511 lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state)
 512 {
 513   if (state == LMC_CTL_CRC_LENGTH_32)
 514     {
 515       /* 32 bit */
 516       sc->lmc_miireg16 |= LMC_MII16_DS3_CRC;
 517       sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
 518     }
 519   else
 520     {
 521       /* 16 bit */
 522       sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC;
 523       sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
 524     }
 525
 526   lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
 527 }
 528
 529 static void
 530 lmc_ds3_watchdog (lmc_softc_t * const sc)
 531 {
 532
 533 }
 534
 535
 536 /*
 537  *  SSI methods
 538  */
 539
 540 static void lmc_ssi_init(lmc_softc_t * const sc)
 541 {
 542         u16 mii17;
 543         int cable;
 544
 545         sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
 546
 547         mii17 = lmc_mii_readreg(sc, 0, 17);
 548
 549         cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT;
 550         sc->ictl.cable_type = cable;
 551
 552         lmc_gpio_mkoutput(sc, LMC_GEP_SSI_TXCLOCK);
 553 }
 554
 555 static void
 556 lmc_ssi_default (lmc_softc_t * const sc)
 557 {
 558   sc->lmc_miireg16 = LMC_MII16_LED_ALL;
 559
 560   /*
 561    * make TXCLOCK always be an output
 562    */
 563   lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
 564
 565   sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
 566   sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
 567   sc->lmc_media->set_speed (sc, NULL);
 568   sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
 569 }
 570
 571 /*
 572  * Given a user provided state, set ourselves up to match it.  This will
 573  * always reset the card if needed.
 574  */
 575 static void
 576 lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
 577 {
 578   if (ctl == NULL)
 579     {
 580       sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
 581       sc->lmc_media->set_speed (sc, &sc->ictl);
 582       lmc_set_protocol (sc, NULL);
 583
 584       return;
 585     }
 586
 587   /*
 588    * check for change in clock source
 589    */
 590   if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT
 591       && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT)
 592     {
 593       sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
 594       sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
 595     }
 596   else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT
 597            && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT)
 598     {
 599       sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
 600       sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
 601     }
 602
 603   if (ctl->clock_rate != sc->ictl.clock_rate)
 604     sc->lmc_media->set_speed (sc, ctl);
 605
 606   lmc_set_protocol (sc, ctl);
 607 }
 608
 609 /*
 610  * 1 == internal, 0 == external
 611  */
 612 static void
 613 lmc_ssi_set_clock (lmc_softc_t * const sc, int ie)
 614 {
 615   int old;
 616   old = ie;
 617   if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
 618     {
 619       sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
 620       LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 621       sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
 622       if(ie != old)
 623         printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
 624     }
 625   else
 626     {
 627       sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
 628       LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 629       sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
 630       if(ie != old)
 631         printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
 632     }
 633 }
 634
 635 static void
 636 lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl)
 637 {
 638   lmc_ctl_t *ictl = &sc->ictl;
 639   lmc_av9110_t *av;
 640
 641   /* original settings for clock rate of:
 642    *  100 Khz (8,25,0,0,2) were incorrect
 643    *  they should have been 80,125,1,3,3
 644    *  There are 17 param combinations to produce this freq.
 645    *  For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations)
 646    */
 647   if (ctl == NULL)
 648     {
 649       av = &ictl->cardspec.ssi;
 650       ictl->clock_rate = 1500000;
 651       av->f = ictl->clock_rate;
 652       av->n = 120;
 653       av->m = 100;
 654       av->v = 1;
 655       av->x = 1;
 656       av->r = 2;
 657
 658       write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
 659       return;
 660     }
 661
 662   av = &ctl->cardspec.ssi;
 663
 664   if (av->f == 0)
 665     return;
 666
 667   ictl->clock_rate = av->f;     /* really, this is the rate we are */
 668   ictl->cardspec.ssi = *av;
 669
 670   write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
 671 }
 672
 673 /*
 674  * return hardware link status.
 675  * 0 == link is down, 1 == link is up.
 676  */
 677 static int
 678 lmc_ssi_get_link_status (lmc_softc_t * const sc)
 679 {
 680   u16 link_status;
 681   u32 ticks;
 682   int ret = 1;
 683   int hw_hdsk = 1;
 684
 685   /*
 686    * missing CTS?  Hmm.  If we require CTS on, we may never get the
 687    * link to come up, so omit it in this test.
 688    *
 689    * Also, it seems that with a loopback cable, DCD isn't asserted,
 690    * so just check for things like this:
 691    *      DSR _must_ be asserted.
 692    *      One of DCD or CTS must be asserted.
 693    */
 694
 695   /* LMC 1000 (SSI) LED definitions
 696    * led0 Green = power to adapter, Gate Array loaded &
 697    *              driver attached
 698    * led1 Green = DSR and DTR and RTS and CTS are set
 699    * led2 Green = Cable detected
 700    * led3 red   = No timing is available from the
 701    *              cable or the on-board frequency
 702    *              generator.
 703    */
 704
 705   link_status = lmc_mii_readreg (sc, 0, 16);
 706
 707   /* Is the transmit clock still available */
 708   ticks = LMC_CSR_READ (sc, csr_gp_timer);
 709   ticks = 0x0000ffff - (ticks & 0x0000ffff);
 710
 711   lmc_led_on (sc, LMC_MII16_LED0);
 712
 713   /* ====== transmit clock determination ===== */
 714   if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) {
 715       lmc_led_off(sc, LMC_MII16_LED3);
 716   }
 717   else if (ticks == 0 ) {                               /* no clock found ? */
 718       ret = 0;
 719       if (sc->last_led_err[3] != 1) {
 720               sc->extra_stats.tx_lossOfClockCnt++;
 721               printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name);
 722       }
 723       sc->last_led_err[3] = 1;
 724       lmc_led_on (sc, LMC_MII16_LED3);  /* turn ON red LED */
 725   }
 726   else {
 727       if(sc->last_led_err[3] == 1)
 728           printk(KERN_WARNING "%s: Clock Returned\n", sc->name);
 729       sc->last_led_err[3] = 0;
 730       lmc_led_off (sc, LMC_MII16_LED3);         /* turn OFF red LED */
 731   }
 732
 733   if ((link_status & LMC_MII16_SSI_DSR) == 0) { /* Also HSSI CA */
 734       ret = 0;
 735       hw_hdsk = 0;
 736   }
 737
 738 #ifdef CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE
 739   if ((link_status & (LMC_MII16_SSI_CTS | LMC_MII16_SSI_DCD)) == 0){
 740       ret = 0;
 741       hw_hdsk = 0;
 742   }
 743 #endif
 744
 745   if(hw_hdsk == 0){
 746       if(sc->last_led_err[1] != 1)
 747           printk(KERN_WARNING "%s: DSR not asserted\n", sc->name);
 748       sc->last_led_err[1] = 1;
 749       lmc_led_off(sc, LMC_MII16_LED1);
 750   }
 751   else {
 752       if(sc->last_led_err[1] != 0)
 753           printk(KERN_WARNING "%s: DSR now asserted\n", sc->name);
 754       sc->last_led_err[1] = 0;
 755       lmc_led_on(sc, LMC_MII16_LED1);
 756   }
 757
 758   if(ret == 1) {
 759       lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */
 760   }
 761
 762   return ret;
 763 }
 764
 765 static void
 766 lmc_ssi_set_link_status (lmc_softc_t * const sc, int state)
 767 {
 768   if (state == LMC_LINK_UP)
 769     {
 770       sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
 771       printk (LMC_PRINTF_FMT ": asserting DTR and RTS\n", LMC_PRINTF_ARGS);
 772     }
 773   else
 774     {
 775       sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
 776       printk (LMC_PRINTF_FMT ": deasserting DTR and RTS\n", LMC_PRINTF_ARGS);
 777     }
 778
 779   lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
 780
 781 }
 782
 783 /*
 784  * 0 == 16bit, 1 == 32bit
 785  */
 786 static void
 787 lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state)
 788 {
 789   if (state == LMC_CTL_CRC_LENGTH_32)
 790     {
 791       /* 32 bit */
 792       sc->lmc_miireg16 |= LMC_MII16_SSI_CRC;
 793       sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
 794       sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
 795
 796     }
 797   else
 798     {
 799       /* 16 bit */
 800       sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC;
 801       sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
 802       sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
 803     }
 804
 805   lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
 806 }
 807
 808 /*
 809  * These are bits to program the ssi frequency generator
 810  */
 811 static inline void
 812 write_av9110_bit (lmc_softc_t * sc, int c)
 813 {
 814   /*
 815    * set the data bit as we need it.
 816    */
 817   sc->lmc_gpio &= ~(LMC_GEP_CLK);
 818   if (c & 0x01)
 819     sc->lmc_gpio |= LMC_GEP_DATA;
 820   else
 821     sc->lmc_gpio &= ~(LMC_GEP_DATA);
 822   LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 823
 824   /*
 825    * set the clock to high
 826    */
 827   sc->lmc_gpio |= LMC_GEP_CLK;
 828   LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 829
 830   /*
 831    * set the clock to low again.
 832    */
 833   sc->lmc_gpio &= ~(LMC_GEP_CLK);
 834   LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 835 }
 836
 837 static void write_av9110(lmc_softc_t *sc, u32 n, u32 m, u32 v, u32 x, u32 r)
 838 {
 839   int i;
 840
 841 #if 0
 842   printk (LMC_PRINTF_FMT ": speed %u, %d %d %d %d %d\n",
 843           LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r);
 844 #endif
 845
 846   sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR;
 847   sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK);
 848   LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 849
 850   /*
 851    * Set the TXCLOCK, GENERATOR, SERIAL, and SERIALCLK
 852    * as outputs.
 853    */
 854   lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK
 855                           | LMC_GEP_SSI_GENERATOR));
 856
 857   sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR);
 858   LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
 859
 860   /*
 861    * a shifting we will go...
 862    */
 863   for (i = 0; i < 7; i++)
 864     write_av9110_bit (sc, n >> i);
 865   for (i = 0; i < 7; i++)
 866     write_av9110_bit (sc, m >> i);
 867   for (i = 0; i < 1; i++)
 868     write_av9110_bit (sc, v >> i);
 869   for (i = 0; i < 2; i++)
 870     write_av9110_bit (sc, x >> i);
 871   for (i = 0; i < 2; i++)
 872     write_av9110_bit (sc, r >> i);
 873   for (i = 0; i < 5; i++)
 874     write_av9110_bit (sc, 0x17 >> i);
 875
 876   /*
 877    * stop driving serial-related signals
 878    */
 879   lmc_gpio_mkinput (sc,
 880                     (LMC_GEP_DATA | LMC_GEP_CLK
 881                      | LMC_GEP_SSI_GENERATOR));
 882 }
 883
 884 static void lmc_ssi_watchdog(lmc_softc_t * const sc)
 885 {
 886         u16 mii17 = lmc_mii_readreg(sc, 0, 17);
 887         if (((mii17 >> 3) & 7) == 7)
 888                 lmc_led_off(sc, LMC_MII16_LED2);
 889         else
 890                 lmc_led_on(sc, LMC_MII16_LED2);
 891 }
 892
 893 /*
 894  *  T1 methods
 895  */
 896
 897 /*
 898  * The framer regs are multiplexed through MII regs 17 & 18
 899  *  write the register address to MII reg 17 and the *  data to MII reg 18. */
 900 static void
 901 lmc_t1_write (lmc_softc_t * const sc, int a, int d)
 902 {
 903   lmc_mii_writereg (sc, 0, 17, a);
 904   lmc_mii_writereg (sc, 0, 18, d);
 905 }
 906
 907 /* Save a warning
 908 static int
 909 lmc_t1_read (lmc_softc_t * const sc, int a)
 910 {
 911   lmc_mii_writereg (sc, 0, 17, a);
 912   return lmc_mii_readreg (sc, 0, 18);
 913 }
 914 */
 915
 916
 917 static void
 918 lmc_t1_init (lmc_softc_t * const sc)
 919 {
 920   u16 mii16;
 921   int i;
 922
 923   sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200;
 924   mii16 = lmc_mii_readreg (sc, 0, 16);
 925
 926   /* reset 8370 */
 927   mii16 &= ~LMC_MII16_T1_RST;
 928   lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST);
 929   lmc_mii_writereg (sc, 0, 16, mii16);
 930
 931   /* set T1 or E1 line.  Uses sc->lmcmii16 reg in function so update it */
 932   sc->lmc_miireg16 = mii16;
 933   lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1);
 934   mii16 = sc->lmc_miireg16;
 935
 936   lmc_t1_write (sc, 0x01, 0x1B);        /* CR0     - primary control             */
 937   lmc_t1_write (sc, 0x02, 0x42);        /* JAT_CR  - jitter atten config         */
 938   lmc_t1_write (sc, 0x14, 0x00);        /* LOOP    - loopback config             */
 939   lmc_t1_write (sc, 0x15, 0x00);        /* DL3_TS  - external data link timeslot */
 940   lmc_t1_write (sc, 0x18, 0xFF);        /* PIO     - programmable I/O            */
 941   lmc_t1_write (sc, 0x19, 0x30);        /* POE     - programmable OE             */
 942   lmc_t1_write (sc, 0x1A, 0x0F);        /* CMUX    - clock input mux             */
 943   lmc_t1_write (sc, 0x20, 0x41);        /* LIU_CR  - RX LIU config               */
 944   lmc_t1_write (sc, 0x22, 0x76);        /* RLIU_CR - RX LIU config               */
 945   lmc_t1_write (sc, 0x40, 0x03);        /* RCR0    - RX config                   */
 946   lmc_t1_write (sc, 0x45, 0x00);        /* RALM    - RX alarm config             */
 947   lmc_t1_write (sc, 0x46, 0x05);        /* LATCH   - RX alarm/err/cntr latch     */
 948   lmc_t1_write (sc, 0x68, 0x40);        /* TLIU_CR - TX LIU config               */
 949   lmc_t1_write (sc, 0x70, 0x0D);        /* TCR0    - TX framer config            */
 950   lmc_t1_write (sc, 0x71, 0x05);        /* TCR1    - TX config                   */
 951   lmc_t1_write (sc, 0x72, 0x0B);        /* TFRM    - TX frame format             */
 952   lmc_t1_write (sc, 0x73, 0x00);        /* TERROR  - TX error insert             */
 953   lmc_t1_write (sc, 0x74, 0x00);        /* TMAN    - TX manual Sa/FEBE config    */
 954   lmc_t1_write (sc, 0x75, 0x00);        /* TALM    - TX alarm signal config      */
 955   lmc_t1_write (sc, 0x76, 0x00);        /* TPATT   - TX test pattern config      */
 956   lmc_t1_write (sc, 0x77, 0x00);        /* TLB     - TX inband loopback config   */
 957   lmc_t1_write (sc, 0x90, 0x05);        /* CLAD_CR - clock rate adapter config   */
 958   lmc_t1_write (sc, 0x91, 0x05);        /* CSEL    - clad freq sel               */
 959   lmc_t1_write (sc, 0xA6, 0x00);        /* DL1_CTL - DL1 control                 */
 960   lmc_t1_write (sc, 0xB1, 0x00);        /* DL2_CTL - DL2 control                 */
 961   lmc_t1_write (sc, 0xD0, 0x47);        /* SBI_CR  - sys bus iface config        */
 962   lmc_t1_write (sc, 0xD1, 0x70);        /* RSB_CR  - RX sys bus config           */
 963   lmc_t1_write (sc, 0xD4, 0x30);        /* TSB_CR  - TX sys bus config           */
 964   for (i = 0; i < 32; i++)
 965     {
 966       lmc_t1_write (sc, 0x0E0 + i, 0x00);       /* SBCn - sys bus per-channel ctl    */
 967       lmc_t1_write (sc, 0x100 + i, 0x00);       /* TPCn - TX per-channel ctl         */
 968       lmc_t1_write (sc, 0x180 + i, 0x00);       /* RPCn - RX per-channel ctl         */
 969     }
 970   for (i = 1; i < 25; i++)
 971     {
 972       lmc_t1_write (sc, 0x0E0 + i, 0x0D);       /* SBCn - sys bus per-channel ctl    */
 973     }
 974
 975   mii16 |= LMC_MII16_T1_XOE;
 976   lmc_mii_writereg (sc, 0, 16, mii16);
 977   sc->lmc_miireg16 = mii16;
 978 }
 979
 980 static void
 981 lmc_t1_default (lmc_softc_t * const sc)
 982 {
 983   sc->lmc_miireg16 = LMC_MII16_LED_ALL;
 984   sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
 985   sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
 986   sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
 987   /* Right now we can only clock from out internal source */
 988   sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
 989 }
 990 /* * Given a user provided state, set ourselves up to match it.  This will * always reset the card if needed.
 991  */
 992 static void
 993 lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
 994 {
 995   if (ctl == NULL)
 996     {
 997       sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type);
 998       lmc_set_protocol (sc, NULL);
 999
1000       return;
1001     }
1002   /*
1003    * check for change in circuit type         */
1004   if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1
1005       && sc->ictl.circuit_type ==
1006       LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc,
1007                                                                 LMC_CTL_CIRCUIT_TYPE_E1);
1008   else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1
1009            && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1)
1010     sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
1011   lmc_set_protocol (sc, ctl);
1012 }
1013 /*
1014  * return hardware link status.
1015  * 0 == link is down, 1 == link is up.
1016  */ static int
1017 lmc_t1_get_link_status (lmc_softc_t * const sc)
1018 {
1019     u16 link_status;
1020     int ret = 1;
1021
1022   /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
1023    * led0 yellow = far-end adapter is in Red alarm condition
1024    * led1 blue   = received an Alarm Indication signal
1025    *               (upstream failure)
1026    * led2 Green  = power to adapter, Gate Array loaded & driver
1027    *               attached
1028    * led3 red    = Loss of Signal (LOS) or out of frame (OOF)
1029    *               conditions detected on T3 receive signal
1030    */
1031     lmc_trace(sc->lmc_device, "lmc_t1_get_link_status in");
1032     lmc_led_on(sc, LMC_DS3_LED2);
1033
1034     lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS);
1035     link_status = lmc_mii_readreg (sc, 0, 18);
1036
1037
1038     if (link_status & T1F_RAIS) {                       /* turn on blue LED */
1039         ret = 0;
1040         if(sc->last_led_err[1] != 1){
1041             printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name);
1042         }
1043         lmc_led_on(sc, LMC_DS3_LED1);
1044         sc->last_led_err[1] = 1;
1045     }
1046     else {
1047         if(sc->last_led_err[1] != 0){
1048             printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name);
1049         }
1050         lmc_led_off (sc, LMC_DS3_LED1);
1051         sc->last_led_err[1] = 0;
1052     }
1053
1054     /*
1055      * Yellow Alarm is nasty evil stuff, looks at data patterns
1056      * inside the channel and confuses it with HDLC framing
1057      * ignore all yellow alarms.
1058      *
1059      * Do listen to MultiFrame Yellow alarm which while implemented
1060      * different ways isn't in the channel and hence somewhat
1061      * more reliable
1062      */
1063
1064     if (link_status & T1F_RMYEL) {
1065         ret = 0;
1066         if(sc->last_led_err[0] != 1){
1067             printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name);
1068         }
1069         lmc_led_on(sc, LMC_DS3_LED0);
1070         sc->last_led_err[0] = 1;
1071     }
1072     else {
1073         if(sc->last_led_err[0] != 0){
1074             printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name);
1075         }
1076         lmc_led_off(sc, LMC_DS3_LED0);
1077         sc->last_led_err[0] = 0;
1078     }
1079
1080     /*
1081      * Loss of signal and los of frame
1082      * Use the green bit to identify which one lit the led
1083      */
1084     if(link_status & T1F_RLOF){
1085         ret = 0;
1086         if(sc->last_led_err[3] != 1){
1087             printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name);
1088         }
1089         lmc_led_on(sc, LMC_DS3_LED3);
1090         sc->last_led_err[3] = 1;
1091
1092     }
1093     else {
1094         if(sc->last_led_err[3] != 0){
1095             printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name);
1096         }
1097         if( ! (link_status & T1F_RLOS))
1098             lmc_led_off(sc, LMC_DS3_LED3);
1099         sc->last_led_err[3] = 0;
1100     }
1101
1102     if(link_status & T1F_RLOS){
1103         ret = 0;
1104         if(sc->last_led_err[2] != 1){
1105             printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name);
1106         }
1107         lmc_led_on(sc, LMC_DS3_LED3);
1108         sc->last_led_err[2] = 1;
1109
1110     }
1111     else {
1112         if(sc->last_led_err[2] != 0){
1113             printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name);
1114         }
1115         if( ! (link_status & T1F_RLOF))
1116             lmc_led_off(sc, LMC_DS3_LED3);
1117         sc->last_led_err[2] = 0;
1118     }
1119
1120     sc->lmc_xinfo.t1_alarm1_status = link_status;
1121
1122     lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS);
1123     sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18);
1124
1125
1126     lmc_trace(sc->lmc_device, "lmc_t1_get_link_status out");
1127
1128     return ret;
1129 }
1130
1131 /*
1132  * 1 == T1 Circuit Type , 0 == E1 Circuit Type
1133  */
1134 static void
1135 lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie)
1136 {
1137   if (ie == LMC_CTL_CIRCUIT_TYPE_T1) {
1138       sc->lmc_miireg16 |= LMC_MII16_T1_Z;
1139       sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1;
1140       printk(KERN_INFO "%s: In T1 Mode\n", sc->name);
1141   }
1142   else {
1143       sc->lmc_miireg16 &= ~LMC_MII16_T1_Z;
1144       sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1;
1145       printk(KERN_INFO "%s: In E1 Mode\n", sc->name);
1146   }
1147
1148   lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1149
1150 }
1151
1152 /*
1153  * 0 == 16bit, 1 == 32bit */
1154 static void
1155 lmc_t1_set_crc_length (lmc_softc_t * const sc, int state)
1156 {
1157   if (state == LMC_CTL_CRC_LENGTH_32)
1158     {
1159       /* 32 bit */
1160       sc->lmc_miireg16 |= LMC_MII16_T1_CRC;
1161       sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
1162       sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
1163
1164     }
1165   else
1166     {
1167       /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC;
1168       sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
1169       sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
1170
1171     }
1172
1173   lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1174 }
1175
1176 /*
1177  * 1 == internal, 0 == external
1178  */
1179 static void
1180 lmc_t1_set_clock (lmc_softc_t * const sc, int ie)
1181 {
1182   int old;
1183   old = ie;
1184   if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
1185     {
1186       sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
1187       LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1188       sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
1189       if(old != ie)
1190         printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
1191     }
1192   else
1193     {
1194       sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
1195       LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1196       sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
1197       if(old != ie)
1198         printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
1199     }
1200 }
1201
1202 static void
1203 lmc_t1_watchdog (lmc_softc_t * const sc)
1204 {
1205 }
1206
1207 static void
1208 lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1209 {
1210         if (!ctl)
1211                 sc->ictl.keepalive_onoff = LMC_CTL_ON;
1212 }