x86/amd-iommu: Add function to complete a tlb flush
[linux/fpc-iii.git] / drivers / scsi / qla4xxx / ql4_mbx.c
blob09d6d4b76f39536512b3578142b26a1a0f27bcf8
1 /*
2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2006 QLogic Corporation
5 * See LICENSE.qla4xxx for copyright and licensing details.
6 */
8 #include "ql4_def.h"
9 #include "ql4_glbl.h"
10 #include "ql4_dbg.h"
11 #include "ql4_inline.h"
14 /**
15 * qla4xxx_mailbox_command - issues mailbox commands
16 * @ha: Pointer to host adapter structure.
17 * @inCount: number of mailbox registers to load.
18 * @outCount: number of mailbox registers to return.
19 * @mbx_cmd: data pointer for mailbox in registers.
20 * @mbx_sts: data pointer for mailbox out registers.
22 * This routine sssue mailbox commands and waits for completion.
23 * If outCount is 0, this routine completes successfully WITHOUT waiting
24 * for the mailbox command to complete.
25 **/
26 static int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
27 uint8_t outCount, uint32_t *mbx_cmd,
28 uint32_t *mbx_sts)
30 int status = QLA_ERROR;
31 uint8_t i;
32 u_long wait_count;
33 uint32_t intr_status;
34 unsigned long flags = 0;
36 /* Make sure that pointers are valid */
37 if (!mbx_cmd || !mbx_sts) {
38 DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
39 "pointer\n", ha->host_no, __func__));
40 return status;
42 /* Mailbox code active */
43 wait_count = MBOX_TOV * 100;
45 while (wait_count--) {
46 mutex_lock(&ha->mbox_sem);
47 if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
48 set_bit(AF_MBOX_COMMAND, &ha->flags);
49 mutex_unlock(&ha->mbox_sem);
50 break;
52 mutex_unlock(&ha->mbox_sem);
53 if (!wait_count) {
54 DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
55 ha->host_no, __func__));
56 return status;
58 msleep(10);
61 /* To prevent overwriting mailbox registers for a command that has
62 * not yet been serviced, check to see if a previously issued
63 * mailbox command is interrupting.
64 * -----------------------------------------------------------------
66 spin_lock_irqsave(&ha->hardware_lock, flags);
67 intr_status = readl(&ha->reg->ctrl_status);
68 if (intr_status & CSR_SCSI_PROCESSOR_INTR) {
69 /* Service existing interrupt */
70 qla4xxx_interrupt_service_routine(ha, intr_status);
71 clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
74 /* Send the mailbox command to the firmware */
75 ha->mbox_status_count = outCount;
76 for (i = 0; i < outCount; i++)
77 ha->mbox_status[i] = 0;
79 /* Load all mailbox registers, except mailbox 0. */
80 for (i = 1; i < inCount; i++)
81 writel(mbx_cmd[i], &ha->reg->mailbox[i]);
83 /* Wakeup firmware */
84 writel(mbx_cmd[0], &ha->reg->mailbox[0]);
85 readl(&ha->reg->mailbox[0]);
86 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
87 readl(&ha->reg->ctrl_status);
88 spin_unlock_irqrestore(&ha->hardware_lock, flags);
90 /* Wait for completion */
93 * If we don't want status, don't wait for the mailbox command to
94 * complete. For example, MBOX_CMD_RESET_FW doesn't return status,
95 * you must poll the inbound Interrupt Mask for completion.
97 if (outCount == 0) {
98 status = QLA_SUCCESS;
99 goto mbox_exit;
101 /* Wait for command to complete */
102 wait_count = jiffies + MBOX_TOV * HZ;
103 while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
104 if (time_after_eq(jiffies, wait_count))
105 break;
107 spin_lock_irqsave(&ha->hardware_lock, flags);
108 intr_status = readl(&ha->reg->ctrl_status);
109 if (intr_status & INTR_PENDING) {
111 * Service the interrupt.
112 * The ISR will save the mailbox status registers
113 * to a temporary storage location in the adapter
114 * structure.
116 ha->mbox_status_count = outCount;
117 qla4xxx_interrupt_service_routine(ha, intr_status);
119 spin_unlock_irqrestore(&ha->hardware_lock, flags);
120 msleep(10);
123 /* Check for mailbox timeout. */
124 if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
125 DEBUG2(printk("scsi%ld: Mailbox Cmd 0x%08X timed out ...,"
126 " Scheduling Adapter Reset\n", ha->host_no,
127 mbx_cmd[0]));
128 ha->mailbox_timeout_count++;
129 mbx_sts[0] = (-1);
130 set_bit(DPC_RESET_HA, &ha->dpc_flags);
131 goto mbox_exit;
135 * Copy the mailbox out registers to the caller's mailbox in/out
136 * structure.
138 spin_lock_irqsave(&ha->hardware_lock, flags);
139 for (i = 0; i < outCount; i++)
140 mbx_sts[i] = ha->mbox_status[i];
142 /* Set return status and error flags (if applicable). */
143 switch (ha->mbox_status[0]) {
144 case MBOX_STS_COMMAND_COMPLETE:
145 status = QLA_SUCCESS;
146 break;
148 case MBOX_STS_INTERMEDIATE_COMPLETION:
149 status = QLA_SUCCESS;
150 break;
152 case MBOX_STS_BUSY:
153 DEBUG2( printk("scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
154 ha->host_no, __func__, mbx_cmd[0]));
155 ha->mailbox_timeout_count++;
156 break;
158 default:
159 DEBUG2(printk("scsi%ld: %s: **** FAILED, cmd = %08X, "
160 "sts = %08X ****\n", ha->host_no, __func__,
161 mbx_cmd[0], mbx_sts[0]));
162 break;
164 spin_unlock_irqrestore(&ha->hardware_lock, flags);
166 mbox_exit:
167 mutex_lock(&ha->mbox_sem);
168 clear_bit(AF_MBOX_COMMAND, &ha->flags);
169 mutex_unlock(&ha->mbox_sem);
170 clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
172 return status;
176 * qla4xxx_initialize_fw_cb - initializes firmware control block.
177 * @ha: Pointer to host adapter structure.
179 int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
181 struct init_fw_ctrl_blk *init_fw_cb;
182 dma_addr_t init_fw_cb_dma;
183 uint32_t mbox_cmd[MBOX_REG_COUNT];
184 uint32_t mbox_sts[MBOX_REG_COUNT];
185 int status = QLA_ERROR;
187 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
188 sizeof(struct init_fw_ctrl_blk),
189 &init_fw_cb_dma, GFP_KERNEL);
190 if (init_fw_cb == NULL) {
191 DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
192 ha->host_no, __func__));
193 return 10;
195 memset(init_fw_cb, 0, sizeof(struct init_fw_ctrl_blk));
197 /* Get Initialize Firmware Control Block. */
198 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
199 memset(&mbox_sts, 0, sizeof(mbox_sts));
201 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
202 mbox_cmd[2] = LSDW(init_fw_cb_dma);
203 mbox_cmd[3] = MSDW(init_fw_cb_dma);
204 mbox_cmd[4] = sizeof(struct init_fw_ctrl_blk);
206 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
207 QLA_SUCCESS) {
208 dma_free_coherent(&ha->pdev->dev,
209 sizeof(struct init_fw_ctrl_blk),
210 init_fw_cb, init_fw_cb_dma);
211 return status;
214 /* Initialize request and response queues. */
215 qla4xxx_init_rings(ha);
217 /* Fill in the request and response queue information. */
218 init_fw_cb->pri.rqq_consumer_idx = cpu_to_le16(ha->request_out);
219 init_fw_cb->pri.compq_producer_idx = cpu_to_le16(ha->response_in);
220 init_fw_cb->pri.rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
221 init_fw_cb->pri.compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
222 init_fw_cb->pri.rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
223 init_fw_cb->pri.rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
224 init_fw_cb->pri.compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
225 init_fw_cb->pri.compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
226 init_fw_cb->pri.shdwreg_addr_lo =
227 cpu_to_le32(LSDW(ha->shadow_regs_dma));
228 init_fw_cb->pri.shdwreg_addr_hi =
229 cpu_to_le32(MSDW(ha->shadow_regs_dma));
231 /* Set up required options. */
232 init_fw_cb->pri.fw_options |=
233 __constant_cpu_to_le16(FWOPT_SESSION_MODE |
234 FWOPT_INITIATOR_MODE);
235 init_fw_cb->pri.fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
237 /* Save some info in adapter structure. */
238 ha->firmware_options = le16_to_cpu(init_fw_cb->pri.fw_options);
239 ha->tcp_options = le16_to_cpu(init_fw_cb->pri.ipv4_tcp_opts);
240 ha->heartbeat_interval = init_fw_cb->pri.hb_interval;
241 memcpy(ha->ip_address, init_fw_cb->pri.ipv4_addr,
242 min(sizeof(ha->ip_address), sizeof(init_fw_cb->pri.ipv4_addr)));
243 memcpy(ha->subnet_mask, init_fw_cb->pri.ipv4_subnet,
244 min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->pri.ipv4_subnet)));
245 memcpy(ha->gateway, init_fw_cb->pri.ipv4_gw_addr,
246 min(sizeof(ha->gateway), sizeof(init_fw_cb->pri.ipv4_gw_addr)));
247 memcpy(ha->name_string, init_fw_cb->pri.iscsi_name,
248 min(sizeof(ha->name_string),
249 sizeof(init_fw_cb->pri.iscsi_name)));
250 /*memcpy(ha->alias, init_fw_cb->Alias,
251 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
253 /* Save Command Line Paramater info */
254 ha->port_down_retry_count = le16_to_cpu(init_fw_cb->pri.conn_ka_timeout);
255 ha->discovery_wait = ql4xdiscoverywait;
257 /* Send Initialize Firmware Control Block. */
258 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
259 memset(&mbox_sts, 0, sizeof(mbox_sts));
261 mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
262 mbox_cmd[1] = 0;
263 mbox_cmd[2] = LSDW(init_fw_cb_dma);
264 mbox_cmd[3] = MSDW(init_fw_cb_dma);
265 mbox_cmd[4] = sizeof(struct init_fw_ctrl_blk);
267 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) ==
268 QLA_SUCCESS)
269 status = QLA_SUCCESS;
270 else {
271 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_INITIALIZE_FIRMWARE "
272 "failed w/ status %04X\n", ha->host_no, __func__,
273 mbox_sts[0]));
275 dma_free_coherent(&ha->pdev->dev, sizeof(struct init_fw_ctrl_blk),
276 init_fw_cb, init_fw_cb_dma);
278 return status;
282 * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
283 * @ha: Pointer to host adapter structure.
285 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
287 struct init_fw_ctrl_blk *init_fw_cb;
288 dma_addr_t init_fw_cb_dma;
289 uint32_t mbox_cmd[MBOX_REG_COUNT];
290 uint32_t mbox_sts[MBOX_REG_COUNT];
292 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
293 sizeof(struct init_fw_ctrl_blk),
294 &init_fw_cb_dma, GFP_KERNEL);
295 if (init_fw_cb == NULL) {
296 printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
297 __func__);
298 return 10;
301 /* Get Initialize Firmware Control Block. */
302 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
303 memset(&mbox_sts, 0, sizeof(mbox_sts));
305 memset(init_fw_cb, 0, sizeof(struct init_fw_ctrl_blk));
306 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
307 mbox_cmd[2] = LSDW(init_fw_cb_dma);
308 mbox_cmd[3] = MSDW(init_fw_cb_dma);
309 mbox_cmd[4] = sizeof(struct init_fw_ctrl_blk);
311 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
312 QLA_SUCCESS) {
313 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
314 ha->host_no, __func__));
315 dma_free_coherent(&ha->pdev->dev,
316 sizeof(struct init_fw_ctrl_blk),
317 init_fw_cb, init_fw_cb_dma);
318 return QLA_ERROR;
321 /* Save IP Address. */
322 memcpy(ha->ip_address, init_fw_cb->pri.ipv4_addr,
323 min(sizeof(ha->ip_address), sizeof(init_fw_cb->pri.ipv4_addr)));
324 memcpy(ha->subnet_mask, init_fw_cb->pri.ipv4_subnet,
325 min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->pri.ipv4_subnet)));
326 memcpy(ha->gateway, init_fw_cb->pri.ipv4_gw_addr,
327 min(sizeof(ha->gateway), sizeof(init_fw_cb->pri.ipv4_gw_addr)));
329 dma_free_coherent(&ha->pdev->dev, sizeof(struct init_fw_ctrl_blk),
330 init_fw_cb, init_fw_cb_dma);
332 return QLA_SUCCESS;
336 * qla4xxx_get_firmware_state - gets firmware state of HBA
337 * @ha: Pointer to host adapter structure.
339 int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
341 uint32_t mbox_cmd[MBOX_REG_COUNT];
342 uint32_t mbox_sts[MBOX_REG_COUNT];
344 /* Get firmware version */
345 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
346 memset(&mbox_sts, 0, sizeof(mbox_sts));
348 mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
350 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
351 QLA_SUCCESS) {
352 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
353 "status %04X\n", ha->host_no, __func__,
354 mbox_sts[0]));
355 return QLA_ERROR;
357 ha->firmware_state = mbox_sts[1];
358 ha->board_id = mbox_sts[2];
359 ha->addl_fw_state = mbox_sts[3];
360 DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
361 ha->host_no, __func__, ha->firmware_state);)
363 return QLA_SUCCESS;
367 * qla4xxx_get_firmware_status - retrieves firmware status
368 * @ha: Pointer to host adapter structure.
370 int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
372 uint32_t mbox_cmd[MBOX_REG_COUNT];
373 uint32_t mbox_sts[MBOX_REG_COUNT];
375 /* Get firmware version */
376 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
377 memset(&mbox_sts, 0, sizeof(mbox_sts));
379 mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
381 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
382 QLA_SUCCESS) {
383 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
384 "status %04X\n", ha->host_no, __func__,
385 mbox_sts[0]));
386 return QLA_ERROR;
388 return QLA_SUCCESS;
392 * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
393 * @ha: Pointer to host adapter structure.
394 * @fw_ddb_index: Firmware's device database index
395 * @fw_ddb_entry: Pointer to firmware's device database entry structure
396 * @num_valid_ddb_entries: Pointer to number of valid ddb entries
397 * @next_ddb_index: Pointer to next valid device database index
398 * @fw_ddb_device_state: Pointer to device state
400 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
401 uint16_t fw_ddb_index,
402 struct dev_db_entry *fw_ddb_entry,
403 dma_addr_t fw_ddb_entry_dma,
404 uint32_t *num_valid_ddb_entries,
405 uint32_t *next_ddb_index,
406 uint32_t *fw_ddb_device_state,
407 uint32_t *conn_err_detail,
408 uint16_t *tcp_source_port_num,
409 uint16_t *connection_id)
411 int status = QLA_ERROR;
412 uint32_t mbox_cmd[MBOX_REG_COUNT];
413 uint32_t mbox_sts[MBOX_REG_COUNT];
415 /* Make sure the device index is valid */
416 if (fw_ddb_index >= MAX_DDB_ENTRIES) {
417 DEBUG2(printk("scsi%ld: %s: index [%d] out of range.\n",
418 ha->host_no, __func__, fw_ddb_index));
419 goto exit_get_fwddb;
421 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
422 memset(&mbox_sts, 0, sizeof(mbox_sts));
424 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
425 mbox_cmd[1] = (uint32_t) fw_ddb_index;
426 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
427 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
428 mbox_cmd[4] = sizeof(struct dev_db_entry);
430 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
431 QLA_ERROR) {
432 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
433 " with status 0x%04X\n", ha->host_no, __func__,
434 mbox_sts[0]));
435 goto exit_get_fwddb;
437 if (fw_ddb_index != mbox_sts[1]) {
438 DEBUG2(printk("scsi%ld: %s: index mismatch [%d] != [%d].\n",
439 ha->host_no, __func__, fw_ddb_index,
440 mbox_sts[1]));
441 goto exit_get_fwddb;
443 if (fw_ddb_entry) {
444 dev_info(&ha->pdev->dev, "DDB[%d] MB0 %04x Tot %d Next %d "
445 "State %04x ConnErr %08x %d.%d.%d.%d:%04d \"%s\"\n",
446 fw_ddb_index, mbox_sts[0], mbox_sts[2], mbox_sts[3],
447 mbox_sts[4], mbox_sts[5], fw_ddb_entry->ip_addr[0],
448 fw_ddb_entry->ip_addr[1], fw_ddb_entry->ip_addr[2],
449 fw_ddb_entry->ip_addr[3],
450 le16_to_cpu(fw_ddb_entry->port),
451 fw_ddb_entry->iscsi_name);
453 if (num_valid_ddb_entries)
454 *num_valid_ddb_entries = mbox_sts[2];
455 if (next_ddb_index)
456 *next_ddb_index = mbox_sts[3];
457 if (fw_ddb_device_state)
458 *fw_ddb_device_state = mbox_sts[4];
461 * RA: This mailbox has been changed to pass connection error and
462 * details. Its true for ISP4010 as per Version E - Not sure when it
463 * was changed. Get the time2wait from the fw_dd_entry field :
464 * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
465 * struct.
467 if (conn_err_detail)
468 *conn_err_detail = mbox_sts[5];
469 if (tcp_source_port_num)
470 *tcp_source_port_num = (uint16_t) mbox_sts[6] >> 16;
471 if (connection_id)
472 *connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
473 status = QLA_SUCCESS;
475 exit_get_fwddb:
476 return status;
480 * qla4xxx_set_fwddb_entry - sets a ddb entry.
481 * @ha: Pointer to host adapter structure.
482 * @fw_ddb_index: Firmware's device database index
483 * @fw_ddb_entry: Pointer to firmware's ddb entry structure, or NULL.
485 * This routine initializes or updates the adapter's device database
486 * entry for the specified device. It also triggers a login for the
487 * specified device. Therefore, it may also be used as a secondary
488 * login routine when a NULL pointer is specified for the fw_ddb_entry.
490 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
491 dma_addr_t fw_ddb_entry_dma)
493 uint32_t mbox_cmd[MBOX_REG_COUNT];
494 uint32_t mbox_sts[MBOX_REG_COUNT];
496 /* Do not wait for completion. The firmware will send us an
497 * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
499 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
500 memset(&mbox_sts, 0, sizeof(mbox_sts));
502 mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
503 mbox_cmd[1] = (uint32_t) fw_ddb_index;
504 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
505 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
506 mbox_cmd[4] = sizeof(struct dev_db_entry);
508 return qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
512 * qla4xxx_get_crash_record - retrieves crash record.
513 * @ha: Pointer to host adapter structure.
515 * This routine retrieves a crash record from the QLA4010 after an 8002h aen.
517 void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
519 uint32_t mbox_cmd[MBOX_REG_COUNT];
520 uint32_t mbox_sts[MBOX_REG_COUNT];
521 struct crash_record *crash_record = NULL;
522 dma_addr_t crash_record_dma = 0;
523 uint32_t crash_record_size = 0;
525 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
526 memset(&mbox_sts, 0, sizeof(mbox_cmd));
528 /* Get size of crash record. */
529 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
531 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
532 QLA_SUCCESS) {
533 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
534 ha->host_no, __func__));
535 goto exit_get_crash_record;
537 crash_record_size = mbox_sts[4];
538 if (crash_record_size == 0) {
539 DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
540 ha->host_no, __func__));
541 goto exit_get_crash_record;
544 /* Alloc Memory for Crash Record. */
545 crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
546 &crash_record_dma, GFP_KERNEL);
547 if (crash_record == NULL)
548 goto exit_get_crash_record;
550 /* Get Crash Record. */
551 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
552 memset(&mbox_sts, 0, sizeof(mbox_cmd));
554 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
555 mbox_cmd[2] = LSDW(crash_record_dma);
556 mbox_cmd[3] = MSDW(crash_record_dma);
557 mbox_cmd[4] = crash_record_size;
559 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
560 QLA_SUCCESS)
561 goto exit_get_crash_record;
563 /* Dump Crash Record. */
565 exit_get_crash_record:
566 if (crash_record)
567 dma_free_coherent(&ha->pdev->dev, crash_record_size,
568 crash_record, crash_record_dma);
572 * qla4xxx_get_conn_event_log - retrieves connection event log
573 * @ha: Pointer to host adapter structure.
575 void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
577 uint32_t mbox_cmd[MBOX_REG_COUNT];
578 uint32_t mbox_sts[MBOX_REG_COUNT];
579 struct conn_event_log_entry *event_log = NULL;
580 dma_addr_t event_log_dma = 0;
581 uint32_t event_log_size = 0;
582 uint32_t num_valid_entries;
583 uint32_t oldest_entry = 0;
584 uint32_t max_event_log_entries;
585 uint8_t i;
588 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
589 memset(&mbox_sts, 0, sizeof(mbox_cmd));
591 /* Get size of crash record. */
592 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
594 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
595 QLA_SUCCESS)
596 goto exit_get_event_log;
598 event_log_size = mbox_sts[4];
599 if (event_log_size == 0)
600 goto exit_get_event_log;
602 /* Alloc Memory for Crash Record. */
603 event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
604 &event_log_dma, GFP_KERNEL);
605 if (event_log == NULL)
606 goto exit_get_event_log;
608 /* Get Crash Record. */
609 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
610 memset(&mbox_sts, 0, sizeof(mbox_cmd));
612 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
613 mbox_cmd[2] = LSDW(event_log_dma);
614 mbox_cmd[3] = MSDW(event_log_dma);
616 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
617 QLA_SUCCESS) {
618 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
619 "log!\n", ha->host_no, __func__));
620 goto exit_get_event_log;
623 /* Dump Event Log. */
624 num_valid_entries = mbox_sts[1];
626 max_event_log_entries = event_log_size /
627 sizeof(struct conn_event_log_entry);
629 if (num_valid_entries > max_event_log_entries)
630 oldest_entry = num_valid_entries % max_event_log_entries;
632 DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
633 ha->host_no, num_valid_entries));
635 if (ql4xextended_error_logging == 3) {
636 if (oldest_entry == 0) {
637 /* Circular Buffer has not wrapped around */
638 for (i=0; i < num_valid_entries; i++) {
639 qla4xxx_dump_buffer((uint8_t *)event_log+
640 (i*sizeof(*event_log)),
641 sizeof(*event_log));
644 else {
645 /* Circular Buffer has wrapped around -
646 * display accordingly*/
647 for (i=oldest_entry; i < max_event_log_entries; i++) {
648 qla4xxx_dump_buffer((uint8_t *)event_log+
649 (i*sizeof(*event_log)),
650 sizeof(*event_log));
652 for (i=0; i < oldest_entry; i++) {
653 qla4xxx_dump_buffer((uint8_t *)event_log+
654 (i*sizeof(*event_log)),
655 sizeof(*event_log));
660 exit_get_event_log:
661 if (event_log)
662 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
663 event_log_dma);
667 * qla4xxx_reset_lun - issues LUN Reset
668 * @ha: Pointer to host adapter structure.
669 * @db_entry: Pointer to device database entry
670 * @un_entry: Pointer to lun entry structure
672 * This routine performs a LUN RESET on the specified target/lun.
673 * The caller must ensure that the ddb_entry and lun_entry pointers
674 * are valid before calling this routine.
676 int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
677 int lun)
679 uint32_t mbox_cmd[MBOX_REG_COUNT];
680 uint32_t mbox_sts[MBOX_REG_COUNT];
681 int status = QLA_SUCCESS;
683 DEBUG2(printk("scsi%ld:%d:%d: lun reset issued\n", ha->host_no,
684 ddb_entry->os_target_id, lun));
687 * Send lun reset command to ISP, so that the ISP will return all
688 * outstanding requests with RESET status
690 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
691 memset(&mbox_sts, 0, sizeof(mbox_sts));
693 mbox_cmd[0] = MBOX_CMD_LUN_RESET;
694 mbox_cmd[1] = ddb_entry->fw_ddb_index;
695 mbox_cmd[2] = lun << 8;
696 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
698 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
699 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
700 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
701 status = QLA_ERROR;
703 return status;
707 * qla4xxx_reset_target - issues target Reset
708 * @ha: Pointer to host adapter structure.
709 * @db_entry: Pointer to device database entry
710 * @un_entry: Pointer to lun entry structure
712 * This routine performs a TARGET RESET on the specified target.
713 * The caller must ensure that the ddb_entry pointers
714 * are valid before calling this routine.
716 int qla4xxx_reset_target(struct scsi_qla_host *ha,
717 struct ddb_entry *ddb_entry)
719 uint32_t mbox_cmd[MBOX_REG_COUNT];
720 uint32_t mbox_sts[MBOX_REG_COUNT];
721 int status = QLA_SUCCESS;
723 DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
724 ddb_entry->os_target_id));
727 * Send target reset command to ISP, so that the ISP will return all
728 * outstanding requests with RESET status
730 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
731 memset(&mbox_sts, 0, sizeof(mbox_sts));
733 mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
734 mbox_cmd[1] = ddb_entry->fw_ddb_index;
735 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
737 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
738 &mbox_sts[0]);
739 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
740 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
741 status = QLA_ERROR;
743 return status;
746 int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
747 uint32_t offset, uint32_t len)
749 uint32_t mbox_cmd[MBOX_REG_COUNT];
750 uint32_t mbox_sts[MBOX_REG_COUNT];
752 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
753 memset(&mbox_sts, 0, sizeof(mbox_sts));
755 mbox_cmd[0] = MBOX_CMD_READ_FLASH;
756 mbox_cmd[1] = LSDW(dma_addr);
757 mbox_cmd[2] = MSDW(dma_addr);
758 mbox_cmd[3] = offset;
759 mbox_cmd[4] = len;
761 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
762 QLA_SUCCESS) {
763 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
764 "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
765 __func__, mbox_sts[0], mbox_sts[1], offset, len));
766 return QLA_ERROR;
768 return QLA_SUCCESS;
772 * qla4xxx_get_fw_version - gets firmware version
773 * @ha: Pointer to host adapter structure.
775 * Retrieves the firmware version on HBA. In QLA4010, mailboxes 2 & 3 may
776 * hold an address for data. Make sure that we write 0 to those mailboxes,
777 * if unused.
779 int qla4xxx_get_fw_version(struct scsi_qla_host * ha)
781 uint32_t mbox_cmd[MBOX_REG_COUNT];
782 uint32_t mbox_sts[MBOX_REG_COUNT];
784 /* Get firmware version. */
785 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
786 memset(&mbox_sts, 0, sizeof(mbox_sts));
788 mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
790 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
791 QLA_SUCCESS) {
792 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_ABOUT_FW failed w/ "
793 "status %04X\n", ha->host_no, __func__, mbox_sts[0]));
794 return QLA_ERROR;
797 /* Save firmware version information. */
798 ha->firmware_version[0] = mbox_sts[1];
799 ha->firmware_version[1] = mbox_sts[2];
800 ha->patch_number = mbox_sts[3];
801 ha->build_number = mbox_sts[4];
803 return QLA_SUCCESS;
806 static int qla4xxx_get_default_ddb(struct scsi_qla_host *ha,
807 dma_addr_t dma_addr)
809 uint32_t mbox_cmd[MBOX_REG_COUNT];
810 uint32_t mbox_sts[MBOX_REG_COUNT];
812 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
813 memset(&mbox_sts, 0, sizeof(mbox_sts));
815 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
816 mbox_cmd[2] = LSDW(dma_addr);
817 mbox_cmd[3] = MSDW(dma_addr);
819 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
820 QLA_SUCCESS) {
821 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
822 ha->host_no, __func__, mbox_sts[0]));
823 return QLA_ERROR;
825 return QLA_SUCCESS;
828 static int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t *ddb_index)
830 uint32_t mbox_cmd[MBOX_REG_COUNT];
831 uint32_t mbox_sts[MBOX_REG_COUNT];
833 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
834 memset(&mbox_sts, 0, sizeof(mbox_sts));
836 mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
837 mbox_cmd[1] = MAX_PRST_DEV_DB_ENTRIES;
839 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
840 QLA_SUCCESS) {
841 if (mbox_sts[0] == MBOX_STS_COMMAND_ERROR) {
842 *ddb_index = mbox_sts[2];
843 } else {
844 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
845 ha->host_no, __func__, mbox_sts[0]));
846 return QLA_ERROR;
848 } else {
849 *ddb_index = MAX_PRST_DEV_DB_ENTRIES;
852 return QLA_SUCCESS;
856 int qla4xxx_send_tgts(struct scsi_qla_host *ha, char *ip, uint16_t port)
858 struct dev_db_entry *fw_ddb_entry;
859 dma_addr_t fw_ddb_entry_dma;
860 uint32_t ddb_index;
861 int ret_val = QLA_SUCCESS;
864 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev,
865 sizeof(*fw_ddb_entry),
866 &fw_ddb_entry_dma, GFP_KERNEL);
867 if (!fw_ddb_entry) {
868 DEBUG2(printk("scsi%ld: %s: Unable to allocate dma buffer.\n",
869 ha->host_no, __func__));
870 ret_val = QLA_ERROR;
871 goto qla4xxx_send_tgts_exit;
874 ret_val = qla4xxx_get_default_ddb(ha, fw_ddb_entry_dma);
875 if (ret_val != QLA_SUCCESS)
876 goto qla4xxx_send_tgts_exit;
878 ret_val = qla4xxx_req_ddb_entry(ha, &ddb_index);
879 if (ret_val != QLA_SUCCESS)
880 goto qla4xxx_send_tgts_exit;
882 memset(fw_ddb_entry->iscsi_alias, 0,
883 sizeof(fw_ddb_entry->iscsi_alias));
885 memset(fw_ddb_entry->iscsi_name, 0,
886 sizeof(fw_ddb_entry->iscsi_name));
888 memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
889 memset(fw_ddb_entry->tgt_addr, 0,
890 sizeof(fw_ddb_entry->tgt_addr));
892 fw_ddb_entry->options = (DDB_OPT_DISC_SESSION | DDB_OPT_TARGET);
893 fw_ddb_entry->port = cpu_to_le16(ntohs(port));
895 fw_ddb_entry->ip_addr[0] = *ip;
896 fw_ddb_entry->ip_addr[1] = *(ip + 1);
897 fw_ddb_entry->ip_addr[2] = *(ip + 2);
898 fw_ddb_entry->ip_addr[3] = *(ip + 3);
900 ret_val = qla4xxx_set_ddb_entry(ha, ddb_index, fw_ddb_entry_dma);
902 qla4xxx_send_tgts_exit:
903 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
904 fw_ddb_entry, fw_ddb_entry_dma);
905 return ret_val;