x86/amd-iommu: Add function to complete a tlb flush
[linux/fpc-iii.git] / drivers / serial / 8250.h
blob6e19ea3e48d5fd851f6a0ef822d9f0302d58d06b
1 /*
2 * linux/drivers/char/8250.h
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
16 #include <linux/serial_8250.h>
18 struct old_serial_port {
19 unsigned int uart;
20 unsigned int baud_base;
21 unsigned int port;
22 unsigned int irq;
23 unsigned int flags;
24 unsigned char hub6;
25 unsigned char io_type;
26 unsigned char *iomem_base;
27 unsigned short iomem_reg_shift;
28 unsigned long irqflags;
32 * This replaces serial_uart_config in include/linux/serial.h
34 struct serial8250_config {
35 const char *name;
36 unsigned short fifo_size;
37 unsigned short tx_loadsz;
38 unsigned char fcr;
39 unsigned int flags;
42 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
43 #define UART_CAP_EFR (1 << 9) /* UART has EFR */
44 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
45 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
46 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
48 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
49 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
50 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
51 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
53 #define PROBE_RSA (1 << 0)
54 #define PROBE_ANY (~0)
56 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
58 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
59 #define SERIAL8250_SHARE_IRQS 1
60 #else
61 #define SERIAL8250_SHARE_IRQS 0
62 #endif
64 #if defined(__alpha__) && !defined(CONFIG_PCI)
66 * Digital did something really horribly wrong with the OUT1 and OUT2
67 * lines on at least some ALPHA's. The failure mode is that if either
68 * is cleared, the machine locks up with endless interrupts.
70 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
71 #elif defined(CONFIG_SBC8560)
73 * WindRiver did something similarly broken on their SBC8560 board. The
74 * UART tristates its IRQ output while OUT2 is clear, but they pulled
75 * the interrupt line _up_ instead of down, so if we register the IRQ
76 * while the UART is in that state, we die in an IRQ storm. */
77 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
78 #else
79 #define ALPHA_KLUDGE_MCR 0
80 #endif