x86/amd-iommu: Add function to complete a tlb flush
[linux/fpc-iii.git] / drivers / serial / atmel_serial.c
blob9d948bccafafa50bd13534ff330b6535cde29996
1 /*
2 * linux/drivers/char/atmel_serial.c
4 * Driver for Atmel AT91 / AT32 Serial ports
5 * Copyright (C) 2003 Rick Bronson
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 * DMA support added by Chip Coldwell.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/module.h>
28 #include <linux/tty.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/init.h>
32 #include <linux/serial.h>
33 #include <linux/clk.h>
34 #include <linux/console.h>
35 #include <linux/sysrq.h>
36 #include <linux/tty_flip.h>
37 #include <linux/platform_device.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/atmel_pdc.h>
40 #include <linux/atmel_serial.h>
42 #include <asm/io.h>
44 #include <asm/mach/serial_at91.h>
45 #include <mach/board.h>
47 #ifdef CONFIG_ARM
48 #include <mach/cpu.h>
49 #include <mach/gpio.h>
50 #endif
52 #define PDC_BUFFER_SIZE 512
53 /* Revisit: We should calculate this based on the actual port settings */
54 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
56 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
57 #define SUPPORT_SYSRQ
58 #endif
60 #include <linux/serial_core.h>
62 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
64 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
65 * should coexist with the 8250 driver, such as if we have an external 16C550
66 * UART. */
67 #define SERIAL_ATMEL_MAJOR 204
68 #define MINOR_START 154
69 #define ATMEL_DEVICENAME "ttyAT"
71 #else
73 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
74 * name, but it is legally reserved for the 8250 driver. */
75 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
76 #define MINOR_START 64
77 #define ATMEL_DEVICENAME "ttyS"
79 #endif
81 #define ATMEL_ISR_PASS_LIMIT 256
83 /* UART registers. CR is write-only, hence no GET macro */
84 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
85 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
86 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
87 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
88 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
89 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
90 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
91 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
92 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
93 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
94 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
95 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
97 /* PDC registers */
98 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
99 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
101 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
102 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
103 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
104 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
105 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
107 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
108 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
109 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
111 static int (*atmel_open_hook)(struct uart_port *);
112 static void (*atmel_close_hook)(struct uart_port *);
114 struct atmel_dma_buffer {
115 unsigned char *buf;
116 dma_addr_t dma_addr;
117 unsigned int dma_size;
118 unsigned int ofs;
121 struct atmel_uart_char {
122 u16 status;
123 u16 ch;
126 #define ATMEL_SERIAL_RINGSIZE 1024
129 * We wrap our port structure around the generic uart_port.
131 struct atmel_uart_port {
132 struct uart_port uart; /* uart */
133 struct clk *clk; /* uart clock */
134 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
135 u32 backup_imr; /* IMR saved during suspend */
136 int break_active; /* break being received */
138 short use_dma_rx; /* enable PDC receiver */
139 short pdc_rx_idx; /* current PDC RX buffer */
140 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
142 short use_dma_tx; /* enable PDC transmitter */
143 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
145 struct tasklet_struct tasklet;
146 unsigned int irq_status;
147 unsigned int irq_status_prev;
149 struct circ_buf rx_ring;
152 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
154 #ifdef SUPPORT_SYSRQ
155 static struct console atmel_console;
156 #endif
158 static inline struct atmel_uart_port *
159 to_atmel_uart_port(struct uart_port *uart)
161 return container_of(uart, struct atmel_uart_port, uart);
164 #ifdef CONFIG_SERIAL_ATMEL_PDC
165 static bool atmel_use_dma_rx(struct uart_port *port)
167 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
169 return atmel_port->use_dma_rx;
172 static bool atmel_use_dma_tx(struct uart_port *port)
174 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
176 return atmel_port->use_dma_tx;
178 #else
179 static bool atmel_use_dma_rx(struct uart_port *port)
181 return false;
184 static bool atmel_use_dma_tx(struct uart_port *port)
186 return false;
188 #endif
191 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
193 static u_int atmel_tx_empty(struct uart_port *port)
195 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
199 * Set state of the modem control output lines
201 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
203 unsigned int control = 0;
204 unsigned int mode;
206 #ifdef CONFIG_ARCH_AT91RM9200
207 if (cpu_is_at91rm9200()) {
209 * AT91RM9200 Errata #39: RTS0 is not internally connected
210 * to PA21. We need to drive the pin manually.
212 if (port->mapbase == AT91RM9200_BASE_US0) {
213 if (mctrl & TIOCM_RTS)
214 at91_set_gpio_value(AT91_PIN_PA21, 0);
215 else
216 at91_set_gpio_value(AT91_PIN_PA21, 1);
219 #endif
221 if (mctrl & TIOCM_RTS)
222 control |= ATMEL_US_RTSEN;
223 else
224 control |= ATMEL_US_RTSDIS;
226 if (mctrl & TIOCM_DTR)
227 control |= ATMEL_US_DTREN;
228 else
229 control |= ATMEL_US_DTRDIS;
231 UART_PUT_CR(port, control);
233 /* Local loopback mode? */
234 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
235 if (mctrl & TIOCM_LOOP)
236 mode |= ATMEL_US_CHMODE_LOC_LOOP;
237 else
238 mode |= ATMEL_US_CHMODE_NORMAL;
239 UART_PUT_MR(port, mode);
243 * Get state of the modem control input lines
245 static u_int atmel_get_mctrl(struct uart_port *port)
247 unsigned int status, ret = 0;
249 status = UART_GET_CSR(port);
252 * The control signals are active low.
254 if (!(status & ATMEL_US_DCD))
255 ret |= TIOCM_CD;
256 if (!(status & ATMEL_US_CTS))
257 ret |= TIOCM_CTS;
258 if (!(status & ATMEL_US_DSR))
259 ret |= TIOCM_DSR;
260 if (!(status & ATMEL_US_RI))
261 ret |= TIOCM_RI;
263 return ret;
267 * Stop transmitting.
269 static void atmel_stop_tx(struct uart_port *port)
271 if (atmel_use_dma_tx(port)) {
272 /* disable PDC transmit */
273 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
274 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
275 } else
276 UART_PUT_IDR(port, ATMEL_US_TXRDY);
280 * Start transmitting.
282 static void atmel_start_tx(struct uart_port *port)
284 if (atmel_use_dma_tx(port)) {
285 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
286 /* The transmitter is already running. Yes, we
287 really need this.*/
288 return;
290 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
291 /* re-enable PDC transmit */
292 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
293 } else
294 UART_PUT_IER(port, ATMEL_US_TXRDY);
298 * Stop receiving - port is in process of being closed.
300 static void atmel_stop_rx(struct uart_port *port)
302 if (atmel_use_dma_rx(port)) {
303 /* disable PDC receive */
304 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
305 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
306 } else
307 UART_PUT_IDR(port, ATMEL_US_RXRDY);
311 * Enable modem status interrupts
313 static void atmel_enable_ms(struct uart_port *port)
315 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
316 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
320 * Control the transmission of a break signal
322 static void atmel_break_ctl(struct uart_port *port, int break_state)
324 if (break_state != 0)
325 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
326 else
327 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
331 * Stores the incoming character in the ring buffer
333 static void
334 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
335 unsigned int ch)
337 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
338 struct circ_buf *ring = &atmel_port->rx_ring;
339 struct atmel_uart_char *c;
341 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
342 /* Buffer overflow, ignore char */
343 return;
345 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
346 c->status = status;
347 c->ch = ch;
349 /* Make sure the character is stored before we update head. */
350 smp_wmb();
352 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
356 * Deal with parity, framing and overrun errors.
358 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
360 /* clear error */
361 UART_PUT_CR(port, ATMEL_US_RSTSTA);
363 if (status & ATMEL_US_RXBRK) {
364 /* ignore side-effect */
365 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
366 port->icount.brk++;
368 if (status & ATMEL_US_PARE)
369 port->icount.parity++;
370 if (status & ATMEL_US_FRAME)
371 port->icount.frame++;
372 if (status & ATMEL_US_OVRE)
373 port->icount.overrun++;
377 * Characters received (called from interrupt handler)
379 static void atmel_rx_chars(struct uart_port *port)
381 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
382 unsigned int status, ch;
384 status = UART_GET_CSR(port);
385 while (status & ATMEL_US_RXRDY) {
386 ch = UART_GET_CHAR(port);
389 * note that the error handling code is
390 * out of the main execution path
392 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
393 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
394 || atmel_port->break_active)) {
396 /* clear error */
397 UART_PUT_CR(port, ATMEL_US_RSTSTA);
399 if (status & ATMEL_US_RXBRK
400 && !atmel_port->break_active) {
401 atmel_port->break_active = 1;
402 UART_PUT_IER(port, ATMEL_US_RXBRK);
403 } else {
405 * This is either the end-of-break
406 * condition or we've received at
407 * least one character without RXBRK
408 * being set. In both cases, the next
409 * RXBRK will indicate start-of-break.
411 UART_PUT_IDR(port, ATMEL_US_RXBRK);
412 status &= ~ATMEL_US_RXBRK;
413 atmel_port->break_active = 0;
417 atmel_buffer_rx_char(port, status, ch);
418 status = UART_GET_CSR(port);
421 tasklet_schedule(&atmel_port->tasklet);
425 * Transmit characters (called from tasklet with TXRDY interrupt
426 * disabled)
428 static void atmel_tx_chars(struct uart_port *port)
430 struct circ_buf *xmit = &port->state->xmit;
432 if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
433 UART_PUT_CHAR(port, port->x_char);
434 port->icount.tx++;
435 port->x_char = 0;
437 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
438 return;
440 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
441 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
442 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
443 port->icount.tx++;
444 if (uart_circ_empty(xmit))
445 break;
448 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
449 uart_write_wakeup(port);
451 if (!uart_circ_empty(xmit))
452 UART_PUT_IER(port, ATMEL_US_TXRDY);
456 * receive interrupt handler.
458 static void
459 atmel_handle_receive(struct uart_port *port, unsigned int pending)
461 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
463 if (atmel_use_dma_rx(port)) {
465 * PDC receive. Just schedule the tasklet and let it
466 * figure out the details.
468 * TODO: We're not handling error flags correctly at
469 * the moment.
471 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
472 UART_PUT_IDR(port, (ATMEL_US_ENDRX
473 | ATMEL_US_TIMEOUT));
474 tasklet_schedule(&atmel_port->tasklet);
477 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
478 ATMEL_US_FRAME | ATMEL_US_PARE))
479 atmel_pdc_rxerr(port, pending);
482 /* Interrupt receive */
483 if (pending & ATMEL_US_RXRDY)
484 atmel_rx_chars(port);
485 else if (pending & ATMEL_US_RXBRK) {
487 * End of break detected. If it came along with a
488 * character, atmel_rx_chars will handle it.
490 UART_PUT_CR(port, ATMEL_US_RSTSTA);
491 UART_PUT_IDR(port, ATMEL_US_RXBRK);
492 atmel_port->break_active = 0;
497 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
499 static void
500 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
502 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
504 if (atmel_use_dma_tx(port)) {
505 /* PDC transmit */
506 if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
507 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
508 tasklet_schedule(&atmel_port->tasklet);
510 } else {
511 /* Interrupt transmit */
512 if (pending & ATMEL_US_TXRDY) {
513 UART_PUT_IDR(port, ATMEL_US_TXRDY);
514 tasklet_schedule(&atmel_port->tasklet);
520 * status flags interrupt handler.
522 static void
523 atmel_handle_status(struct uart_port *port, unsigned int pending,
524 unsigned int status)
526 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
528 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
529 | ATMEL_US_CTSIC)) {
530 atmel_port->irq_status = status;
531 tasklet_schedule(&atmel_port->tasklet);
536 * Interrupt handler
538 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
540 struct uart_port *port = dev_id;
541 unsigned int status, pending, pass_counter = 0;
543 do {
544 status = UART_GET_CSR(port);
545 pending = status & UART_GET_IMR(port);
546 if (!pending)
547 break;
549 atmel_handle_receive(port, pending);
550 atmel_handle_status(port, pending, status);
551 atmel_handle_transmit(port, pending);
552 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
554 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
558 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
560 static void atmel_tx_dma(struct uart_port *port)
562 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
563 struct circ_buf *xmit = &port->state->xmit;
564 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
565 int count;
567 /* nothing left to transmit? */
568 if (UART_GET_TCR(port))
569 return;
571 xmit->tail += pdc->ofs;
572 xmit->tail &= UART_XMIT_SIZE - 1;
574 port->icount.tx += pdc->ofs;
575 pdc->ofs = 0;
577 /* more to transmit - setup next transfer */
579 /* disable PDC transmit */
580 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
582 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
583 dma_sync_single_for_device(port->dev,
584 pdc->dma_addr,
585 pdc->dma_size,
586 DMA_TO_DEVICE);
588 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
589 pdc->ofs = count;
591 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
592 UART_PUT_TCR(port, count);
593 /* re-enable PDC transmit and interrupts */
594 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
595 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
598 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
599 uart_write_wakeup(port);
602 static void atmel_rx_from_ring(struct uart_port *port)
604 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
605 struct circ_buf *ring = &atmel_port->rx_ring;
606 unsigned int flg;
607 unsigned int status;
609 while (ring->head != ring->tail) {
610 struct atmel_uart_char c;
612 /* Make sure c is loaded after head. */
613 smp_rmb();
615 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
617 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
619 port->icount.rx++;
620 status = c.status;
621 flg = TTY_NORMAL;
624 * note that the error handling code is
625 * out of the main execution path
627 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
628 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
629 if (status & ATMEL_US_RXBRK) {
630 /* ignore side-effect */
631 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
633 port->icount.brk++;
634 if (uart_handle_break(port))
635 continue;
637 if (status & ATMEL_US_PARE)
638 port->icount.parity++;
639 if (status & ATMEL_US_FRAME)
640 port->icount.frame++;
641 if (status & ATMEL_US_OVRE)
642 port->icount.overrun++;
644 status &= port->read_status_mask;
646 if (status & ATMEL_US_RXBRK)
647 flg = TTY_BREAK;
648 else if (status & ATMEL_US_PARE)
649 flg = TTY_PARITY;
650 else if (status & ATMEL_US_FRAME)
651 flg = TTY_FRAME;
655 if (uart_handle_sysrq_char(port, c.ch))
656 continue;
658 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
662 * Drop the lock here since it might end up calling
663 * uart_start(), which takes the lock.
665 spin_unlock(&port->lock);
666 tty_flip_buffer_push(port->state->port.tty);
667 spin_lock(&port->lock);
670 static void atmel_rx_from_dma(struct uart_port *port)
672 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
673 struct tty_struct *tty = port->state->port.tty;
674 struct atmel_dma_buffer *pdc;
675 int rx_idx = atmel_port->pdc_rx_idx;
676 unsigned int head;
677 unsigned int tail;
678 unsigned int count;
680 do {
681 /* Reset the UART timeout early so that we don't miss one */
682 UART_PUT_CR(port, ATMEL_US_STTTO);
684 pdc = &atmel_port->pdc_rx[rx_idx];
685 head = UART_GET_RPR(port) - pdc->dma_addr;
686 tail = pdc->ofs;
688 /* If the PDC has switched buffers, RPR won't contain
689 * any address within the current buffer. Since head
690 * is unsigned, we just need a one-way comparison to
691 * find out.
693 * In this case, we just need to consume the entire
694 * buffer and resubmit it for DMA. This will clear the
695 * ENDRX bit as well, so that we can safely re-enable
696 * all interrupts below.
698 head = min(head, pdc->dma_size);
700 if (likely(head != tail)) {
701 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
702 pdc->dma_size, DMA_FROM_DEVICE);
705 * head will only wrap around when we recycle
706 * the DMA buffer, and when that happens, we
707 * explicitly set tail to 0. So head will
708 * always be greater than tail.
710 count = head - tail;
712 tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
714 dma_sync_single_for_device(port->dev, pdc->dma_addr,
715 pdc->dma_size, DMA_FROM_DEVICE);
717 port->icount.rx += count;
718 pdc->ofs = head;
722 * If the current buffer is full, we need to check if
723 * the next one contains any additional data.
725 if (head >= pdc->dma_size) {
726 pdc->ofs = 0;
727 UART_PUT_RNPR(port, pdc->dma_addr);
728 UART_PUT_RNCR(port, pdc->dma_size);
730 rx_idx = !rx_idx;
731 atmel_port->pdc_rx_idx = rx_idx;
733 } while (head >= pdc->dma_size);
736 * Drop the lock here since it might end up calling
737 * uart_start(), which takes the lock.
739 spin_unlock(&port->lock);
740 tty_flip_buffer_push(tty);
741 spin_lock(&port->lock);
743 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
747 * tasklet handling tty stuff outside the interrupt handler.
749 static void atmel_tasklet_func(unsigned long data)
751 struct uart_port *port = (struct uart_port *)data;
752 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
753 unsigned int status;
754 unsigned int status_change;
756 /* The interrupt handler does not take the lock */
757 spin_lock(&port->lock);
759 if (atmel_use_dma_tx(port))
760 atmel_tx_dma(port);
761 else
762 atmel_tx_chars(port);
764 status = atmel_port->irq_status;
765 status_change = status ^ atmel_port->irq_status_prev;
767 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
768 | ATMEL_US_DCD | ATMEL_US_CTS)) {
769 /* TODO: All reads to CSR will clear these interrupts! */
770 if (status_change & ATMEL_US_RI)
771 port->icount.rng++;
772 if (status_change & ATMEL_US_DSR)
773 port->icount.dsr++;
774 if (status_change & ATMEL_US_DCD)
775 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
776 if (status_change & ATMEL_US_CTS)
777 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
779 wake_up_interruptible(&port->state->port.delta_msr_wait);
781 atmel_port->irq_status_prev = status;
784 if (atmel_use_dma_rx(port))
785 atmel_rx_from_dma(port);
786 else
787 atmel_rx_from_ring(port);
789 spin_unlock(&port->lock);
793 * Perform initialization and enable port for reception
795 static int atmel_startup(struct uart_port *port)
797 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
798 struct tty_struct *tty = port->state->port.tty;
799 int retval;
802 * Ensure that no interrupts are enabled otherwise when
803 * request_irq() is called we could get stuck trying to
804 * handle an unexpected interrupt
806 UART_PUT_IDR(port, -1);
809 * Allocate the IRQ
811 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
812 tty ? tty->name : "atmel_serial", port);
813 if (retval) {
814 printk("atmel_serial: atmel_startup - Can't get irq\n");
815 return retval;
819 * Initialize DMA (if necessary)
821 if (atmel_use_dma_rx(port)) {
822 int i;
824 for (i = 0; i < 2; i++) {
825 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
827 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
828 if (pdc->buf == NULL) {
829 if (i != 0) {
830 dma_unmap_single(port->dev,
831 atmel_port->pdc_rx[0].dma_addr,
832 PDC_BUFFER_SIZE,
833 DMA_FROM_DEVICE);
834 kfree(atmel_port->pdc_rx[0].buf);
836 free_irq(port->irq, port);
837 return -ENOMEM;
839 pdc->dma_addr = dma_map_single(port->dev,
840 pdc->buf,
841 PDC_BUFFER_SIZE,
842 DMA_FROM_DEVICE);
843 pdc->dma_size = PDC_BUFFER_SIZE;
844 pdc->ofs = 0;
847 atmel_port->pdc_rx_idx = 0;
849 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
850 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
852 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
853 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
855 if (atmel_use_dma_tx(port)) {
856 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
857 struct circ_buf *xmit = &port->state->xmit;
859 pdc->buf = xmit->buf;
860 pdc->dma_addr = dma_map_single(port->dev,
861 pdc->buf,
862 UART_XMIT_SIZE,
863 DMA_TO_DEVICE);
864 pdc->dma_size = UART_XMIT_SIZE;
865 pdc->ofs = 0;
869 * If there is a specific "open" function (to register
870 * control line interrupts)
872 if (atmel_open_hook) {
873 retval = atmel_open_hook(port);
874 if (retval) {
875 free_irq(port->irq, port);
876 return retval;
880 /* Save current CSR for comparison in atmel_tasklet_func() */
881 atmel_port->irq_status_prev = UART_GET_CSR(port);
882 atmel_port->irq_status = atmel_port->irq_status_prev;
885 * Finally, enable the serial port
887 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
888 /* enable xmit & rcvr */
889 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
891 if (atmel_use_dma_rx(port)) {
892 /* set UART timeout */
893 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
894 UART_PUT_CR(port, ATMEL_US_STTTO);
896 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
897 /* enable PDC controller */
898 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
899 } else {
900 /* enable receive only */
901 UART_PUT_IER(port, ATMEL_US_RXRDY);
904 return 0;
908 * Disable the port
910 static void atmel_shutdown(struct uart_port *port)
912 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
914 * Ensure everything is stopped.
916 atmel_stop_rx(port);
917 atmel_stop_tx(port);
920 * Shut-down the DMA.
922 if (atmel_use_dma_rx(port)) {
923 int i;
925 for (i = 0; i < 2; i++) {
926 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
928 dma_unmap_single(port->dev,
929 pdc->dma_addr,
930 pdc->dma_size,
931 DMA_FROM_DEVICE);
932 kfree(pdc->buf);
935 if (atmel_use_dma_tx(port)) {
936 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
938 dma_unmap_single(port->dev,
939 pdc->dma_addr,
940 pdc->dma_size,
941 DMA_TO_DEVICE);
945 * Disable all interrupts, port and break condition.
947 UART_PUT_CR(port, ATMEL_US_RSTSTA);
948 UART_PUT_IDR(port, -1);
951 * Free the interrupt
953 free_irq(port->irq, port);
956 * If there is a specific "close" function (to unregister
957 * control line interrupts)
959 if (atmel_close_hook)
960 atmel_close_hook(port);
964 * Flush any TX data submitted for DMA. Called when the TX circular
965 * buffer is reset.
967 static void atmel_flush_buffer(struct uart_port *port)
969 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
971 if (atmel_use_dma_tx(port)) {
972 UART_PUT_TCR(port, 0);
973 atmel_port->pdc_tx.ofs = 0;
978 * Power / Clock management.
980 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
981 unsigned int oldstate)
983 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
985 switch (state) {
986 case 0:
988 * Enable the peripheral clock for this serial port.
989 * This is called on uart_open() or a resume event.
991 clk_enable(atmel_port->clk);
993 /* re-enable interrupts if we disabled some on suspend */
994 UART_PUT_IER(port, atmel_port->backup_imr);
995 break;
996 case 3:
997 /* Back up the interrupt mask and disable all interrupts */
998 atmel_port->backup_imr = UART_GET_IMR(port);
999 UART_PUT_IDR(port, -1);
1002 * Disable the peripheral clock for this serial port.
1003 * This is called on uart_close() or a suspend event.
1005 clk_disable(atmel_port->clk);
1006 break;
1007 default:
1008 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
1013 * Change the port parameters
1015 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1016 struct ktermios *old)
1018 unsigned long flags;
1019 unsigned int mode, imr, quot, baud;
1021 /* Get current mode register */
1022 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1023 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1024 | ATMEL_US_USMODE);
1026 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1027 quot = uart_get_divisor(port, baud);
1029 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1030 quot /= 8;
1031 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1034 /* byte size */
1035 switch (termios->c_cflag & CSIZE) {
1036 case CS5:
1037 mode |= ATMEL_US_CHRL_5;
1038 break;
1039 case CS6:
1040 mode |= ATMEL_US_CHRL_6;
1041 break;
1042 case CS7:
1043 mode |= ATMEL_US_CHRL_7;
1044 break;
1045 default:
1046 mode |= ATMEL_US_CHRL_8;
1047 break;
1050 /* stop bits */
1051 if (termios->c_cflag & CSTOPB)
1052 mode |= ATMEL_US_NBSTOP_2;
1054 /* parity */
1055 if (termios->c_cflag & PARENB) {
1056 /* Mark or Space parity */
1057 if (termios->c_cflag & CMSPAR) {
1058 if (termios->c_cflag & PARODD)
1059 mode |= ATMEL_US_PAR_MARK;
1060 else
1061 mode |= ATMEL_US_PAR_SPACE;
1062 } else if (termios->c_cflag & PARODD)
1063 mode |= ATMEL_US_PAR_ODD;
1064 else
1065 mode |= ATMEL_US_PAR_EVEN;
1066 } else
1067 mode |= ATMEL_US_PAR_NONE;
1069 /* hardware handshake (RTS/CTS) */
1070 if (termios->c_cflag & CRTSCTS)
1071 mode |= ATMEL_US_USMODE_HWHS;
1072 else
1073 mode |= ATMEL_US_USMODE_NORMAL;
1075 spin_lock_irqsave(&port->lock, flags);
1077 port->read_status_mask = ATMEL_US_OVRE;
1078 if (termios->c_iflag & INPCK)
1079 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1080 if (termios->c_iflag & (BRKINT | PARMRK))
1081 port->read_status_mask |= ATMEL_US_RXBRK;
1083 if (atmel_use_dma_rx(port))
1084 /* need to enable error interrupts */
1085 UART_PUT_IER(port, port->read_status_mask);
1088 * Characters to ignore
1090 port->ignore_status_mask = 0;
1091 if (termios->c_iflag & IGNPAR)
1092 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1093 if (termios->c_iflag & IGNBRK) {
1094 port->ignore_status_mask |= ATMEL_US_RXBRK;
1096 * If we're ignoring parity and break indicators,
1097 * ignore overruns too (for real raw support).
1099 if (termios->c_iflag & IGNPAR)
1100 port->ignore_status_mask |= ATMEL_US_OVRE;
1102 /* TODO: Ignore all characters if CREAD is set.*/
1104 /* update the per-port timeout */
1105 uart_update_timeout(port, termios->c_cflag, baud);
1108 * save/disable interrupts. The tty layer will ensure that the
1109 * transmitter is empty if requested by the caller, so there's
1110 * no need to wait for it here.
1112 imr = UART_GET_IMR(port);
1113 UART_PUT_IDR(port, -1);
1115 /* disable receiver and transmitter */
1116 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1118 /* set the parity, stop bits and data size */
1119 UART_PUT_MR(port, mode);
1121 /* set the baud rate */
1122 UART_PUT_BRGR(port, quot);
1123 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1124 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1126 /* restore interrupts */
1127 UART_PUT_IER(port, imr);
1129 /* CTS flow-control and modem-status interrupts */
1130 if (UART_ENABLE_MS(port, termios->c_cflag))
1131 port->ops->enable_ms(port);
1133 spin_unlock_irqrestore(&port->lock, flags);
1137 * Return string describing the specified port
1139 static const char *atmel_type(struct uart_port *port)
1141 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1145 * Release the memory region(s) being used by 'port'.
1147 static void atmel_release_port(struct uart_port *port)
1149 struct platform_device *pdev = to_platform_device(port->dev);
1150 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1152 release_mem_region(port->mapbase, size);
1154 if (port->flags & UPF_IOREMAP) {
1155 iounmap(port->membase);
1156 port->membase = NULL;
1161 * Request the memory region(s) being used by 'port'.
1163 static int atmel_request_port(struct uart_port *port)
1165 struct platform_device *pdev = to_platform_device(port->dev);
1166 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1168 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1169 return -EBUSY;
1171 if (port->flags & UPF_IOREMAP) {
1172 port->membase = ioremap(port->mapbase, size);
1173 if (port->membase == NULL) {
1174 release_mem_region(port->mapbase, size);
1175 return -ENOMEM;
1179 return 0;
1183 * Configure/autoconfigure the port.
1185 static void atmel_config_port(struct uart_port *port, int flags)
1187 if (flags & UART_CONFIG_TYPE) {
1188 port->type = PORT_ATMEL;
1189 atmel_request_port(port);
1194 * Verify the new serial_struct (for TIOCSSERIAL).
1196 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1198 int ret = 0;
1199 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1200 ret = -EINVAL;
1201 if (port->irq != ser->irq)
1202 ret = -EINVAL;
1203 if (ser->io_type != SERIAL_IO_MEM)
1204 ret = -EINVAL;
1205 if (port->uartclk / 16 != ser->baud_base)
1206 ret = -EINVAL;
1207 if ((void *)port->mapbase != ser->iomem_base)
1208 ret = -EINVAL;
1209 if (port->iobase != ser->port)
1210 ret = -EINVAL;
1211 if (ser->hub6 != 0)
1212 ret = -EINVAL;
1213 return ret;
1216 static struct uart_ops atmel_pops = {
1217 .tx_empty = atmel_tx_empty,
1218 .set_mctrl = atmel_set_mctrl,
1219 .get_mctrl = atmel_get_mctrl,
1220 .stop_tx = atmel_stop_tx,
1221 .start_tx = atmel_start_tx,
1222 .stop_rx = atmel_stop_rx,
1223 .enable_ms = atmel_enable_ms,
1224 .break_ctl = atmel_break_ctl,
1225 .startup = atmel_startup,
1226 .shutdown = atmel_shutdown,
1227 .flush_buffer = atmel_flush_buffer,
1228 .set_termios = atmel_set_termios,
1229 .type = atmel_type,
1230 .release_port = atmel_release_port,
1231 .request_port = atmel_request_port,
1232 .config_port = atmel_config_port,
1233 .verify_port = atmel_verify_port,
1234 .pm = atmel_serial_pm,
1238 * Configure the port from the platform device resource info.
1240 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1241 struct platform_device *pdev)
1243 struct uart_port *port = &atmel_port->uart;
1244 struct atmel_uart_data *data = pdev->dev.platform_data;
1246 port->iotype = UPIO_MEM;
1247 port->flags = UPF_BOOT_AUTOCONF;
1248 port->ops = &atmel_pops;
1249 port->fifosize = 1;
1250 port->line = pdev->id;
1251 port->dev = &pdev->dev;
1253 port->mapbase = pdev->resource[0].start;
1254 port->irq = pdev->resource[1].start;
1256 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1257 (unsigned long)port);
1259 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1261 if (data->regs)
1262 /* Already mapped by setup code */
1263 port->membase = data->regs;
1264 else {
1265 port->flags |= UPF_IOREMAP;
1266 port->membase = NULL;
1269 /* for console, the clock could already be configured */
1270 if (!atmel_port->clk) {
1271 atmel_port->clk = clk_get(&pdev->dev, "usart");
1272 clk_enable(atmel_port->clk);
1273 port->uartclk = clk_get_rate(atmel_port->clk);
1274 clk_disable(atmel_port->clk);
1275 /* only enable clock when USART is in use */
1278 atmel_port->use_dma_rx = data->use_dma_rx;
1279 atmel_port->use_dma_tx = data->use_dma_tx;
1280 if (atmel_use_dma_tx(port))
1281 port->fifosize = PDC_BUFFER_SIZE;
1285 * Register board-specific modem-control line handlers.
1287 void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
1289 if (fns->enable_ms)
1290 atmel_pops.enable_ms = fns->enable_ms;
1291 if (fns->get_mctrl)
1292 atmel_pops.get_mctrl = fns->get_mctrl;
1293 if (fns->set_mctrl)
1294 atmel_pops.set_mctrl = fns->set_mctrl;
1295 atmel_open_hook = fns->open;
1296 atmel_close_hook = fns->close;
1297 atmel_pops.pm = fns->pm;
1298 atmel_pops.set_wake = fns->set_wake;
1301 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1302 static void atmel_console_putchar(struct uart_port *port, int ch)
1304 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1305 cpu_relax();
1306 UART_PUT_CHAR(port, ch);
1310 * Interrupts are disabled on entering
1312 static void atmel_console_write(struct console *co, const char *s, u_int count)
1314 struct uart_port *port = &atmel_ports[co->index].uart;
1315 unsigned int status, imr;
1316 unsigned int pdc_tx;
1319 * First, save IMR and then disable interrupts
1321 imr = UART_GET_IMR(port);
1322 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
1324 /* Store PDC transmit status and disable it */
1325 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
1326 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1328 uart_console_write(port, s, count, atmel_console_putchar);
1331 * Finally, wait for transmitter to become empty
1332 * and restore IMR
1334 do {
1335 status = UART_GET_CSR(port);
1336 } while (!(status & ATMEL_US_TXRDY));
1338 /* Restore PDC transmit status */
1339 if (pdc_tx)
1340 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1342 /* set interrupts back the way they were */
1343 UART_PUT_IER(port, imr);
1347 * If the port was already initialised (eg, by a boot loader),
1348 * try to determine the current setup.
1350 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1351 int *parity, int *bits)
1353 unsigned int mr, quot;
1356 * If the baud rate generator isn't running, the port wasn't
1357 * initialized by the boot loader.
1359 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
1360 if (!quot)
1361 return;
1363 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
1364 if (mr == ATMEL_US_CHRL_8)
1365 *bits = 8;
1366 else
1367 *bits = 7;
1369 mr = UART_GET_MR(port) & ATMEL_US_PAR;
1370 if (mr == ATMEL_US_PAR_EVEN)
1371 *parity = 'e';
1372 else if (mr == ATMEL_US_PAR_ODD)
1373 *parity = 'o';
1376 * The serial core only rounds down when matching this to a
1377 * supported baud rate. Make sure we don't end up slightly
1378 * lower than one of those, as it would make us fall through
1379 * to a much lower baud rate than we really want.
1381 *baud = port->uartclk / (16 * (quot - 1));
1384 static int __init atmel_console_setup(struct console *co, char *options)
1386 struct uart_port *port = &atmel_ports[co->index].uart;
1387 int baud = 115200;
1388 int bits = 8;
1389 int parity = 'n';
1390 int flow = 'n';
1392 if (port->membase == NULL) {
1393 /* Port not initialized yet - delay setup */
1394 return -ENODEV;
1397 clk_enable(atmel_ports[co->index].clk);
1399 UART_PUT_IDR(port, -1);
1400 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1401 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1403 if (options)
1404 uart_parse_options(options, &baud, &parity, &bits, &flow);
1405 else
1406 atmel_console_get_options(port, &baud, &parity, &bits);
1408 return uart_set_options(port, co, baud, parity, bits, flow);
1411 static struct uart_driver atmel_uart;
1413 static struct console atmel_console = {
1414 .name = ATMEL_DEVICENAME,
1415 .write = atmel_console_write,
1416 .device = uart_console_device,
1417 .setup = atmel_console_setup,
1418 .flags = CON_PRINTBUFFER,
1419 .index = -1,
1420 .data = &atmel_uart,
1423 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
1426 * Early console initialization (before VM subsystem initialized).
1428 static int __init atmel_console_init(void)
1430 if (atmel_default_console_device) {
1431 add_preferred_console(ATMEL_DEVICENAME,
1432 atmel_default_console_device->id, NULL);
1433 atmel_init_port(&atmel_ports[atmel_default_console_device->id],
1434 atmel_default_console_device);
1435 register_console(&atmel_console);
1438 return 0;
1441 console_initcall(atmel_console_init);
1444 * Late console initialization.
1446 static int __init atmel_late_console_init(void)
1448 if (atmel_default_console_device
1449 && !(atmel_console.flags & CON_ENABLED))
1450 register_console(&atmel_console);
1452 return 0;
1455 core_initcall(atmel_late_console_init);
1457 static inline bool atmel_is_console_port(struct uart_port *port)
1459 return port->cons && port->cons->index == port->line;
1462 #else
1463 #define ATMEL_CONSOLE_DEVICE NULL
1465 static inline bool atmel_is_console_port(struct uart_port *port)
1467 return false;
1469 #endif
1471 static struct uart_driver atmel_uart = {
1472 .owner = THIS_MODULE,
1473 .driver_name = "atmel_serial",
1474 .dev_name = ATMEL_DEVICENAME,
1475 .major = SERIAL_ATMEL_MAJOR,
1476 .minor = MINOR_START,
1477 .nr = ATMEL_MAX_UART,
1478 .cons = ATMEL_CONSOLE_DEVICE,
1481 #ifdef CONFIG_PM
1482 static bool atmel_serial_clk_will_stop(void)
1484 #ifdef CONFIG_ARCH_AT91
1485 return at91_suspend_entering_slow_clock();
1486 #else
1487 return false;
1488 #endif
1491 static int atmel_serial_suspend(struct platform_device *pdev,
1492 pm_message_t state)
1494 struct uart_port *port = platform_get_drvdata(pdev);
1495 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1497 if (atmel_is_console_port(port) && console_suspend_enabled) {
1498 /* Drain the TX shifter */
1499 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1500 cpu_relax();
1503 /* we can not wake up if we're running on slow clock */
1504 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
1505 if (atmel_serial_clk_will_stop())
1506 device_set_wakeup_enable(&pdev->dev, 0);
1508 uart_suspend_port(&atmel_uart, port);
1510 return 0;
1513 static int atmel_serial_resume(struct platform_device *pdev)
1515 struct uart_port *port = platform_get_drvdata(pdev);
1516 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1518 uart_resume_port(&atmel_uart, port);
1519 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
1521 return 0;
1523 #else
1524 #define atmel_serial_suspend NULL
1525 #define atmel_serial_resume NULL
1526 #endif
1528 static int __devinit atmel_serial_probe(struct platform_device *pdev)
1530 struct atmel_uart_port *port;
1531 void *data;
1532 int ret;
1534 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
1536 port = &atmel_ports[pdev->id];
1537 port->backup_imr = 0;
1539 atmel_init_port(port, pdev);
1541 if (!atmel_use_dma_rx(&port->uart)) {
1542 ret = -ENOMEM;
1543 data = kmalloc(sizeof(struct atmel_uart_char)
1544 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
1545 if (!data)
1546 goto err_alloc_ring;
1547 port->rx_ring.buf = data;
1550 ret = uart_add_one_port(&atmel_uart, &port->uart);
1551 if (ret)
1552 goto err_add_port;
1554 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1555 if (atmel_is_console_port(&port->uart)
1556 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
1558 * The serial core enabled the clock for us, so undo
1559 * the clk_enable() in atmel_console_setup()
1561 clk_disable(port->clk);
1563 #endif
1565 device_init_wakeup(&pdev->dev, 1);
1566 platform_set_drvdata(pdev, port);
1568 return 0;
1570 err_add_port:
1571 kfree(port->rx_ring.buf);
1572 port->rx_ring.buf = NULL;
1573 err_alloc_ring:
1574 if (!atmel_is_console_port(&port->uart)) {
1575 clk_put(port->clk);
1576 port->clk = NULL;
1579 return ret;
1582 static int __devexit atmel_serial_remove(struct platform_device *pdev)
1584 struct uart_port *port = platform_get_drvdata(pdev);
1585 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1586 int ret = 0;
1588 device_init_wakeup(&pdev->dev, 0);
1589 platform_set_drvdata(pdev, NULL);
1591 ret = uart_remove_one_port(&atmel_uart, port);
1593 tasklet_kill(&atmel_port->tasklet);
1594 kfree(atmel_port->rx_ring.buf);
1596 /* "port" is allocated statically, so we shouldn't free it */
1598 clk_put(atmel_port->clk);
1600 return ret;
1603 static struct platform_driver atmel_serial_driver = {
1604 .probe = atmel_serial_probe,
1605 .remove = __devexit_p(atmel_serial_remove),
1606 .suspend = atmel_serial_suspend,
1607 .resume = atmel_serial_resume,
1608 .driver = {
1609 .name = "atmel_usart",
1610 .owner = THIS_MODULE,
1614 static int __init atmel_serial_init(void)
1616 int ret;
1618 ret = uart_register_driver(&atmel_uart);
1619 if (ret)
1620 return ret;
1622 ret = platform_driver_register(&atmel_serial_driver);
1623 if (ret)
1624 uart_unregister_driver(&atmel_uart);
1626 return ret;
1629 static void __exit atmel_serial_exit(void)
1631 platform_driver_unregister(&atmel_serial_driver);
1632 uart_unregister_driver(&atmel_uart);
1635 module_init(atmel_serial_init);
1636 module_exit(atmel_serial_exit);
1638 MODULE_AUTHOR("Rick Bronson");
1639 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1640 MODULE_LICENSE("GPL");
1641 MODULE_ALIAS("platform:atmel_usart");