x86/amd-iommu: Add function to complete a tlb flush
[linux/fpc-iii.git] / drivers / staging / vt6655 / srom.h
blobba123ee61d24c206c5a0591cb172a3c74e5efdb0
1 /*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 * File: srom.h
22 * Purpose: Implement functions to access eeprom
24 * Author: Jerry Chen
26 * Date: Jan 29, 2003
30 #ifndef __SROM_H__
31 #define __SROM_H__
33 #include "ttype.h"
35 /*--------------------- Export Definitions -------------------------*/
37 #define EEP_MAX_CONTEXT_SIZE 256
39 #define CB_EEPROM_READBYTE_WAIT 900 //us
41 #define W_MAX_I2CRETRY 0x0fff
44 // Contents in the EEPROM
46 #define EEP_OFS_PAR 0x00 // physical address
47 #define EEP_OFS_ANTENNA 0x16
48 #define EEP_OFS_RADIOCTL 0x17
49 #define EEP_OFS_RFTYPE 0x1B // for select RF
50 #define EEP_OFS_MINCHANNEL 0x1C // Min Channel #
51 #define EEP_OFS_MAXCHANNEL 0x1D // Max Channel #
52 #define EEP_OFS_SIGNATURE 0x1E //
53 #define EEP_OFS_ZONETYPE 0x1F //
54 #define EEP_OFS_RFTABLE 0x20 // RF POWER TABLE
55 #define EEP_OFS_PWR_CCK 0x20
56 #define EEP_OFS_SETPT_CCK 0x21
57 #define EEP_OFS_PWR_OFDMG 0x23
58 #define EEP_OFS_SETPT_OFDMG 0x24
59 #define EEP_OFS_PWR_FORMULA_OST 0x26 //
60 #define EEP_OFS_MAJOR_VER 0x2E
61 #define EEP_OFS_MINOR_VER 0x2F
62 #define EEP_OFS_CCK_PWR_TBL 0x30
63 #define EEP_OFS_CCK_PWR_dBm 0x3F
64 #define EEP_OFS_OFDM_PWR_TBL 0x40
65 #define EEP_OFS_OFDM_PWR_dBm 0x4F
66 //{{ RobertYu: 20041124
67 #define EEP_OFS_SETPT_OFDMA 0x4E
68 #define EEP_OFS_OFDMA_PWR_TBL 0x50
69 //}}
70 #define EEP_OFS_OFDMA_PWR_dBm 0xD2
73 //----------need to remove --------------------
74 #define EEP_OFS_BBTAB_LEN 0x70 // BB Table Length
75 #define EEP_OFS_BBTAB_ADR 0x71 // BB Table Offset
76 #define EEP_OFS_CHECKSUM 0xFF // reserved area for baseband 28h ~ 78h
78 #define EEP_I2C_DEV_ID 0x50 // EEPROM device address on the I2C bus
82 // Bits in EEP_OFS_ANTENNA
84 #define EEP_ANTENNA_MAIN 0x01
85 #define EEP_ANTENNA_AUX 0x02
86 #define EEP_ANTINV 0x04
89 // Bits in EEP_OFS_RADIOCTL
91 #define EEP_RADIOCTL_ENABLE 0x80
92 #define EEP_RADIOCTL_INV 0x01
94 /*--------------------- Export Types ------------------------------*/
96 // AT24C02 eeprom contents
97 // 2048 bits = 256 bytes = 128 words
99 typedef struct tagSSromReg {
100 BYTE abyPAR[6]; // 0x00 (WORD)
102 WORD wSUB_VID; // 0x03 (WORD)
103 WORD wSUB_SID;
105 BYTE byBCFG0; // 0x05 (WORD)
106 BYTE byBCFG1;
108 BYTE byFCR0; // 0x06 (WORD)
109 BYTE byFCR1;
110 BYTE byPMC0; // 0x07 (WORD)
111 BYTE byPMC1;
112 BYTE byMAXLAT; // 0x08 (WORD)
113 BYTE byMINGNT;
114 BYTE byCFG0; // 0x09 (WORD)
115 BYTE byCFG1;
116 WORD wCISPTR; // 0x0A (WORD)
117 WORD wRsv0; // 0x0B (WORD)
118 WORD wRsv1; // 0x0C (WORD)
119 BYTE byBBPAIR; // 0x0D (WORD)
120 BYTE byRFTYPE;
121 BYTE byMinChannel; // 0x0E (WORD)
122 BYTE byMaxChannel;
123 BYTE bySignature; // 0x0F (WORD)
124 BYTE byCheckSum;
126 BYTE abyReserved0[96]; // 0x10 (WORD)
127 BYTE abyCIS[128]; // 0x80 (WORD)
128 } SSromReg, *PSSromReg;
130 /*--------------------- Export Macros ------------------------------*/
132 /*--------------------- Export Classes ----------------------------*/
134 /*--------------------- Export Variables --------------------------*/
136 /*--------------------- Export Functions --------------------------*/
138 BYTE SROMbyReadEmbedded(DWORD_PTR dwIoBase, BYTE byContntOffset);
139 BOOL SROMbWriteEmbedded(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byData);
141 void SROMvRegBitsOn(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits);
142 void SROMvRegBitsOff(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits);
144 BOOL SROMbIsRegBitsOn(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits);
145 BOOL SROMbIsRegBitsOff(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits);
147 void SROMvReadAllContents(DWORD_PTR dwIoBase, PBYTE pbyEepromRegs);
148 void SROMvWriteAllContents(DWORD_PTR dwIoBase, PBYTE pbyEepromRegs);
150 void SROMvReadEtherAddress(DWORD_PTR dwIoBase, PBYTE pbyEtherAddress);
151 void SROMvWriteEtherAddress(DWORD_PTR dwIoBase, PBYTE pbyEtherAddress);
153 VOID SROMvReadSubSysVenId(DWORD_PTR dwIoBase, PDWORD pdwSubSysVenId);
155 BOOL SROMbAutoLoad (DWORD_PTR dwIoBase);
157 #endif // __EEPROM_H__