x86/speculation: Use Indirect Branch Prediction Barrier in context switch
[linux/fpc-iii.git] / drivers / rpmsg / qcom_glink_smem.c
blob5cdaa5f8fb61e53392fc1c6ef9f109fffe622131
1 /*
2 * Copyright (c) 2016, Linaro Ltd
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/interrupt.h>
19 #include <linux/platform_device.h>
20 #include <linux/mfd/syscon.h>
21 #include <linux/slab.h>
22 #include <linux/rpmsg.h>
23 #include <linux/idr.h>
24 #include <linux/circ_buf.h>
25 #include <linux/soc/qcom/smem.h>
26 #include <linux/sizes.h>
27 #include <linux/delay.h>
28 #include <linux/regmap.h>
29 #include <linux/workqueue.h>
30 #include <linux/list.h>
32 #include <linux/delay.h>
33 #include <linux/rpmsg.h>
34 #include <linux/rpmsg/qcom_glink.h>
36 #include "qcom_glink_native.h"
38 #define FIFO_FULL_RESERVE 8
39 #define FIFO_ALIGNMENT 8
40 #define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
42 #define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR 478
43 #define SMEM_GLINK_NATIVE_XPRT_FIFO_0 479
44 #define SMEM_GLINK_NATIVE_XPRT_FIFO_1 480
46 struct glink_smem_pipe {
47 struct qcom_glink_pipe native;
49 __le32 *tail;
50 __le32 *head;
52 void *fifo;
54 int remote_pid;
57 #define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
59 static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
61 struct glink_smem_pipe *pipe = to_smem_pipe(np);
62 size_t len;
63 void *fifo;
64 u32 head;
65 u32 tail;
67 if (!pipe->fifo) {
68 fifo = qcom_smem_get(pipe->remote_pid,
69 SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
70 if (IS_ERR(fifo)) {
71 pr_err("failed to acquire RX fifo handle: %ld\n",
72 PTR_ERR(fifo));
73 return 0;
76 pipe->fifo = fifo;
77 pipe->native.length = len;
80 head = le32_to_cpu(*pipe->head);
81 tail = le32_to_cpu(*pipe->tail);
83 if (head < tail)
84 return pipe->native.length - tail + head;
85 else
86 return head - tail;
89 static void glink_smem_rx_peak(struct qcom_glink_pipe *np,
90 void *data, unsigned int offset, size_t count)
92 struct glink_smem_pipe *pipe = to_smem_pipe(np);
93 size_t len;
94 u32 tail;
96 tail = le32_to_cpu(*pipe->tail);
97 tail += offset;
98 if (tail >= pipe->native.length)
99 tail -= pipe->native.length;
101 len = min_t(size_t, count, pipe->native.length - tail);
102 if (len) {
103 __ioread32_copy(data, pipe->fifo + tail,
104 len / sizeof(u32));
107 if (len != count) {
108 __ioread32_copy(data + len, pipe->fifo,
109 (count - len) / sizeof(u32));
113 static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
114 size_t count)
116 struct glink_smem_pipe *pipe = to_smem_pipe(np);
117 u32 tail;
119 tail = le32_to_cpu(*pipe->tail);
121 tail += count;
122 if (tail > pipe->native.length)
123 tail -= pipe->native.length;
125 *pipe->tail = cpu_to_le32(tail);
128 static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np)
130 struct glink_smem_pipe *pipe = to_smem_pipe(np);
131 u32 head;
132 u32 tail;
133 u32 avail;
135 head = le32_to_cpu(*pipe->head);
136 tail = le32_to_cpu(*pipe->tail);
138 if (tail <= head)
139 avail = pipe->native.length - head + tail;
140 else
141 avail = tail - head;
143 if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
144 avail = 0;
145 else
146 avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;
148 return avail;
151 static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,
152 unsigned int head,
153 const void *data, size_t count)
155 size_t len;
157 len = min_t(size_t, count, pipe->native.length - head);
158 if (len)
159 memcpy(pipe->fifo + head, data, len);
161 if (len != count)
162 memcpy(pipe->fifo, data + len, count - len);
164 head += count;
165 if (head >= pipe->native.length)
166 head -= pipe->native.length;
168 return head;
171 static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
172 const void *hdr, size_t hlen,
173 const void *data, size_t dlen)
175 struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);
176 unsigned int head;
178 head = le32_to_cpu(*pipe->head);
180 head = glink_smem_tx_write_one(pipe, head, hdr, hlen);
181 head = glink_smem_tx_write_one(pipe, head, data, dlen);
183 /* Ensure head is always aligned to 8 bytes */
184 head = ALIGN(head, 8);
185 if (head >= pipe->native.length)
186 head -= pipe->native.length;
188 *pipe->head = cpu_to_le32(head);
191 static void qcom_glink_smem_release(struct device *dev)
193 kfree(dev);
196 struct qcom_glink *qcom_glink_smem_register(struct device *parent,
197 struct device_node *node)
199 struct glink_smem_pipe *rx_pipe;
200 struct glink_smem_pipe *tx_pipe;
201 struct qcom_glink *glink;
202 struct device *dev;
203 u32 remote_pid;
204 __le32 *descs;
205 size_t size;
206 int ret;
208 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
209 if (!dev)
210 return ERR_PTR(-ENOMEM);
212 dev->parent = parent;
213 dev->of_node = node;
214 dev->release = qcom_glink_smem_release;
215 dev_set_name(dev, "%s:%s", node->parent->name, node->name);
216 ret = device_register(dev);
217 if (ret) {
218 pr_err("failed to register glink edge\n");
219 return ERR_PTR(ret);
222 ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
223 &remote_pid);
224 if (ret) {
225 dev_err(dev, "failed to parse qcom,remote-pid\n");
226 goto err_put_dev;
229 rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
230 tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
231 if (!rx_pipe || !tx_pipe) {
232 ret = -ENOMEM;
233 goto err_put_dev;
236 ret = qcom_smem_alloc(remote_pid,
237 SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32);
238 if (ret && ret != -EEXIST) {
239 dev_err(dev, "failed to allocate glink descriptors\n");
240 goto err_put_dev;
243 descs = qcom_smem_get(remote_pid,
244 SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
245 if (IS_ERR(descs)) {
246 dev_err(dev, "failed to acquire xprt descriptor\n");
247 ret = PTR_ERR(descs);
248 goto err_put_dev;
251 if (size != 32) {
252 dev_err(dev, "glink descriptor of invalid size\n");
253 ret = -EINVAL;
254 goto err_put_dev;
257 tx_pipe->tail = &descs[0];
258 tx_pipe->head = &descs[1];
259 rx_pipe->tail = &descs[2];
260 rx_pipe->head = &descs[3];
262 ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
263 SZ_16K);
264 if (ret && ret != -EEXIST) {
265 dev_err(dev, "failed to allocate TX fifo\n");
266 goto err_put_dev;
269 tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
270 &tx_pipe->native.length);
271 if (IS_ERR(tx_pipe->fifo)) {
272 dev_err(dev, "failed to acquire TX fifo\n");
273 ret = PTR_ERR(tx_pipe->fifo);
274 goto err_put_dev;
277 rx_pipe->native.avail = glink_smem_rx_avail;
278 rx_pipe->native.peak = glink_smem_rx_peak;
279 rx_pipe->native.advance = glink_smem_rx_advance;
280 rx_pipe->remote_pid = remote_pid;
282 tx_pipe->native.avail = glink_smem_tx_avail;
283 tx_pipe->native.write = glink_smem_tx_write;
284 tx_pipe->remote_pid = remote_pid;
286 *rx_pipe->tail = 0;
287 *tx_pipe->head = 0;
289 glink = qcom_glink_native_probe(dev,
290 GLINK_FEATURE_INTENT_REUSE,
291 &rx_pipe->native, &tx_pipe->native,
292 false);
293 if (IS_ERR(glink)) {
294 ret = PTR_ERR(glink);
295 goto err_put_dev;
298 return glink;
300 err_put_dev:
301 put_device(dev);
303 return ERR_PTR(ret);
305 EXPORT_SYMBOL_GPL(qcom_glink_smem_register);
307 void qcom_glink_smem_unregister(struct qcom_glink *glink)
309 qcom_glink_native_remove(glink);
310 qcom_glink_native_unregister(glink);
312 EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister);
314 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
315 MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver");
316 MODULE_LICENSE("GPL v2");