powerpc: Delete __cpuinit usage from all users
[linux/fpc-iii.git] / arch / arm / mach-davinci / board-da830-evm.c
blob1332de8c52c99dce492c57612e778229ec6a64bd
1 /*
2 * TI DA830/OMAP L137 EVM board
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/console.h>
15 #include <linux/interrupt.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c.h>
19 #include <linux/i2c/pcf857x.h>
20 #include <linux/i2c/at24.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
29 #include <mach/cp_intc.h>
30 #include <mach/mux.h>
31 #include <linux/platform_data/mtd-davinci.h>
32 #include <mach/da8xx.h>
33 #include <linux/platform_data/usb-davinci.h>
34 #include <linux/platform_data/mtd-davinci-aemif.h>
35 #include <linux/platform_data/spi-davinci.h>
37 #define DA830_EVM_PHY_ID ""
39 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
41 #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
42 #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
44 static const short da830_evm_usb11_pins[] = {
45 DA830_GPIO1_15, DA830_GPIO2_4,
49 static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
51 static int da830_evm_usb_set_power(unsigned port, int on)
53 gpio_set_value(ON_BD_USB_DRV, on);
54 return 0;
57 static int da830_evm_usb_get_power(unsigned port)
59 return gpio_get_value(ON_BD_USB_DRV);
62 static int da830_evm_usb_get_oci(unsigned port)
64 return !gpio_get_value(ON_BD_USB_OVC);
67 static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
69 static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
71 int irq = gpio_to_irq(ON_BD_USB_OVC);
72 int error = 0;
74 if (handler != NULL) {
75 da830_evm_usb_ocic_handler = handler;
77 error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
78 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
79 "OHCI over-current indicator", NULL);
80 if (error)
81 printk(KERN_ERR "%s: could not request IRQ to watch "
82 "over-current indicator changes\n", __func__);
83 } else
84 free_irq(irq, NULL);
86 return error;
89 static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
90 .set_power = da830_evm_usb_set_power,
91 .get_power = da830_evm_usb_get_power,
92 .get_oci = da830_evm_usb_get_oci,
93 .ocic_notify = da830_evm_usb_ocic_notify,
95 /* TPS2065 switch @ 5V */
96 .potpgt = (3 + 1) / 2, /* 3 ms max */
99 static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
101 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
102 return IRQ_HANDLED;
105 static __init void da830_evm_usb_init(void)
107 u32 cfgchip2;
108 int ret;
111 * Set up USB clock/mode in the CFGCHIP2 register.
112 * FYI: CFGCHIP2 is 0x0000ef00 initially.
114 cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
116 /* USB2.0 PHY reference clock is 24 MHz */
117 cfgchip2 &= ~CFGCHIP2_REFFREQ;
118 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
121 * Select internal reference clock for USB 2.0 PHY
122 * and use it as a clock source for USB 1.1 PHY
123 * (this is the default setting anyway).
125 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
126 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
129 * We have to override VBUS/ID signals when MUSB is configured into the
130 * host-only mode -- ID pin will float if no cable is connected, so the
131 * controller won't be able to drive VBUS thinking that it's a B-device.
132 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
134 cfgchip2 &= ~CFGCHIP2_OTGMODE;
135 #ifdef CONFIG_USB_MUSB_HOST
136 cfgchip2 |= CFGCHIP2_FORCE_HOST;
137 #else
138 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
139 #endif
141 __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
143 /* USB_REFCLKIN is not used. */
144 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
145 if (ret)
146 pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
147 __func__, ret);
148 else {
150 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
151 * with the power on to power good time of 3 ms.
153 ret = da8xx_register_usb20(1000, 3);
154 if (ret)
155 pr_warning("%s: USB 2.0 registration failed: %d\n",
156 __func__, ret);
159 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
160 if (ret) {
161 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
162 __func__, ret);
163 return;
166 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
167 if (ret) {
168 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
169 "power control: %d\n", __func__, ret);
170 return;
172 gpio_direction_output(ON_BD_USB_DRV, 0);
174 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
175 if (ret) {
176 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
177 "over-current indicator: %d\n", __func__, ret);
178 return;
180 gpio_direction_input(ON_BD_USB_OVC);
182 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
183 if (ret)
184 pr_warning("%s: USB 1.1 registration failed: %d\n",
185 __func__, ret);
188 static struct davinci_uart_config da830_evm_uart_config __initdata = {
189 .enabled_uarts = 0x7,
192 static const short da830_evm_mcasp1_pins[] = {
193 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
194 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
195 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
196 DA830_AXR1_11,
200 static u8 da830_iis_serializer_direction[] = {
201 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
202 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
203 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
206 static struct snd_platform_data da830_evm_snd_data = {
207 .tx_dma_offset = 0x2000,
208 .rx_dma_offset = 0x2000,
209 .op_mode = DAVINCI_MCASP_IIS_MODE,
210 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
211 .tdm_slots = 2,
212 .serial_dir = da830_iis_serializer_direction,
213 .asp_chan_q = EVENTQ_0,
214 .version = MCASP_VERSION_2,
215 .txnumevt = 1,
216 .rxnumevt = 1,
220 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
222 static const short da830_evm_mmc_sd_pins[] = {
223 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
224 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
225 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
226 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
230 #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
231 #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
233 static int da830_evm_mmc_get_ro(int index)
235 return gpio_get_value(DA830_MMCSD_WP_PIN);
238 static int da830_evm_mmc_get_cd(int index)
240 return !gpio_get_value(DA830_MMCSD_CD_PIN);
243 static struct davinci_mmc_config da830_evm_mmc_config = {
244 .get_ro = da830_evm_mmc_get_ro,
245 .get_cd = da830_evm_mmc_get_cd,
246 .wires = 8,
247 .max_freq = 50000000,
248 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
251 static inline void da830_evm_init_mmc(void)
253 int ret;
255 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
256 if (ret) {
257 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
258 ret);
259 return;
262 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
263 if (ret) {
264 pr_warning("da830_evm_init: can not open GPIO %d\n",
265 DA830_MMCSD_WP_PIN);
266 return;
268 gpio_direction_input(DA830_MMCSD_WP_PIN);
270 ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
271 if (ret) {
272 pr_warning("da830_evm_init: can not open GPIO %d\n",
273 DA830_MMCSD_CD_PIN);
274 return;
276 gpio_direction_input(DA830_MMCSD_CD_PIN);
278 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
279 if (ret) {
280 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
281 ret);
282 gpio_free(DA830_MMCSD_WP_PIN);
287 * UI board NAND/NOR flashes only use 8-bit data bus.
289 static const short da830_evm_emif25_pins[] = {
290 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
291 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
292 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
293 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
294 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
295 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
296 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
300 #define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
302 #ifdef CONFIG_DA830_UI_NAND
303 static struct mtd_partition da830_evm_nand_partitions[] = {
304 /* bootloader (U-Boot, etc) in first sector */
305 [0] = {
306 .name = "bootloader",
307 .offset = 0,
308 .size = SZ_128K,
309 .mask_flags = MTD_WRITEABLE, /* force read-only */
311 /* bootloader params in the next sector */
312 [1] = {
313 .name = "params",
314 .offset = MTDPART_OFS_APPEND,
315 .size = SZ_128K,
316 .mask_flags = MTD_WRITEABLE, /* force read-only */
318 /* kernel */
319 [2] = {
320 .name = "kernel",
321 .offset = MTDPART_OFS_APPEND,
322 .size = SZ_2M,
323 .mask_flags = 0,
325 /* file system */
326 [3] = {
327 .name = "filesystem",
328 .offset = MTDPART_OFS_APPEND,
329 .size = MTDPART_SIZ_FULL,
330 .mask_flags = 0,
334 /* flash bbt decriptors */
335 static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
336 static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
338 static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
339 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
340 NAND_BBT_WRITE | NAND_BBT_2BIT |
341 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
342 .offs = 2,
343 .len = 4,
344 .veroffs = 16,
345 .maxblocks = 4,
346 .pattern = da830_evm_nand_bbt_pattern
349 static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
350 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
351 NAND_BBT_WRITE | NAND_BBT_2BIT |
352 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
353 .offs = 2,
354 .len = 4,
355 .veroffs = 16,
356 .maxblocks = 4,
357 .pattern = da830_evm_nand_mirror_pattern
360 static struct davinci_aemif_timing da830_evm_nandflash_timing = {
361 .wsetup = 24,
362 .wstrobe = 21,
363 .whold = 14,
364 .rsetup = 19,
365 .rstrobe = 50,
366 .rhold = 0,
367 .ta = 20,
370 static struct davinci_nand_pdata da830_evm_nand_pdata = {
371 .parts = da830_evm_nand_partitions,
372 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
373 .ecc_mode = NAND_ECC_HW,
374 .ecc_bits = 4,
375 .bbt_options = NAND_BBT_USE_FLASH,
376 .bbt_td = &da830_evm_nand_bbt_main_descr,
377 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
378 .timing = &da830_evm_nandflash_timing,
381 static struct resource da830_evm_nand_resources[] = {
382 [0] = { /* First memory resource is NAND I/O window */
383 .start = DA8XX_AEMIF_CS3_BASE,
384 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
385 .flags = IORESOURCE_MEM,
387 [1] = { /* Second memory resource is AEMIF control registers */
388 .start = DA8XX_AEMIF_CTL_BASE,
389 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
390 .flags = IORESOURCE_MEM,
394 static struct platform_device da830_evm_nand_device = {
395 .name = "davinci_nand",
396 .id = 1,
397 .dev = {
398 .platform_data = &da830_evm_nand_pdata,
400 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
401 .resource = da830_evm_nand_resources,
404 static inline void da830_evm_init_nand(int mux_mode)
406 int ret;
408 if (HAS_MMC) {
409 pr_warning("WARNING: both MMC/SD and NAND are "
410 "enabled, but they share AEMIF pins.\n"
411 "\tDisable MMC/SD for NAND support.\n");
412 return;
415 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
416 if (ret)
417 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
418 ret);
420 ret = platform_device_register(&da830_evm_nand_device);
421 if (ret)
422 pr_warning("da830_evm_init: NAND device not registered.\n");
424 gpio_direction_output(mux_mode, 1);
426 #else
427 static inline void da830_evm_init_nand(int mux_mode) { }
428 #endif
430 #ifdef CONFIG_DA830_UI_LCD
431 static inline void da830_evm_init_lcdc(int mux_mode)
433 int ret;
435 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
436 if (ret)
437 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
438 ret);
440 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
441 if (ret)
442 pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
444 gpio_direction_output(mux_mode, 0);
446 #else
447 static inline void da830_evm_init_lcdc(int mux_mode) { }
448 #endif
450 static struct at24_platform_data da830_evm_i2c_eeprom_info = {
451 .byte_len = SZ_256K / 8,
452 .page_size = 64,
453 .flags = AT24_FLAG_ADDR16,
454 .setup = davinci_get_mac_addr,
455 .context = (void *)0x7f00,
458 static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
459 int gpio, unsigned ngpio, void *context)
461 gpio_request(gpio + 6, "UI MUX_MODE");
463 /* Drive mux mode low to match the default without UI card */
464 gpio_direction_output(gpio + 6, 0);
466 da830_evm_init_lcdc(gpio + 6);
468 da830_evm_init_nand(gpio + 6);
470 return 0;
473 static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
474 unsigned ngpio, void *context)
476 gpio_free(gpio + 6);
477 return 0;
480 static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
481 .gpio_base = DAVINCI_N_GPIO,
482 .setup = da830_evm_ui_expander_setup,
483 .teardown = da830_evm_ui_expander_teardown,
486 static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
488 I2C_BOARD_INFO("24c256", 0x50),
489 .platform_data = &da830_evm_i2c_eeprom_info,
492 I2C_BOARD_INFO("tlv320aic3x", 0x18),
495 I2C_BOARD_INFO("pcf8574", 0x3f),
496 .platform_data = &da830_evm_ui_expander_info,
500 static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
501 .bus_freq = 100, /* kHz */
502 .bus_delay = 0, /* usec */
506 * The following EDMA channels/slots are not being used by drivers (for
507 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
508 * they are being reserved for codecs on the DSP side.
510 static const s16 da830_dma_rsv_chans[][2] = {
511 /* (offset, number) */
512 { 8, 2},
513 {12, 2},
514 {24, 4},
515 {30, 2},
516 {-1, -1}
519 static const s16 da830_dma_rsv_slots[][2] = {
520 /* (offset, number) */
521 { 8, 2},
522 {12, 2},
523 {24, 4},
524 {30, 26},
525 {-1, -1}
528 static struct edma_rsv_info da830_edma_rsv[] = {
530 .rsv_chans = da830_dma_rsv_chans,
531 .rsv_slots = da830_dma_rsv_slots,
535 static struct mtd_partition da830evm_spiflash_part[] = {
536 [0] = {
537 .name = "DSP-UBL",
538 .offset = 0,
539 .size = SZ_8K,
540 .mask_flags = MTD_WRITEABLE,
542 [1] = {
543 .name = "ARM-UBL",
544 .offset = MTDPART_OFS_APPEND,
545 .size = SZ_16K + SZ_8K,
546 .mask_flags = MTD_WRITEABLE,
548 [2] = {
549 .name = "U-Boot",
550 .offset = MTDPART_OFS_APPEND,
551 .size = SZ_256K - SZ_32K,
552 .mask_flags = MTD_WRITEABLE,
554 [3] = {
555 .name = "U-Boot-Environment",
556 .offset = MTDPART_OFS_APPEND,
557 .size = SZ_16K,
558 .mask_flags = 0,
560 [4] = {
561 .name = "Kernel",
562 .offset = MTDPART_OFS_APPEND,
563 .size = MTDPART_SIZ_FULL,
564 .mask_flags = 0,
568 static struct flash_platform_data da830evm_spiflash_data = {
569 .name = "m25p80",
570 .parts = da830evm_spiflash_part,
571 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
572 .type = "w25x32",
575 static struct davinci_spi_config da830evm_spiflash_cfg = {
576 .io_type = SPI_IO_TYPE_DMA,
577 .c2tdelay = 8,
578 .t2cdelay = 8,
581 static struct spi_board_info da830evm_spi_info[] = {
583 .modalias = "m25p80",
584 .platform_data = &da830evm_spiflash_data,
585 .controller_data = &da830evm_spiflash_cfg,
586 .mode = SPI_MODE_0,
587 .max_speed_hz = 30000000,
588 .bus_num = 0,
589 .chip_select = 0,
593 static __init void da830_evm_init(void)
595 struct davinci_soc_info *soc_info = &davinci_soc_info;
596 int ret;
598 ret = da830_register_edma(da830_edma_rsv);
599 if (ret)
600 pr_warning("da830_evm_init: edma registration failed: %d\n",
601 ret);
603 ret = davinci_cfg_reg_list(da830_i2c0_pins);
604 if (ret)
605 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
606 ret);
608 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
609 if (ret)
610 pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
611 ret);
613 da830_evm_usb_init();
615 soc_info->emac_pdata->rmii_en = 1;
616 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
618 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
619 if (ret)
620 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
621 ret);
623 ret = da8xx_register_emac();
624 if (ret)
625 pr_warning("da830_evm_init: emac registration failed: %d\n",
626 ret);
628 ret = da8xx_register_watchdog();
629 if (ret)
630 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
631 ret);
633 davinci_serial_init(&da830_evm_uart_config);
634 i2c_register_board_info(1, da830_evm_i2c_devices,
635 ARRAY_SIZE(da830_evm_i2c_devices));
637 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
638 if (ret)
639 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
640 ret);
642 da8xx_register_mcasp(1, &da830_evm_snd_data);
644 da830_evm_init_mmc();
646 ret = da8xx_register_rtc();
647 if (ret)
648 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
650 ret = spi_register_board_info(da830evm_spi_info,
651 ARRAY_SIZE(da830evm_spi_info));
652 if (ret)
653 pr_warn("%s: spi info registration failed: %d\n", __func__,
654 ret);
656 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
657 if (ret)
658 pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
659 ret);
662 #ifdef CONFIG_SERIAL_8250_CONSOLE
663 static int __init da830_evm_console_init(void)
665 if (!machine_is_davinci_da830_evm())
666 return 0;
668 return add_preferred_console("ttyS", 2, "115200");
670 console_initcall(da830_evm_console_init);
671 #endif
673 static void __init da830_evm_map_io(void)
675 da830_init();
678 MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
679 .atag_offset = 0x100,
680 .map_io = da830_evm_map_io,
681 .init_irq = cp_intc_init,
682 .init_time = davinci_timer_init,
683 .init_machine = da830_evm_init,
684 .init_late = davinci_init_late,
685 .dma_zone_size = SZ_128M,
686 .restart = da8xx_restart,
687 MACHINE_END