powerpc: Delete __cpuinit usage from all users
[linux/fpc-iii.git] / arch / arm / mach-davinci / board-dm646x-evm.c
blobfbb8e5ab1dc19bbd56e3508a5505929bb6c71406
1 /*
2 * TI DaVinci DM646X EVM board
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
7 * (C) 2007-2008, MontaVista Software, Inc.
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
15 /**************************************************************************
16 * Included Files
17 **************************************************************************/
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c/at24.h>
26 #include <linux/i2c/pcf857x.h>
28 #include <media/tvp514x.h>
29 #include <media/adv7343.h>
31 #include <linux/mtd/mtd.h>
32 #include <linux/mtd/nand.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/clk.h>
35 #include <linux/export.h>
37 #include <asm/mach-types.h>
38 #include <asm/mach/arch.h>
40 #include <mach/common.h>
41 #include <mach/serial.h>
42 #include <linux/platform_data/i2c-davinci.h>
43 #include <linux/platform_data/mtd-davinci.h>
44 #include <mach/clock.h>
45 #include <mach/cdce949.h>
46 #include <linux/platform_data/mtd-davinci-aemif.h>
48 #include "davinci.h"
49 #include "clock.h"
51 #define NAND_BLOCK_SIZE SZ_128K
53 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
54 * and U-Boot environment this avoids dependency on any particular combination
55 * of UBL, U-Boot or flashing tools etc.
57 static struct mtd_partition davinci_nand_partitions[] = {
59 /* UBL, U-Boot with environment */
60 .name = "bootloader",
61 .offset = MTDPART_OFS_APPEND,
62 .size = 16 * NAND_BLOCK_SIZE,
63 .mask_flags = MTD_WRITEABLE, /* force read-only */
64 }, {
65 .name = "kernel",
66 .offset = MTDPART_OFS_APPEND,
67 .size = SZ_4M,
68 .mask_flags = 0,
69 }, {
70 .name = "filesystem",
71 .offset = MTDPART_OFS_APPEND,
72 .size = MTDPART_SIZ_FULL,
73 .mask_flags = 0,
77 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
78 .wsetup = 29,
79 .wstrobe = 24,
80 .whold = 14,
81 .rsetup = 19,
82 .rstrobe = 33,
83 .rhold = 0,
84 .ta = 29,
87 static struct davinci_nand_pdata davinci_nand_data = {
88 .mask_cle = 0x80000,
89 .mask_ale = 0x40000,
90 .parts = davinci_nand_partitions,
91 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
92 .ecc_mode = NAND_ECC_HW,
93 .options = 0,
96 static struct resource davinci_nand_resources[] = {
98 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
99 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
103 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
104 .flags = IORESOURCE_MEM,
108 static struct platform_device davinci_nand_device = {
109 .name = "davinci_nand",
110 .id = 0,
112 .num_resources = ARRAY_SIZE(davinci_nand_resources),
113 .resource = davinci_nand_resources,
115 .dev = {
116 .platform_data = &davinci_nand_data,
120 #define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
122 /* CPLD Register 0 bits to control ATA */
123 #define DM646X_EVM_ATA_RST BIT(0)
124 #define DM646X_EVM_ATA_PWD BIT(1)
126 /* CPLD Register 0 Client: used for I/O Control */
127 static int cpld_reg0_probe(struct i2c_client *client,
128 const struct i2c_device_id *id)
130 if (HAS_ATA) {
131 u8 data;
132 struct i2c_msg msg[2] = {
134 .addr = client->addr,
135 .flags = I2C_M_RD,
136 .len = 1,
137 .buf = &data,
140 .addr = client->addr,
141 .flags = 0,
142 .len = 1,
143 .buf = &data,
147 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
148 i2c_transfer(client->adapter, msg, 1);
149 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
150 i2c_transfer(client->adapter, msg + 1, 1);
153 return 0;
156 static const struct i2c_device_id cpld_reg_ids[] = {
157 { "cpld_reg0", 0, },
158 { },
161 static struct i2c_driver dm6467evm_cpld_driver = {
162 .driver.name = "cpld_reg0",
163 .id_table = cpld_reg_ids,
164 .probe = cpld_reg0_probe,
167 /* LEDS */
169 static struct gpio_led evm_leds[] = {
170 { .name = "DS1", .active_low = 1, },
171 { .name = "DS2", .active_low = 1, },
172 { .name = "DS3", .active_low = 1, },
173 { .name = "DS4", .active_low = 1, },
176 static const struct gpio_led_platform_data evm_led_data = {
177 .num_leds = ARRAY_SIZE(evm_leds),
178 .leds = evm_leds,
181 static struct platform_device *evm_led_dev;
183 static int evm_led_setup(struct i2c_client *client, int gpio,
184 unsigned int ngpio, void *c)
186 struct gpio_led *leds = evm_leds;
187 int status;
189 while (ngpio--) {
190 leds->gpio = gpio++;
191 leds++;
194 evm_led_dev = platform_device_alloc("leds-gpio", 0);
195 platform_device_add_data(evm_led_dev, &evm_led_data,
196 sizeof(evm_led_data));
198 evm_led_dev->dev.parent = &client->dev;
199 status = platform_device_add(evm_led_dev);
200 if (status < 0) {
201 platform_device_put(evm_led_dev);
202 evm_led_dev = NULL;
204 return status;
207 static int evm_led_teardown(struct i2c_client *client, int gpio,
208 unsigned ngpio, void *c)
210 if (evm_led_dev) {
211 platform_device_unregister(evm_led_dev);
212 evm_led_dev = NULL;
214 return 0;
217 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
219 static int evm_sw_setup(struct i2c_client *client, int gpio,
220 unsigned ngpio, void *c)
222 int status;
223 int i;
224 char label[10];
226 for (i = 0; i < 4; ++i) {
227 snprintf(label, 10, "user_sw%d", i);
228 status = gpio_request(gpio, label);
229 if (status)
230 goto out_free;
231 evm_sw_gpio[i] = gpio++;
233 status = gpio_direction_input(evm_sw_gpio[i]);
234 if (status) {
235 gpio_free(evm_sw_gpio[i]);
236 evm_sw_gpio[i] = -EINVAL;
237 goto out_free;
240 status = gpio_export(evm_sw_gpio[i], 0);
241 if (status) {
242 gpio_free(evm_sw_gpio[i]);
243 evm_sw_gpio[i] = -EINVAL;
244 goto out_free;
247 return status;
248 out_free:
249 for (i = 0; i < 4; ++i) {
250 if (evm_sw_gpio[i] != -EINVAL) {
251 gpio_free(evm_sw_gpio[i]);
252 evm_sw_gpio[i] = -EINVAL;
255 return status;
258 static int evm_sw_teardown(struct i2c_client *client, int gpio,
259 unsigned ngpio, void *c)
261 int i;
263 for (i = 0; i < 4; ++i) {
264 if (evm_sw_gpio[i] != -EINVAL) {
265 gpio_unexport(evm_sw_gpio[i]);
266 gpio_free(evm_sw_gpio[i]);
267 evm_sw_gpio[i] = -EINVAL;
270 return 0;
273 static int evm_pcf_setup(struct i2c_client *client, int gpio,
274 unsigned int ngpio, void *c)
276 int status;
278 if (ngpio < 8)
279 return -EINVAL;
281 status = evm_sw_setup(client, gpio, 4, c);
282 if (status)
283 return status;
285 return evm_led_setup(client, gpio+4, 4, c);
288 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
289 unsigned int ngpio, void *c)
291 BUG_ON(ngpio < 8);
293 evm_sw_teardown(client, gpio, 4, c);
294 evm_led_teardown(client, gpio+4, 4, c);
296 return 0;
299 static struct pcf857x_platform_data pcf_data = {
300 .gpio_base = DAVINCI_N_GPIO+1,
301 .setup = evm_pcf_setup,
302 .teardown = evm_pcf_teardown,
305 /* Most of this EEPROM is unused, but U-Boot uses some data:
306 * - 0x7f00, 6 bytes Ethernet Address
307 * - ... newer boards may have more
310 static struct at24_platform_data eeprom_info = {
311 .byte_len = (256*1024) / 8,
312 .page_size = 64,
313 .flags = AT24_FLAG_ADDR16,
314 .setup = davinci_get_mac_addr,
315 .context = (void *)0x7f00,
318 static u8 dm646x_iis_serializer_direction[] = {
319 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
322 static u8 dm646x_dit_serializer_direction[] = {
323 TX_MODE,
326 static struct snd_platform_data dm646x_evm_snd_data[] = {
328 .tx_dma_offset = 0x400,
329 .rx_dma_offset = 0x400,
330 .op_mode = DAVINCI_MCASP_IIS_MODE,
331 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
332 .tdm_slots = 2,
333 .serial_dir = dm646x_iis_serializer_direction,
334 .asp_chan_q = EVENTQ_0,
337 .tx_dma_offset = 0x400,
338 .rx_dma_offset = 0,
339 .op_mode = DAVINCI_MCASP_DIT_MODE,
340 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
341 .tdm_slots = 32,
342 .serial_dir = dm646x_dit_serializer_direction,
343 .asp_chan_q = EVENTQ_0,
347 static struct i2c_client *cpld_client;
349 static int cpld_video_probe(struct i2c_client *client,
350 const struct i2c_device_id *id)
352 cpld_client = client;
353 return 0;
356 static int cpld_video_remove(struct i2c_client *client)
358 cpld_client = NULL;
359 return 0;
362 static const struct i2c_device_id cpld_video_id[] = {
363 { "cpld_video", 0 },
367 static struct i2c_driver cpld_video_driver = {
368 .driver = {
369 .name = "cpld_video",
371 .probe = cpld_video_probe,
372 .remove = cpld_video_remove,
373 .id_table = cpld_video_id,
376 static void evm_init_cpld(void)
378 i2c_add_driver(&cpld_video_driver);
381 static struct i2c_board_info __initdata i2c_info[] = {
383 I2C_BOARD_INFO("24c256", 0x50),
384 .platform_data = &eeprom_info,
387 I2C_BOARD_INFO("pcf8574a", 0x38),
388 .platform_data = &pcf_data,
391 I2C_BOARD_INFO("cpld_reg0", 0x3a),
394 I2C_BOARD_INFO("tlv320aic33", 0x18),
397 I2C_BOARD_INFO("cpld_video", 0x3b),
400 I2C_BOARD_INFO("cdce949", 0x6c),
404 static struct davinci_i2c_platform_data i2c_pdata = {
405 .bus_freq = 100 /* kHz */,
406 .bus_delay = 0 /* usec */,
409 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
410 #define VCH2CLK_SYSCLK8 (BIT(9))
411 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
412 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
413 #define VCH3CLK_SYSCLK8 (BIT(13))
414 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
416 #define VIDCH2CLK (BIT(10))
417 #define VIDCH3CLK (BIT(11))
418 #define VIDCH1CLK (BIT(4))
419 #define TVP7002_INPUT (BIT(4))
420 #define TVP5147_INPUT (~BIT(4))
421 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
422 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
423 #define TVP5147_CH0 "tvp514x-0"
424 #define TVP5147_CH1 "tvp514x-1"
426 /* spin lock for updating above registers */
427 static spinlock_t vpif_reg_lock;
429 static int set_vpif_clock(int mux_mode, int hd)
431 unsigned long flags;
432 unsigned int value;
433 int val = 0;
434 int err = 0;
436 if (!cpld_client)
437 return -ENXIO;
439 /* disable the clock */
440 spin_lock_irqsave(&vpif_reg_lock, flags);
441 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
442 value |= (VIDCH3CLK | VIDCH2CLK);
443 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
444 spin_unlock_irqrestore(&vpif_reg_lock, flags);
446 val = i2c_smbus_read_byte(cpld_client);
447 if (val < 0)
448 return val;
450 if (mux_mode == 1)
451 val &= ~0x40;
452 else
453 val |= 0x40;
455 err = i2c_smbus_write_byte(cpld_client, val);
456 if (err)
457 return err;
459 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
460 value &= ~(VCH2CLK_MASK);
461 value &= ~(VCH3CLK_MASK);
463 if (hd >= 1)
464 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
465 else
466 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
468 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
470 spin_lock_irqsave(&vpif_reg_lock, flags);
471 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
472 /* enable the clock */
473 value &= ~(VIDCH3CLK | VIDCH2CLK);
474 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
475 spin_unlock_irqrestore(&vpif_reg_lock, flags);
477 return 0;
480 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
482 .name = "adv7343",
483 .board_info = {
484 I2C_BOARD_INFO("adv7343", 0x2a),
488 .name = "ths7303",
489 .board_info = {
490 I2C_BOARD_INFO("ths7303", 0x2c),
495 static const struct vpif_output dm6467_ch0_outputs[] = {
497 .output = {
498 .index = 0,
499 .name = "Composite",
500 .type = V4L2_OUTPUT_TYPE_ANALOG,
501 .capabilities = V4L2_OUT_CAP_STD,
502 .std = V4L2_STD_ALL,
504 .subdev_name = "adv7343",
505 .output_route = ADV7343_COMPOSITE_ID,
508 .output = {
509 .index = 1,
510 .name = "Component",
511 .type = V4L2_OUTPUT_TYPE_ANALOG,
512 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
514 .subdev_name = "adv7343",
515 .output_route = ADV7343_COMPONENT_ID,
518 .output = {
519 .index = 2,
520 .name = "S-Video",
521 .type = V4L2_OUTPUT_TYPE_ANALOG,
522 .capabilities = V4L2_OUT_CAP_STD,
523 .std = V4L2_STD_ALL,
525 .subdev_name = "adv7343",
526 .output_route = ADV7343_SVIDEO_ID,
530 static struct vpif_display_config dm646x_vpif_display_config = {
531 .set_clock = set_vpif_clock,
532 .subdevinfo = dm646x_vpif_subdev,
533 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
534 .chan_config[0] = {
535 .outputs = dm6467_ch0_outputs,
536 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
538 .card_name = "DM646x EVM",
542 * setup_vpif_input_path()
543 * @channel: channel id (0 - CH0, 1 - CH1)
544 * @sub_dev_name: ptr sub device name
546 * This will set vpif input to capture data from tvp514x or
547 * tvp7002.
549 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
551 int err = 0;
552 int val;
554 /* for channel 1, we don't do anything */
555 if (channel != 0)
556 return 0;
558 if (!cpld_client)
559 return -ENXIO;
561 val = i2c_smbus_read_byte(cpld_client);
562 if (val < 0)
563 return val;
565 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
566 !strcmp(sub_dev_name, TVP5147_CH1))
567 val &= TVP5147_INPUT;
568 else
569 val |= TVP7002_INPUT;
571 err = i2c_smbus_write_byte(cpld_client, val);
572 if (err)
573 return err;
574 return 0;
578 * setup_vpif_input_channel_mode()
579 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
581 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
583 static int setup_vpif_input_channel_mode(int mux_mode)
585 unsigned long flags;
586 int err = 0;
587 int val;
588 u32 value;
590 if (!cpld_client)
591 return -ENXIO;
593 val = i2c_smbus_read_byte(cpld_client);
594 if (val < 0)
595 return val;
597 spin_lock_irqsave(&vpif_reg_lock, flags);
598 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
599 if (mux_mode) {
600 val &= VPIF_INPUT_TWO_CHANNEL;
601 value |= VIDCH1CLK;
602 } else {
603 val |= VPIF_INPUT_ONE_CHANNEL;
604 value &= ~VIDCH1CLK;
606 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
607 spin_unlock_irqrestore(&vpif_reg_lock, flags);
609 err = i2c_smbus_write_byte(cpld_client, val);
610 if (err)
611 return err;
613 return 0;
616 static struct tvp514x_platform_data tvp5146_pdata = {
617 .clk_polarity = 0,
618 .hs_polarity = 1,
619 .vs_polarity = 1
622 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
624 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
626 .name = TVP5147_CH0,
627 .board_info = {
628 I2C_BOARD_INFO("tvp5146", 0x5d),
629 .platform_data = &tvp5146_pdata,
633 .name = TVP5147_CH1,
634 .board_info = {
635 I2C_BOARD_INFO("tvp5146", 0x5c),
636 .platform_data = &tvp5146_pdata,
641 static const struct vpif_input dm6467_ch0_inputs[] = {
643 .input = {
644 .index = 0,
645 .name = "Composite",
646 .type = V4L2_INPUT_TYPE_CAMERA,
647 .capabilities = V4L2_IN_CAP_STD,
648 .std = TVP514X_STD_ALL,
650 .subdev_name = TVP5147_CH0,
651 .input_route = INPUT_CVBS_VI2B,
652 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
656 static const struct vpif_input dm6467_ch1_inputs[] = {
658 .input = {
659 .index = 0,
660 .name = "S-Video",
661 .type = V4L2_INPUT_TYPE_CAMERA,
662 .capabilities = V4L2_IN_CAP_STD,
663 .std = TVP514X_STD_ALL,
665 .subdev_name = TVP5147_CH1,
666 .input_route = INPUT_SVIDEO_VI2C_VI1C,
667 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
671 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
672 .setup_input_path = setup_vpif_input_path,
673 .setup_input_channel_mode = setup_vpif_input_channel_mode,
674 .subdev_info = vpif_capture_sdev_info,
675 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
676 .chan_config[0] = {
677 .inputs = dm6467_ch0_inputs,
678 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
679 .vpif_if = {
680 .if_type = VPIF_IF_BT656,
681 .hd_pol = 1,
682 .vd_pol = 1,
683 .fid_pol = 0,
686 .chan_config[1] = {
687 .inputs = dm6467_ch1_inputs,
688 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
689 .vpif_if = {
690 .if_type = VPIF_IF_BT656,
691 .hd_pol = 1,
692 .vd_pol = 1,
693 .fid_pol = 0,
698 static void __init evm_init_video(void)
700 spin_lock_init(&vpif_reg_lock);
702 dm646x_setup_vpif(&dm646x_vpif_display_config,
703 &dm646x_vpif_capture_cfg);
706 static void __init evm_init_i2c(void)
708 davinci_init_i2c(&i2c_pdata);
709 i2c_add_driver(&dm6467evm_cpld_driver);
710 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
711 evm_init_cpld();
712 evm_init_video();
715 #define CDCE949_XIN_RATE 27000000
717 /* CDCE949 support - "lpsc" field is overridden to work as clock number */
718 static struct clk cdce_clk_in = {
719 .name = "cdce_xin",
720 .rate = CDCE949_XIN_RATE,
723 static struct clk_lookup cdce_clks[] = {
724 CLK(NULL, "xin", &cdce_clk_in),
725 CLK(NULL, NULL, NULL),
728 static void __init cdce_clk_init(void)
730 struct clk_lookup *c;
731 struct clk *clk;
733 for (c = cdce_clks; c->clk; c++) {
734 clk = c->clk;
735 clkdev_add(c);
736 clk_register(clk);
740 #define DM6467T_EVM_REF_FREQ 33000000
742 static void __init davinci_map_io(void)
744 dm646x_init();
746 if (machine_is_davinci_dm6467tevm())
747 davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
749 cdce_clk_init();
752 static struct davinci_uart_config uart_config __initdata = {
753 .enabled_uarts = (1 << 0),
756 #define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
758 * The following EDMA channels/slots are not being used by drivers (for
759 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
760 * reserved for codecs on the DSP side.
762 static const s16 dm646x_dma_rsv_chans[][2] = {
763 /* (offset, number) */
764 { 0, 4},
765 {13, 3},
766 {24, 4},
767 {30, 2},
768 {54, 3},
769 {-1, -1}
772 static const s16 dm646x_dma_rsv_slots[][2] = {
773 /* (offset, number) */
774 { 0, 4},
775 {13, 3},
776 {24, 4},
777 {30, 2},
778 {54, 3},
779 {128, 384},
780 {-1, -1}
783 static struct edma_rsv_info dm646x_edma_rsv[] = {
785 .rsv_chans = dm646x_dma_rsv_chans,
786 .rsv_slots = dm646x_dma_rsv_slots,
790 static __init void evm_init(void)
792 struct davinci_soc_info *soc_info = &davinci_soc_info;
794 evm_init_i2c();
795 davinci_serial_init(&uart_config);
796 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
797 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
799 if (machine_is_davinci_dm6467tevm())
800 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
802 platform_device_register(&davinci_nand_device);
804 dm646x_init_edma(dm646x_edma_rsv);
806 if (HAS_ATA)
807 davinci_init_ide();
809 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
812 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
813 .atag_offset = 0x100,
814 .map_io = davinci_map_io,
815 .init_irq = davinci_irq_init,
816 .init_time = davinci_timer_init,
817 .init_machine = evm_init,
818 .init_late = davinci_init_late,
819 .dma_zone_size = SZ_128M,
820 .restart = davinci_restart,
821 MACHINE_END
823 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
824 .atag_offset = 0x100,
825 .map_io = davinci_map_io,
826 .init_irq = davinci_irq_init,
827 .init_time = davinci_timer_init,
828 .init_machine = evm_init,
829 .init_late = davinci_init_late,
830 .dma_zone_size = SZ_128M,
831 .restart = davinci_restart,
832 MACHINE_END