powerpc: Delete __cpuinit usage from all users
[linux/fpc-iii.git] / arch / arm / mach-imx / mach-armadillo5x0.c
blob368a6e3f5926b2d62c12e17fc6ecf8216e4be06c
1 /*
2 * armadillo5x0.c
4 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
5 * updates in http://alberdroid.blogspot.com/
7 * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
8 * Based on mx31ads.c and pcm037.c Great Work!
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
23 * MA 02110-1301, USA.
26 #include <linux/types.h>
27 #include <linux/init.h>
28 #include <linux/clk.h>
29 #include <linux/platform_device.h>
30 #include <linux/gpio.h>
31 #include <linux/smsc911x.h>
32 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/mtd/physmap.h>
35 #include <linux/io.h>
36 #include <linux/input.h>
37 #include <linux/i2c.h>
38 #include <linux/usb/otg.h>
39 #include <linux/usb/ulpi.h>
40 #include <linux/delay.h>
41 #include <linux/regulator/machine.h>
42 #include <linux/regulator/fixed.h>
44 #include <asm/mach-types.h>
45 #include <asm/mach/arch.h>
46 #include <asm/mach/time.h>
47 #include <asm/memory.h>
48 #include <asm/mach/map.h>
50 #include "common.h"
51 #include "devices-imx31.h"
52 #include "crmregs-imx3.h"
53 #include "hardware.h"
54 #include "iomux-mx3.h"
55 #include "ulpi.h"
57 static int armadillo5x0_pins[] = {
58 /* UART1 */
59 MX31_PIN_CTS1__CTS1,
60 MX31_PIN_RTS1__RTS1,
61 MX31_PIN_TXD1__TXD1,
62 MX31_PIN_RXD1__RXD1,
63 /* UART2 */
64 MX31_PIN_CTS2__CTS2,
65 MX31_PIN_RTS2__RTS2,
66 MX31_PIN_TXD2__TXD2,
67 MX31_PIN_RXD2__RXD2,
68 /* LAN9118_IRQ */
69 IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
70 /* SDHC1 */
71 MX31_PIN_SD1_DATA3__SD1_DATA3,
72 MX31_PIN_SD1_DATA2__SD1_DATA2,
73 MX31_PIN_SD1_DATA1__SD1_DATA1,
74 MX31_PIN_SD1_DATA0__SD1_DATA0,
75 MX31_PIN_SD1_CLK__SD1_CLK,
76 MX31_PIN_SD1_CMD__SD1_CMD,
77 /* Framebuffer */
78 MX31_PIN_LD0__LD0,
79 MX31_PIN_LD1__LD1,
80 MX31_PIN_LD2__LD2,
81 MX31_PIN_LD3__LD3,
82 MX31_PIN_LD4__LD4,
83 MX31_PIN_LD5__LD5,
84 MX31_PIN_LD6__LD6,
85 MX31_PIN_LD7__LD7,
86 MX31_PIN_LD8__LD8,
87 MX31_PIN_LD9__LD9,
88 MX31_PIN_LD10__LD10,
89 MX31_PIN_LD11__LD11,
90 MX31_PIN_LD12__LD12,
91 MX31_PIN_LD13__LD13,
92 MX31_PIN_LD14__LD14,
93 MX31_PIN_LD15__LD15,
94 MX31_PIN_LD16__LD16,
95 MX31_PIN_LD17__LD17,
96 MX31_PIN_VSYNC3__VSYNC3,
97 MX31_PIN_HSYNC__HSYNC,
98 MX31_PIN_FPSHIFT__FPSHIFT,
99 MX31_PIN_DRDY0__DRDY0,
100 IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
101 /* I2C2 */
102 MX31_PIN_CSPI2_MOSI__SCL,
103 MX31_PIN_CSPI2_MISO__SDA,
104 /* OTG */
105 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
106 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
107 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
108 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
109 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
110 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
111 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
112 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
113 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
114 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
115 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
116 MX31_PIN_USBOTG_STP__USBOTG_STP,
117 /* USB host 2 */
118 IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
119 IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
120 IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
121 IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
122 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
123 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
124 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
125 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
126 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
127 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
128 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
129 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
132 /* USB */
134 #define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
135 #define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
136 #define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
138 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
139 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
141 static int usbotg_init(struct platform_device *pdev)
143 int err;
145 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
146 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
147 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
148 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
149 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
150 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
151 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
152 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
153 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
154 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
156 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
158 /* Chip already enabled by hardware */
159 /* OTG phy reset*/
160 err = gpio_request(OTG_RESET, "USB-OTG-RESET");
161 if (err) {
162 pr_err("Failed to request the usb otg reset gpio\n");
163 return err;
166 err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
167 if (err) {
168 pr_err("Failed to reset the usb otg phy\n");
169 goto otg_free_reset;
172 gpio_set_value(OTG_RESET, 0/*LOW*/);
173 mdelay(5);
174 gpio_set_value(OTG_RESET, 1/*HIGH*/);
175 mdelay(10);
177 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
178 MXC_EHCI_INTERFACE_DIFF_UNI);
180 otg_free_reset:
181 gpio_free(OTG_RESET);
182 return err;
185 static int usbh2_init(struct platform_device *pdev)
187 int err;
189 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
190 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
191 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
192 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
193 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
194 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
195 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
196 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
197 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
198 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
199 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
200 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
202 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
205 /* Enable the chip */
206 err = gpio_request(USBH2_CS, "USB-H2-CS");
207 if (err) {
208 pr_err("Failed to request the usb host 2 CS gpio\n");
209 return err;
212 err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
213 if (err) {
214 pr_err("Failed to drive the usb host 2 CS gpio\n");
215 goto h2_free_cs;
218 /* H2 phy reset*/
219 err = gpio_request(USBH2_RESET, "USB-H2-RESET");
220 if (err) {
221 pr_err("Failed to request the usb host 2 reset gpio\n");
222 goto h2_free_cs;
225 err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
226 if (err) {
227 pr_err("Failed to reset the usb host 2 phy\n");
228 goto h2_free_reset;
231 gpio_set_value(USBH2_RESET, 0/*LOW*/);
232 mdelay(5);
233 gpio_set_value(USBH2_RESET, 1/*HIGH*/);
234 mdelay(10);
236 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
237 MXC_EHCI_INTERFACE_DIFF_UNI);
239 h2_free_reset:
240 gpio_free(USBH2_RESET);
241 h2_free_cs:
242 gpio_free(USBH2_CS);
243 return err;
246 static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
247 .init = usbotg_init,
248 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
251 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
252 .init = usbh2_init,
253 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
256 /* RTC over I2C*/
257 #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
259 static struct i2c_board_info armadillo5x0_i2c_rtc = {
260 I2C_BOARD_INFO("s35390a", 0x30),
263 /* GPIO BUTTONS */
264 static struct gpio_keys_button armadillo5x0_buttons[] = {
266 .code = KEY_ENTER, /*28*/
267 .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
268 .active_low = 1,
269 .desc = "menu",
270 .wakeup = 1,
271 }, {
272 .code = KEY_BACK, /*158*/
273 .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
274 .active_low = 1,
275 .desc = "back",
276 .wakeup = 1,
280 static const struct gpio_keys_platform_data
281 armadillo5x0_button_data __initconst = {
282 .buttons = armadillo5x0_buttons,
283 .nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
287 * NAND Flash
289 static const struct mxc_nand_platform_data
290 armadillo5x0_nand_board_info __initconst = {
291 .width = 1,
292 .hw_ecc = 1,
296 * MTD NOR Flash
298 static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
300 .name = "nor.bootloader",
301 .offset = 0x00000000,
302 .size = 4*32*1024,
303 }, {
304 .name = "nor.kernel",
305 .offset = MTDPART_OFS_APPEND,
306 .size = 16*128*1024,
307 }, {
308 .name = "nor.userland",
309 .offset = MTDPART_OFS_APPEND,
310 .size = 110*128*1024,
311 }, {
312 .name = "nor.config",
313 .offset = MTDPART_OFS_APPEND,
314 .size = 1*128*1024,
318 static const struct physmap_flash_data
319 armadillo5x0_nor_flash_pdata __initconst = {
320 .width = 2,
321 .parts = armadillo5x0_nor_flash_partitions,
322 .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
325 static const struct resource armadillo5x0_nor_flash_resource __initconst = {
326 .flags = IORESOURCE_MEM,
327 .start = MX31_CS0_BASE_ADDR,
328 .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
332 * FB support
334 static const struct fb_videomode fb_modedb[] = {
335 { /* 640x480 @ 60 Hz */
336 .name = "CRT-VGA",
337 .refresh = 60,
338 .xres = 640,
339 .yres = 480,
340 .pixclock = 39721,
341 .left_margin = 35,
342 .right_margin = 115,
343 .upper_margin = 43,
344 .lower_margin = 1,
345 .hsync_len = 10,
346 .vsync_len = 1,
347 .sync = FB_SYNC_OE_ACT_HIGH,
348 .vmode = FB_VMODE_NONINTERLACED,
349 .flag = 0,
350 }, {/* 800x600 @ 56 Hz */
351 .name = "CRT-SVGA",
352 .refresh = 56,
353 .xres = 800,
354 .yres = 600,
355 .pixclock = 30000,
356 .left_margin = 30,
357 .right_margin = 108,
358 .upper_margin = 13,
359 .lower_margin = 10,
360 .hsync_len = 10,
361 .vsync_len = 1,
362 .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
363 FB_SYNC_VERT_HIGH_ACT,
364 .vmode = FB_VMODE_NONINTERLACED,
365 .flag = 0,
369 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
370 .name = "CRT-VGA",
371 .mode = fb_modedb,
372 .num_modes = ARRAY_SIZE(fb_modedb),
376 * SDHC 1
377 * MMC support
379 static int armadillo5x0_sdhc1_get_ro(struct device *dev)
381 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
384 static int armadillo5x0_sdhc1_init(struct device *dev,
385 irq_handler_t detect_irq, void *data)
387 int ret;
388 int gpio_det, gpio_wp;
390 gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
391 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
393 ret = gpio_request(gpio_det, "sdhc-card-detect");
394 if (ret)
395 return ret;
397 gpio_direction_input(gpio_det);
399 ret = gpio_request(gpio_wp, "sdhc-write-protect");
400 if (ret)
401 goto err_gpio_free;
403 gpio_direction_input(gpio_wp);
405 /* When supported the trigger type have to be BOTH */
406 ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)),
407 detect_irq,
408 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
409 "sdhc-detect", data);
411 if (ret)
412 goto err_gpio_free_2;
414 return 0;
416 err_gpio_free_2:
417 gpio_free(gpio_wp);
419 err_gpio_free:
420 gpio_free(gpio_det);
422 return ret;
426 static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
428 free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)), data);
429 gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
430 gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
433 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
434 .get_ro = armadillo5x0_sdhc1_get_ro,
435 .init = armadillo5x0_sdhc1_init,
436 .exit = armadillo5x0_sdhc1_exit,
440 * SMSC 9118
441 * Network support
443 static struct resource armadillo5x0_smc911x_resources[] = {
445 .start = MX31_CS3_BASE_ADDR,
446 .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
447 .flags = IORESOURCE_MEM,
448 }, {
449 /* irq number is run-time assigned */
450 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
454 static struct smsc911x_platform_config smsc911x_info = {
455 .flags = SMSC911X_USE_16BIT,
456 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
457 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
460 static struct platform_device armadillo5x0_smc911x_device = {
461 .name = "smsc911x",
462 .id = -1,
463 .num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
464 .resource = armadillo5x0_smc911x_resources,
465 .dev = {
466 .platform_data = &smsc911x_info,
470 /* UART device data */
471 static const struct imxuart_platform_data uart_pdata __initconst = {
472 .flags = IMXUART_HAVE_RTSCTS,
475 static struct platform_device *devices[] __initdata = {
476 &armadillo5x0_smc911x_device,
479 static struct regulator_consumer_supply dummy_supplies[] = {
480 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
481 REGULATOR_SUPPLY("vddvario", "smsc911x"),
485 * Perform board specific initializations
487 static void __init armadillo5x0_init(void)
489 imx31_soc_init();
491 mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
492 ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
494 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
496 armadillo5x0_smc911x_resources[1].start =
497 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
498 armadillo5x0_smc911x_resources[1].end =
499 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
500 platform_add_devices(devices, ARRAY_SIZE(devices));
501 imx_add_gpio_keys(&armadillo5x0_button_data);
502 imx31_add_imx_i2c1(NULL);
504 /* Register UART */
505 imx31_add_imx_uart0(&uart_pdata);
506 imx31_add_imx_uart1(&uart_pdata);
508 /* SMSC9118 IRQ pin */
509 gpio_direction_input(MX31_PIN_GPIO1_0);
511 /* Register SDHC */
512 imx31_add_mxc_mmc(0, &sdhc_pdata);
514 /* Register FB */
515 imx31_add_ipu_core();
516 imx31_add_mx3_sdc_fb(&mx3fb_pdata);
518 /* Register NOR Flash */
519 platform_device_register_resndata(NULL, "physmap-flash", -1,
520 &armadillo5x0_nor_flash_resource, 1,
521 &armadillo5x0_nor_flash_pdata,
522 sizeof(armadillo5x0_nor_flash_pdata));
524 /* Register NAND Flash */
525 imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
527 /* set NAND page size to 2k if not configured via boot mode pins */
528 __raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) |
529 (1 << 30), mx3_ccm_base + MXC_CCM_RCSR);
531 /* RTC */
532 /* Get RTC IRQ and register the chip */
533 if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
534 if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
535 armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
536 else
537 gpio_free(ARMADILLO5X0_RTC_GPIO);
539 if (armadillo5x0_i2c_rtc.irq == 0)
540 pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
541 i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
543 /* USB */
545 usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
546 ULPI_OTG_DRVVBUS_EXT);
547 if (usbotg_pdata.otg)
548 imx31_add_mxc_ehci_otg(&usbotg_pdata);
549 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
550 ULPI_OTG_DRVVBUS_EXT);
551 if (usbh2_pdata.otg)
552 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
555 static void __init armadillo5x0_timer_init(void)
557 mx31_clocks_init(26000000);
560 MACHINE_START(ARMADILLO5X0, "Armadillo-500")
561 /* Maintainer: Alberto Panizzo */
562 .atag_offset = 0x100,
563 .map_io = mx31_map_io,
564 .init_early = imx31_init_early,
565 .init_irq = mx31_init_irq,
566 .handle_irq = imx31_handle_irq,
567 .init_time = armadillo5x0_timer_init,
568 .init_machine = armadillo5x0_init,
569 .restart = mxc_restart,
570 MACHINE_END