2 * r8a7779 processor support
4 * Copyright (C) 2011, 2013 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 * Copyright (C) 2013 Cogent Embedded, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/of_platform.h>
26 #include <linux/platform_data/gpio-rcar.h>
27 #include <linux/platform_device.h>
28 #include <linux/delay.h>
29 #include <linux/input.h>
31 #include <linux/serial_sci.h>
32 #include <linux/sh_intc.h>
33 #include <linux/sh_timer.h>
34 #include <linux/dma-mapping.h>
35 #include <mach/hardware.h>
36 #include <mach/irqs.h>
37 #include <mach/r8a7779.h>
38 #include <mach/common.h>
39 #include <asm/mach-types.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/time.h>
42 #include <asm/mach/map.h>
43 #include <asm/hardware/cache-l2x0.h>
45 static struct map_desc r8a7779_io_desc
[] __initdata
= {
46 /* 2M entity map for 0xf0000000 (MPCORE) */
48 .virtual = 0xf0000000,
49 .pfn
= __phys_to_pfn(0xf0000000),
51 .type
= MT_DEVICE_NONSHARED
53 /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
55 .virtual = 0xfe000000,
56 .pfn
= __phys_to_pfn(0xfe000000),
58 .type
= MT_DEVICE_NONSHARED
62 void __init
r8a7779_map_io(void)
64 iotable_init(r8a7779_io_desc
, ARRAY_SIZE(r8a7779_io_desc
));
67 static struct resource r8a7779_pfc_resources
[] = {
71 .flags
= IORESOURCE_MEM
,
75 static struct platform_device r8a7779_pfc_device
= {
76 .name
= "pfc-r8a7779",
78 .resource
= r8a7779_pfc_resources
,
79 .num_resources
= ARRAY_SIZE(r8a7779_pfc_resources
),
82 #define R8A7779_GPIO(idx, npins) \
83 static struct resource r8a7779_gpio##idx##_resources[] = { \
85 .start = 0xffc40000 + 0x1000 * (idx), \
86 .end = 0xffc4002b + 0x1000 * (idx), \
87 .flags = IORESOURCE_MEM, \
90 .start = gic_iid(0xad + (idx)), \
91 .flags = IORESOURCE_IRQ, \
95 static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \
96 .gpio_base = 32 * (idx), \
98 .number_of_pins = npins, \
99 .pctl_name = "pfc-r8a7779", \
102 static struct platform_device r8a7779_gpio##idx##_device = { \
103 .name = "gpio_rcar", \
105 .resource = r8a7779_gpio##idx##_resources, \
106 .num_resources = ARRAY_SIZE(r8a7779_gpio##idx##_resources), \
108 .platform_data = &r8a7779_gpio##idx##_platform_data, \
120 static struct platform_device
*r8a7779_pinctrl_devices
[] __initdata
= {
122 &r8a7779_gpio0_device
,
123 &r8a7779_gpio1_device
,
124 &r8a7779_gpio2_device
,
125 &r8a7779_gpio3_device
,
126 &r8a7779_gpio4_device
,
127 &r8a7779_gpio5_device
,
128 &r8a7779_gpio6_device
,
131 void __init
r8a7779_pinmux_init(void)
133 platform_add_devices(r8a7779_pinctrl_devices
,
134 ARRAY_SIZE(r8a7779_pinctrl_devices
));
137 static struct plat_sci_port scif0_platform_data
= {
138 .mapbase
= 0xffe40000,
139 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
140 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
141 .scbrr_algo_id
= SCBRR_ALGO_2
,
143 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x78)),
146 static struct platform_device scif0_device
= {
150 .platform_data
= &scif0_platform_data
,
154 static struct plat_sci_port scif1_platform_data
= {
155 .mapbase
= 0xffe41000,
156 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
157 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
158 .scbrr_algo_id
= SCBRR_ALGO_2
,
160 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x79)),
163 static struct platform_device scif1_device
= {
167 .platform_data
= &scif1_platform_data
,
171 static struct plat_sci_port scif2_platform_data
= {
172 .mapbase
= 0xffe42000,
173 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
174 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
175 .scbrr_algo_id
= SCBRR_ALGO_2
,
177 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x7a)),
180 static struct platform_device scif2_device
= {
184 .platform_data
= &scif2_platform_data
,
188 static struct plat_sci_port scif3_platform_data
= {
189 .mapbase
= 0xffe43000,
190 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
191 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
192 .scbrr_algo_id
= SCBRR_ALGO_2
,
194 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x7b)),
197 static struct platform_device scif3_device
= {
201 .platform_data
= &scif3_platform_data
,
205 static struct plat_sci_port scif4_platform_data
= {
206 .mapbase
= 0xffe44000,
207 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
208 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
209 .scbrr_algo_id
= SCBRR_ALGO_2
,
211 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x7c)),
214 static struct platform_device scif4_device
= {
218 .platform_data
= &scif4_platform_data
,
222 static struct plat_sci_port scif5_platform_data
= {
223 .mapbase
= 0xffe45000,
224 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
225 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
226 .scbrr_algo_id
= SCBRR_ALGO_2
,
228 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x7d)),
231 static struct platform_device scif5_device
= {
235 .platform_data
= &scif5_platform_data
,
240 static struct sh_timer_config tmu00_platform_data
= {
242 .channel_offset
= 0x4,
244 .clockevent_rating
= 200,
247 static struct resource tmu00_resources
[] = {
252 .flags
= IORESOURCE_MEM
,
255 .start
= gic_iid(0x40),
256 .flags
= IORESOURCE_IRQ
,
260 static struct platform_device tmu00_device
= {
264 .platform_data
= &tmu00_platform_data
,
266 .resource
= tmu00_resources
,
267 .num_resources
= ARRAY_SIZE(tmu00_resources
),
270 static struct sh_timer_config tmu01_platform_data
= {
272 .channel_offset
= 0x10,
274 .clocksource_rating
= 200,
277 static struct resource tmu01_resources
[] = {
282 .flags
= IORESOURCE_MEM
,
285 .start
= gic_iid(0x41),
286 .flags
= IORESOURCE_IRQ
,
290 static struct platform_device tmu01_device
= {
294 .platform_data
= &tmu01_platform_data
,
296 .resource
= tmu01_resources
,
297 .num_resources
= ARRAY_SIZE(tmu01_resources
),
301 static struct resource rcar_i2c0_res
[] = {
305 .flags
= IORESOURCE_MEM
,
307 .start
= gic_iid(0x6f),
308 .flags
= IORESOURCE_IRQ
,
312 static struct platform_device i2c0_device
= {
315 .resource
= rcar_i2c0_res
,
316 .num_resources
= ARRAY_SIZE(rcar_i2c0_res
),
319 static struct resource rcar_i2c1_res
[] = {
323 .flags
= IORESOURCE_MEM
,
325 .start
= gic_iid(0x72),
326 .flags
= IORESOURCE_IRQ
,
330 static struct platform_device i2c1_device
= {
333 .resource
= rcar_i2c1_res
,
334 .num_resources
= ARRAY_SIZE(rcar_i2c1_res
),
337 static struct resource rcar_i2c2_res
[] = {
341 .flags
= IORESOURCE_MEM
,
343 .start
= gic_iid(0x70),
344 .flags
= IORESOURCE_IRQ
,
348 static struct platform_device i2c2_device
= {
351 .resource
= rcar_i2c2_res
,
352 .num_resources
= ARRAY_SIZE(rcar_i2c2_res
),
355 static struct resource rcar_i2c3_res
[] = {
359 .flags
= IORESOURCE_MEM
,
361 .start
= gic_iid(0x71),
362 .flags
= IORESOURCE_IRQ
,
366 static struct platform_device i2c3_device
= {
369 .resource
= rcar_i2c3_res
,
370 .num_resources
= ARRAY_SIZE(rcar_i2c3_res
),
373 static struct resource sata_resources
[] = {
378 .flags
= IORESOURCE_MEM
,
381 .start
= gic_iid(0x84),
382 .flags
= IORESOURCE_IRQ
,
386 static struct platform_device sata_device
= {
389 .resource
= sata_resources
,
390 .num_resources
= ARRAY_SIZE(sata_resources
),
392 .dma_mask
= &sata_device
.dev
.coherent_dma_mask
,
393 .coherent_dma_mask
= DMA_BIT_MASK(32),
398 static struct resource ether_resources
[] = {
402 .flags
= IORESOURCE_MEM
,
404 .start
= gic_iid(0xb4),
405 .flags
= IORESOURCE_IRQ
,
409 static struct platform_device
*r8a7779_devices_dt
[] __initdata
= {
420 static struct platform_device
*r8a7779_late_devices
[] __initdata
= {
428 void __init
r8a7779_add_standard_devices(void)
430 #ifdef CONFIG_CACHE_L2X0
431 /* Early BRESP enable, Shared attribute override enable, 64K*16way */
432 l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
436 r8a7779_init_pm_domains();
438 platform_add_devices(r8a7779_devices_dt
,
439 ARRAY_SIZE(r8a7779_devices_dt
));
440 platform_add_devices(r8a7779_late_devices
,
441 ARRAY_SIZE(r8a7779_late_devices
));
444 void __init
r8a7779_add_ether_device(struct sh_eth_plat_data
*pdata
)
446 platform_device_register_resndata(&platform_bus
, "sh_eth", -1,
448 ARRAY_SIZE(ether_resources
),
449 pdata
, sizeof(*pdata
));
452 /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
453 void __init __weak
r8a7779_register_twd(void) { }
455 void __init
r8a7779_earlytimer_init(void)
457 r8a7779_clock_init();
458 shmobile_earlytimer_init();
459 r8a7779_register_twd();
462 void __init
r8a7779_add_early_devices(void)
464 early_platform_add_devices(r8a7779_devices_dt
,
465 ARRAY_SIZE(r8a7779_devices_dt
));
467 /* Early serial console setup is not included here due to
468 * memory map collisions. The SCIF serial ports in r8a7779
469 * are difficult to entity map 1:1 due to collision with the
470 * virtual memory range used by the coherent DMA code on ARM.
472 * Anyone wanting to debug early can remove UPF_IOREMAP from
473 * the sh-sci serial console platform data, adjust mapbase
474 * to a static M:N virt:phys mapping that needs to be added to
475 * the mappings passed with iotable_init() above.
477 * Then add a call to shmobile_setup_console() from this function.
479 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
480 * command line in case of the marzen board.
485 void __init
r8a7779_init_delay(void)
487 shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
490 static const struct of_dev_auxdata r8a7779_auxdata_lookup
[] __initconst
= {
494 void __init
r8a7779_add_standard_devices_dt(void)
496 /* clocks are setup late during boot in the case of DT */
497 r8a7779_clock_init();
499 platform_add_devices(r8a7779_devices_dt
,
500 ARRAY_SIZE(r8a7779_devices_dt
));
501 of_platform_populate(NULL
, of_default_bus_match_table
,
502 r8a7779_auxdata_lookup
, NULL
);
505 static const char *r8a7779_compat_dt
[] __initdata
= {
510 DT_MACHINE_START(R8A7779_DT
, "Generic R8A7779 (Flattened Device Tree)")
511 .map_io
= r8a7779_map_io
,
512 .init_early
= r8a7779_init_delay
,
513 .nr_irqs
= NR_IRQS_LEGACY
,
514 .init_irq
= r8a7779_init_irq_dt
,
515 .init_machine
= r8a7779_add_standard_devices_dt
,
516 .init_time
= shmobile_timer_init
,
517 .dt_compat
= r8a7779_compat_dt
,
519 #endif /* CONFIG_USE_OF */