arch/parisc/include/uapi/asm/pdc.h

   1 #ifndef _UAPI_PARISC_PDC_H
   2 #define _UAPI_PARISC_PDC_H
   3
   4 /*
   5  *      PDC return values ...
   6  *      All PDC calls return a subset of these errors.
   7  */
   8
   9 #define PDC_WARN                  3     /* Call completed with a warning */
  10 #define PDC_REQ_ERR_1             2     /* See above                     */
  11 #define PDC_REQ_ERR_0             1     /* Call would generate a requestor error */
  12 #define PDC_OK                    0     /* Call completed successfully  */
  13 #define PDC_BAD_PROC             -1     /* Called non-existent procedure*/
  14 #define PDC_BAD_OPTION           -2     /* Called with non-existent option */
  15 #define PDC_ERROR                -3     /* Call could not complete without an error */
  16 #define PDC_NE_MOD               -5     /* Module not found             */
  17 #define PDC_NE_CELL_MOD          -7     /* Cell module not found        */
  18 #define PDC_INVALID_ARG         -10     /* Called with an invalid argument */
  19 #define PDC_BUS_POW_WARN        -12     /* Call could not complete in allowed power budget */
  20 #define PDC_NOT_NARROW          -17     /* Narrow mode not supported    */
  21
  22 /*
  23  *      PDC entry points...
  24  */
  25
  26 #define PDC_POW_FAIL    1               /* perform a power-fail         */
  27 #define PDC_POW_FAIL_PREPARE    0       /* prepare for powerfail        */
  28
  29 #define PDC_CHASSIS     2               /* PDC-chassis functions        */
  30 #define PDC_CHASSIS_DISP        0       /* update chassis display       */
  31 #define PDC_CHASSIS_WARN        1       /* return chassis warnings      */
  32 #define PDC_CHASSIS_DISPWARN    2       /* update&return chassis status */
  33 #define PDC_RETURN_CHASSIS_INFO 128     /* HVERSION dependent: return chassis LED/LCD info  */
  34
  35 #define PDC_PIM         3               /* Get PIM data                 */
  36 #define PDC_PIM_HPMC            0       /* Transfer HPMC data           */
  37 #define PDC_PIM_RETURN_SIZE     1       /* Get Max buffer needed for PIM*/
  38 #define PDC_PIM_LPMC            2       /* Transfer HPMC data           */
  39 #define PDC_PIM_SOFT_BOOT       3       /* Transfer Soft Boot data      */
  40 #define PDC_PIM_TOC             4       /* Transfer TOC data            */
  41
  42 #define PDC_MODEL       4               /* PDC model information call   */
  43 #define PDC_MODEL_INFO          0       /* returns information          */
  44 #define PDC_MODEL_BOOTID        1       /* set the BOOT_ID              */
  45 #define PDC_MODEL_VERSIONS      2       /* returns cpu-internal versions*/
  46 #define PDC_MODEL_SYSMODEL      3       /* return system model info     */
  47 #define PDC_MODEL_ENSPEC        4       /* enable specific option       */
  48 #define PDC_MODEL_DISPEC        5       /* disable specific option      */
  49 #define PDC_MODEL_CPU_ID        6       /* returns cpu-id (only newer machines!) */
  50 #define PDC_MODEL_CAPABILITIES  7       /* returns OS32/OS64-flags      */
  51 /* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */
  52 #define  PDC_MODEL_OS64                 (1 << 0)
  53 #define  PDC_MODEL_OS32                 (1 << 1)
  54 #define  PDC_MODEL_IOPDIR_FDC           (1 << 2)
  55 #define  PDC_MODEL_NVA_MASK             (3 << 4)
  56 #define  PDC_MODEL_NVA_SUPPORTED        (0 << 4)
  57 #define  PDC_MODEL_NVA_SLOW             (1 << 4)
  58 #define  PDC_MODEL_NVA_UNSUPPORTED      (3 << 4)
  59 #define PDC_MODEL_GET_BOOT__OP  8       /* returns boot test options    */
  60 #define PDC_MODEL_SET_BOOT__OP  9       /* set boot test options        */
  61
  62 #define PA89_INSTRUCTION_SET    0x4     /* capatibilies returned        */
  63 #define PA90_INSTRUCTION_SET    0x8
  64
  65 #define PDC_CACHE       5               /* return/set cache (& TLB) info*/
  66 #define PDC_CACHE_INFO          0       /* returns information          */
  67 #define PDC_CACHE_SET_COH       1       /* set coherence state          */
  68 #define PDC_CACHE_RET_SPID      2       /* returns space-ID bits        */
  69
  70 #define PDC_HPA         6               /* return HPA of processor      */
  71 #define PDC_HPA_PROCESSOR       0
  72 #define PDC_HPA_MODULES         1
  73
  74 #define PDC_COPROC      7               /* Co-Processor (usually FP unit(s)) */
  75 #define PDC_COPROC_CFG          0       /* Co-Processor Cfg (FP unit(s) enabled?) */
  76
  77 #define PDC_IODC        8               /* talk to IODC                 */
  78 #define PDC_IODC_READ           0       /* read IODC entry point        */
  79 /*      PDC_IODC_RI_                     * INDEX parameter of PDC_IODC_READ */
  80 #define PDC_IODC_RI_DATA_BYTES  0       /* IODC Data Bytes              */
  81 /*                              1, 2       obsolete - HVERSION dependent*/
  82 #define PDC_IODC_RI_INIT        3       /* Initialize module            */
  83 #define PDC_IODC_RI_IO          4       /* Module input/output          */
  84 #define PDC_IODC_RI_SPA         5       /* Module input/output          */
  85 #define PDC_IODC_RI_CONFIG      6       /* Module input/output          */
  86 /*                              7         obsolete - HVERSION dependent */
  87 #define PDC_IODC_RI_TEST        8       /* Module input/output          */
  88 #define PDC_IODC_RI_TLB         9       /* Module input/output          */
  89 #define PDC_IODC_NINIT          2       /* non-destructive init         */
  90 #define PDC_IODC_DINIT          3       /* destructive init             */
  91 #define PDC_IODC_MEMERR         4       /* check for memory errors      */
  92 #define PDC_IODC_INDEX_DATA     0       /* get first 16 bytes from mod IODC */
  93 #define PDC_IODC_BUS_ERROR      -4      /* bus error return value       */
  94 #define PDC_IODC_INVALID_INDEX  -5      /* invalid index return value   */
  95 #define PDC_IODC_COUNT          -6      /* count is too small           */
  96
  97 #define PDC_TOD         9               /* time-of-day clock (TOD)      */
  98 #define PDC_TOD_READ            0       /* read TOD                     */
  99 #define PDC_TOD_WRITE           1       /* write TOD                    */
 100
 101
 102 #define PDC_STABLE      10              /* stable storage (sprockets)   */
 103 #define PDC_STABLE_READ         0
 104 #define PDC_STABLE_WRITE        1
 105 #define PDC_STABLE_RETURN_SIZE  2
 106 #define PDC_STABLE_VERIFY_CONTENTS 3
 107 #define PDC_STABLE_INITIALIZE   4
 108
 109 #define PDC_NVOLATILE   11              /* often not implemented        */
 110
 111 #define PDC_ADD_VALID   12              /* Memory validation PDC call   */
 112 #define PDC_ADD_VALID_VERIFY    0       /* Make PDC_ADD_VALID verify region */
 113
 114 #define PDC_INSTR       15              /* get instr to invoke PDCE_CHECK() */
 115
 116 #define PDC_PROC        16              /* (sprockets)                  */
 117
 118 #define PDC_CONFIG      16              /* (sprockets)                  */
 119 #define PDC_CONFIG_DECONFIG     0
 120 #define PDC_CONFIG_DRECONFIG    1
 121 #define PDC_CONFIG_DRETURN_CONFIG 2
 122
 123 #define PDC_BLOCK_TLB   18              /* manage hardware block-TLB    */
 124 #define PDC_BTLB_INFO           0       /* returns parameter            */
 125 #define PDC_BTLB_INSERT         1       /* insert BTLB entry            */
 126 #define PDC_BTLB_PURGE          2       /* purge BTLB entries           */
 127 #define PDC_BTLB_PURGE_ALL      3       /* purge all BTLB entries       */
 128
 129 #define PDC_TLB         19              /* manage hardware TLB miss handling */
 130 #define PDC_TLB_INFO            0       /* returns parameter            */
 131 #define PDC_TLB_SETUP           1       /* set up miss handling         */
 132
 133 #define PDC_MEM         20              /* Manage memory                */
 134 #define PDC_MEM_MEMINFO         0
 135 #define PDC_MEM_ADD_PAGE        1
 136 #define PDC_MEM_CLEAR_PDT       2
 137 #define PDC_MEM_READ_PDT        3
 138 #define PDC_MEM_RESET_CLEAR     4
 139 #define PDC_MEM_GOODMEM         5
 140 #define PDC_MEM_TABLE           128     /* Non contig mem map (sprockets) */
 141 #define PDC_MEM_RETURN_ADDRESS_TABLE    PDC_MEM_TABLE
 142 #define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE   131
 143 #define PDC_MEM_GET_MEMORY_SYSTEM_TABLES        132
 144 #define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
 145
 146 #define PDC_MEM_RET_SBE_REPLACED        5       /* PDC_MEM return values */
 147 #define PDC_MEM_RET_DUPLICATE_ENTRY     4
 148 #define PDC_MEM_RET_BUF_SIZE_SMALL      1
 149 #define PDC_MEM_RET_PDT_FULL            -11
 150 #define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
 151
 152 #define PDC_PSW         21              /* Get/Set default System Mask  */
 153 #define PDC_PSW_MASK            0       /* Return mask                  */
 154 #define PDC_PSW_GET_DEFAULTS    1       /* Return defaults              */
 155 #define PDC_PSW_SET_DEFAULTS    2       /* Set default                  */
 156 #define PDC_PSW_ENDIAN_BIT      1       /* set for big endian           */
 157 #define PDC_PSW_WIDE_BIT        2       /* set for wide mode            */
 158
 159 #define PDC_SYSTEM_MAP  22              /* find system modules          */
 160 #define PDC_FIND_MODULE         0
 161 #define PDC_FIND_ADDRESS        1
 162 #define PDC_TRANSLATE_PATH      2
 163
 164 #define PDC_SOFT_POWER  23              /* soft power switch            */
 165 #define PDC_SOFT_POWER_INFO     0       /* return info about the soft power switch */
 166 #define PDC_SOFT_POWER_ENABLE   1       /* enable/disable soft power switch */
 167
 168
 169 /* HVERSION dependent */
 170
 171 /* The PDC_MEM_MAP calls */
 172 #define PDC_MEM_MAP     128             /* on s700: return page info    */
 173 #define PDC_MEM_MAP_HPA         0       /* returns hpa of a module      */
 174
 175 #define PDC_EEPROM      129             /* EEPROM access                */
 176 #define PDC_EEPROM_READ_WORD    0
 177 #define PDC_EEPROM_WRITE_WORD   1
 178 #define PDC_EEPROM_READ_BYTE    2
 179 #define PDC_EEPROM_WRITE_BYTE   3
 180 #define PDC_EEPROM_EEPROM_PASSWORD -1000
 181
 182 #define PDC_NVM         130             /* NVM (non-volatile memory) access */
 183 #define PDC_NVM_READ_WORD       0
 184 #define PDC_NVM_WRITE_WORD      1
 185 #define PDC_NVM_READ_BYTE       2
 186 #define PDC_NVM_WRITE_BYTE      3
 187
 188 #define PDC_SEED_ERROR  132             /* (sprockets)                  */
 189
 190 #define PDC_IO          135             /* log error info, reset IO system */
 191 #define PDC_IO_READ_AND_CLEAR_ERRORS    0
 192 #define PDC_IO_RESET                    1
 193 #define PDC_IO_RESET_DEVICES            2
 194 /* sets bits 6&7 (little endian) of the HcControl Register */
 195 #define PDC_IO_USB_SUSPEND      0xC000000000000000
 196 #define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5      /* return value */
 197 #define PDC_IO_NO_SUSPEND               -6      /* return value */
 198
 199 #define PDC_BROADCAST_RESET 136         /* reset all processors         */
 200 #define PDC_DO_RESET            0       /* option: perform a broadcast reset */
 201 #define PDC_DO_FIRM_TEST_RESET  1       /* Do broadcast reset with bitmap */
 202 #define PDC_BR_RECONFIGURATION  2       /* reset w/reconfiguration      */
 203 #define PDC_FIRM_TEST_MAGIC     0xab9ec36fUL    /* for this reboot only */
 204
 205 #define PDC_LAN_STATION_ID 138          /* Hversion dependent mechanism for */
 206 #define PDC_LAN_STATION_ID_READ 0       /* getting the lan station address  */
 207
 208 #define PDC_LAN_STATION_ID_SIZE 6
 209
 210 #define PDC_CHECK_RANGES 139            /* (sprockets)                  */
 211
 212 #define PDC_NV_SECTIONS 141             /* (sprockets)                  */
 213
 214 #define PDC_PERFORMANCE 142             /* performance monitoring       */
 215
 216 #define PDC_SYSTEM_INFO 143             /* system information           */
 217 #define PDC_SYSINFO_RETURN_INFO_SIZE    0
 218 #define PDC_SYSINFO_RRETURN_SYS_INFO    1
 219 #define PDC_SYSINFO_RRETURN_ERRORS      2
 220 #define PDC_SYSINFO_RRETURN_WARNINGS    3
 221 #define PDC_SYSINFO_RETURN_REVISIONS    4
 222 #define PDC_SYSINFO_RRETURN_DIAGNOSE    5
 223 #define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
 224
 225 #define PDC_RDR         144             /* (sprockets)                  */
 226 #define PDC_RDR_READ_BUFFER     0
 227 #define PDC_RDR_READ_SINGLE     1
 228 #define PDC_RDR_WRITE_SINGLE    2
 229
 230 #define PDC_INTRIGUE    145             /* (sprockets)                  */
 231 #define PDC_INTRIGUE_WRITE_BUFFER        0
 232 #define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
 233 #define PDC_INTRIGUE_START_CPU_COUNTERS  2
 234 #define PDC_INTRIGUE_STOP_CPU_COUNTERS   3
 235
 236 #define PDC_STI         146             /* STI access                   */
 237 /* same as PDC_PCI_XXX values (see below) */
 238
 239 /* Legacy PDC definitions for same stuff */
 240 #define PDC_PCI_INDEX   147
 241 #define PDC_PCI_INTERFACE_INFO          0
 242 #define PDC_PCI_SLOT_INFO               1
 243 #define PDC_PCI_INFLIGHT_BYTES          2
 244 #define PDC_PCI_READ_CONFIG             3
 245 #define PDC_PCI_WRITE_CONFIG            4
 246 #define PDC_PCI_READ_PCI_IO             5
 247 #define PDC_PCI_WRITE_PCI_IO            6
 248 #define PDC_PCI_READ_CONFIG_DELAY       7
 249 #define PDC_PCI_UPDATE_CONFIG_DELAY     8
 250 #define PDC_PCI_PCI_PATH_TO_PCI_HPA     9
 251 #define PDC_PCI_PCI_HPA_TO_PCI_PATH     10
 252 #define PDC_PCI_PCI_PATH_TO_PCI_BUS     11
 253 #define PDC_PCI_PCI_RESERVED            12
 254 #define PDC_PCI_PCI_INT_ROUTE_SIZE      13
 255 #define PDC_PCI_GET_INT_TBL_SIZE        PDC_PCI_PCI_INT_ROUTE_SIZE
 256 #define PDC_PCI_PCI_INT_ROUTE           14
 257 #define PDC_PCI_GET_INT_TBL             PDC_PCI_PCI_INT_ROUTE
 258 #define PDC_PCI_READ_MON_TYPE           15
 259 #define PDC_PCI_WRITE_MON_TYPE          16
 260
 261
 262 /* Get SCSI Interface Card info:  SDTR, SCSI ID, mode (SE vs LVD) */
 263 #define PDC_INITIATOR   163
 264 #define PDC_GET_INITIATOR       0
 265 #define PDC_SET_INITIATOR       1
 266 #define PDC_DELETE_INITIATOR    2
 267 #define PDC_RETURN_TABLE_SIZE   3
 268 #define PDC_RETURN_TABLE        4
 269
 270 #define PDC_LINK        165             /* (sprockets)                  */
 271 #define PDC_LINK_PCI_ENTRY_POINTS       0  /* list (Arg1) = 0 */
 272 #define PDC_LINK_USB_ENTRY_POINTS       1  /* list (Arg1) = 1 */
 273
 274 /* cl_class
 275  * page 3-33 of IO-Firmware ARS
 276  * IODC ENTRY_INIT(Search first) RET[1]
 277  */
 278 #define CL_NULL         0       /* invalid */
 279 #define CL_RANDOM       1       /* random access (as disk) */
 280 #define CL_SEQU         2       /* sequential access (as tape) */
 281 #define CL_DUPLEX       7       /* full-duplex point-to-point (RS-232, Net) */
 282 #define CL_KEYBD        8       /* half-duplex console (HIL Keyboard) */
 283 #define CL_DISPL        9       /* half-duplex console (display) */
 284 #define CL_FC           10      /* FiberChannel access media */
 285
 286 /* IODC ENTRY_INIT() */
 287 #define ENTRY_INIT_SRCH_FRST    2
 288 #define ENTRY_INIT_SRCH_NEXT    3
 289 #define ENTRY_INIT_MOD_DEV      4
 290 #define ENTRY_INIT_DEV          5
 291 #define ENTRY_INIT_MOD          6
 292 #define ENTRY_INIT_MSG          9
 293
 294 /* IODC ENTRY_IO() */
 295 #define ENTRY_IO_BOOTIN         0
 296 #define ENTRY_IO_BOOTOUT        1
 297 #define ENTRY_IO_CIN            2
 298 #define ENTRY_IO_COUT           3
 299 #define ENTRY_IO_CLOSE          4
 300 #define ENTRY_IO_GETMSG         9
 301 #define ENTRY_IO_BBLOCK_IN      16
 302 #define ENTRY_IO_BBLOCK_OUT     17
 303
 304 /* IODC ENTRY_SPA() */
 305
 306 /* IODC ENTRY_CONFIG() */
 307
 308 /* IODC ENTRY_TEST() */
 309
 310 /* IODC ENTRY_TLB() */
 311
 312 /* constants for OS (NVM...) */
 313 #define OS_ID_NONE              0       /* Undefined OS ID      */
 314 #define OS_ID_HPUX              1       /* HP-UX OS             */
 315 #define OS_ID_MPEXL             2       /* MPE XL OS            */
 316 #define OS_ID_OSF               3       /* OSF OS               */
 317 #define OS_ID_HPRT              4       /* HP-RT OS             */
 318 #define OS_ID_NOVEL             5       /* NOVELL OS            */
 319 #define OS_ID_LINUX             6       /* Linux                */
 320
 321
 322 /* constants for PDC_CHASSIS */
 323 #define OSTAT_OFF               0
 324 #define OSTAT_FLT               1
 325 #define OSTAT_TEST              2
 326 #define OSTAT_INIT              3
 327 #define OSTAT_SHUT              4
 328 #define OSTAT_WARN              5
 329 #define OSTAT_RUN               6
 330 #define OSTAT_ON                7
 331
 332 /* Page Zero constant offsets used by the HPMC handler */
 333 #define BOOT_CONSOLE_HPA_OFFSET  0x3c0
 334 #define BOOT_CONSOLE_SPA_OFFSET  0x3c4
 335 #define BOOT_CONSOLE_PATH_OFFSET 0x3a8
 336
 337 /* size of the pdc_result buffer for firmware.c */
 338 #define NUM_PDC_RESULT  32
 339
 340 #if !defined(__ASSEMBLY__)
 341
 342 #include <linux/types.h>
 343
 344
 345 /* flags of the device_path */
 346 #define PF_AUTOBOOT     0x80
 347 #define PF_AUTOSEARCH   0x40
 348 #define PF_TIMER        0x0F
 349
 350 struct device_path {            /* page 1-69 */
 351         unsigned char flags;    /* flags see above! */
 352         unsigned char bc[6];    /* bus converter routing info */
 353         unsigned char mod;
 354         unsigned int  layers[6];/* device-specific layer-info */
 355 } __attribute__((aligned(8))) ;
 356
 357 struct pz_device {
 358         struct  device_path dp; /* see above */
 359         /* struct       iomod *hpa; */
 360         unsigned int hpa;       /* HPA base address */
 361         /* char *spa; */
 362         unsigned int spa;       /* SPA base address */
 363         /* int  (*iodc_io)(struct iomod*, ...); */
 364         unsigned int iodc_io;   /* device entry point */
 365         short   pad;            /* reserved */
 366         unsigned short cl_class;/* see below */
 367 } __attribute__((aligned(8))) ;
 368
 369 struct zeropage {
 370         /* [0x000] initialize vectors (VEC) */
 371         unsigned int    vec_special;            /* must be zero */
 372         /* int  (*vec_pow_fail)(void);*/
 373         unsigned int    vec_pow_fail; /* power failure handler */
 374         /* int  (*vec_toc)(void); */
 375         unsigned int    vec_toc;
 376         unsigned int    vec_toclen;
 377         /* int  (*vec_rendz)(void); */
 378         unsigned int vec_rendz;
 379         int     vec_pow_fail_flen;
 380         int     vec_pad[10];
 381
 382         /* [0x040] reserved processor dependent */
 383         int     pad0[112];
 384
 385         /* [0x200] reserved */
 386         int     pad1[84];
 387
 388         /* [0x350] memory configuration (MC) */
 389         int     memc_cont;              /* contiguous mem size (bytes) */
 390         int     memc_phsize;            /* physical memory size */
 391         int     memc_adsize;            /* additional mem size, bytes of SPA space used by PDC */
 392         unsigned int mem_pdc_hi;        /* used for 64-bit */
 393
 394         /* [0x360] various parameters for the boot-CPU */
 395         /* unsigned int *mem_booterr[8]; */
 396         unsigned int mem_booterr[8];    /* ptr to boot errors */
 397         unsigned int mem_free;          /* first location, where OS can be loaded */
 398         /* struct iomod *mem_hpa; */
 399         unsigned int mem_hpa;           /* HPA of the boot-CPU */
 400         /* int (*mem_pdc)(int, ...); */
 401         unsigned int mem_pdc;           /* PDC entry point */
 402         unsigned int mem_10msec;        /* number of clock ticks in 10msec */
 403
 404         /* [0x390] initial memory module (IMM) */
 405         /* struct iomod *imm_hpa; */
 406         unsigned int imm_hpa;           /* HPA of the IMM */
 407         int     imm_soft_boot;          /* 0 = was hard boot, 1 = was soft boot */
 408         unsigned int    imm_spa_size;           /* SPA size of the IMM in bytes */
 409         unsigned int    imm_max_mem;            /* bytes of mem in IMM */
 410
 411         /* [0x3A0] boot console, display device and keyboard */
 412         struct pz_device mem_cons;      /* description of console device */
 413         struct pz_device mem_boot;      /* description of boot device */
 414         struct pz_device mem_kbd;       /* description of keyboard device */
 415
 416         /* [0x430] reserved */
 417         int     pad430[116];
 418
 419         /* [0x600] processor dependent */
 420         __u32   pad600[1];
 421         __u32   proc_sti;               /* pointer to STI ROM */
 422         __u32   pad608[126];
 423 };
 424
 425 #endif /* !defined(__ASSEMBLY__) */
 426
 427 #endif /* _UAPI_PARISC_PDC_H */