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[S390] Remove error checking from copy_oldmem_page()
[linux/fpc-iii.git] / drivers / usb / gadget / fusb300_udc.c
blobe593f2849fa9499bb0efcdb748b4f610e1d3b22a
1 /*
2 * Fusb300 UDC (USB gadget)
3 *
4 * Copyright (C) 2010 Faraday Technology Corp.
5 *
6 * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 */
12 #include <linux/dma-mapping.h>
13 #include <linux/err.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/platform_device.h>
17 #include <linux/usb/ch9.h>
18 #include <linux/usb/gadget.h>
19
20 #include "fusb300_udc.h"
21
22 MODULE_DESCRIPTION("FUSB300 USB gadget driver");
23 MODULE_LICENSE("GPL");
24 MODULE_AUTHOR("Yuan Hsin Chen <yhchen@faraday-tech.com>");
25 MODULE_ALIAS("platform:fusb300_udc");
26
27 #define DRIVER_VERSION "20 October 2010"
28
29 static const char udc_name[] = "fusb300_udc";
30 static const char * const fusb300_ep_name[] = {
31 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", "ep8", "ep9",
32 "ep10", "ep11", "ep12", "ep13", "ep14", "ep15"
33 };
34
35 static void done(struct fusb300_ep *ep, struct fusb300_request *req,
36 int status);
37
38 static void fusb300_enable_bit(struct fusb300 *fusb300, u32 offset,
39 u32 value)
40 {
41 u32 reg = ioread32(fusb300->reg + offset);
42
43 reg |= value;
44 iowrite32(reg, fusb300->reg + offset);
45 }
46
47 static void fusb300_disable_bit(struct fusb300 *fusb300, u32 offset,
48 u32 value)
49 {
50 u32 reg = ioread32(fusb300->reg + offset);
51
52 reg &= ~value;
53 iowrite32(reg, fusb300->reg + offset);
54 }
55
56
57 static void fusb300_ep_setting(struct fusb300_ep *ep,
58 struct fusb300_ep_info info)
59 {
60 ep->epnum = info.epnum;
61 ep->type = info.type;
62 }
63
64 static int fusb300_ep_release(struct fusb300_ep *ep)
65 {
66 if (!ep->epnum)
67 return 0;
68 ep->epnum = 0;
69 ep->stall = 0;
70 ep->wedged = 0;
71 return 0;
72 }
73
74 static void fusb300_set_fifo_entry(struct fusb300 *fusb300,
75 u32 ep)
76 {
77 u32 val = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
78
79 val &= ~FUSB300_EPSET1_FIFOENTRY_MSK;
80 val |= FUSB300_EPSET1_FIFOENTRY(FUSB300_FIFO_ENTRY_NUM);
81 iowrite32(val, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
82 }
83
84 static void fusb300_set_start_entry(struct fusb300 *fusb300,
85 u8 ep)
86 {
87 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
88 u32 start_entry = fusb300->fifo_entry_num * FUSB300_FIFO_ENTRY_NUM;
89
90 reg &= ~FUSB300_EPSET1_START_ENTRY_MSK ;
91 reg |= FUSB300_EPSET1_START_ENTRY(start_entry);
92 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
93 if (fusb300->fifo_entry_num == FUSB300_MAX_FIFO_ENTRY) {
94 fusb300->fifo_entry_num = 0;
95 fusb300->addrofs = 0;
96 pr_err("fifo entry is over the maximum number!\n");
97 } else
98 fusb300->fifo_entry_num++;
99 }
100
101 /* set fusb300_set_start_entry first before fusb300_set_epaddrofs */
102 static void fusb300_set_epaddrofs(struct fusb300 *fusb300,
103 struct fusb300_ep_info info)
104 {
105 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
106
107 reg &= ~FUSB300_EPSET2_ADDROFS_MSK;
108 reg |= FUSB300_EPSET2_ADDROFS(fusb300->addrofs);
109 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
110 fusb300->addrofs += (info.maxpacket + 7) / 8 * FUSB300_FIFO_ENTRY_NUM;
111 }
112
113 static void ep_fifo_setting(struct fusb300 *fusb300,
114 struct fusb300_ep_info info)
115 {
116 fusb300_set_fifo_entry(fusb300, info.epnum);
117 fusb300_set_start_entry(fusb300, info.epnum);
118 fusb300_set_epaddrofs(fusb300, info);
119 }
120
121 static void fusb300_set_eptype(struct fusb300 *fusb300,
122 struct fusb300_ep_info info)
123 {
124 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
125
126 reg &= ~FUSB300_EPSET1_TYPE_MSK;
127 reg |= FUSB300_EPSET1_TYPE(info.type);
128 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
129 }
130
131 static void fusb300_set_epdir(struct fusb300 *fusb300,
132 struct fusb300_ep_info info)
133 {
134 u32 reg;
135
136 if (!info.dir_in)
137 return;
138 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
139 reg &= ~FUSB300_EPSET1_DIR_MSK;
140 reg |= FUSB300_EPSET1_DIRIN;
141 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
142 }
143
144 static void fusb300_set_ep_active(struct fusb300 *fusb300,
145 u8 ep)
146 {
147 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
148
149 reg |= FUSB300_EPSET1_ACTEN;
150 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
151 }
152
153 static void fusb300_set_epmps(struct fusb300 *fusb300,
154 struct fusb300_ep_info info)
155 {
156 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
157
158 reg &= ~FUSB300_EPSET2_MPS_MSK;
159 reg |= FUSB300_EPSET2_MPS(info.maxpacket);
160 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
161 }
162
163 static void fusb300_set_interval(struct fusb300 *fusb300,
164 struct fusb300_ep_info info)
165 {
166 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
167
168 reg &= ~FUSB300_EPSET1_INTERVAL(0x7);
169 reg |= FUSB300_EPSET1_INTERVAL(info.interval);
170 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
171 }
172
173 static void fusb300_set_bwnum(struct fusb300 *fusb300,
174 struct fusb300_ep_info info)
175 {
176 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
177
178 reg &= ~FUSB300_EPSET1_BWNUM(0x3);
179 reg |= FUSB300_EPSET1_BWNUM(info.bw_num);
180 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
181 }
182
183 static void set_ep_reg(struct fusb300 *fusb300,
184 struct fusb300_ep_info info)
185 {
186 fusb300_set_eptype(fusb300, info);
187 fusb300_set_epdir(fusb300, info);
188 fusb300_set_epmps(fusb300, info);
189
190 if (info.interval)
191 fusb300_set_interval(fusb300, info);
192
193 if (info.bw_num)
194 fusb300_set_bwnum(fusb300, info);
195
196 fusb300_set_ep_active(fusb300, info.epnum);
197 }
198
199 static int config_ep(struct fusb300_ep *ep,
200 const struct usb_endpoint_descriptor *desc)
201 {
202 struct fusb300 *fusb300 = ep->fusb300;
203 struct fusb300_ep_info info;
204
205 ep->desc = desc;
206
207 info.interval = 0;
208 info.addrofs = 0;
209 info.bw_num = 0;
210
211 info.type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
212 info.dir_in = (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ? 1 : 0;
213 info.maxpacket = usb_endpoint_maxp(desc);
214 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
215
216 if ((info.type == USB_ENDPOINT_XFER_INT) ||
217 (info.type == USB_ENDPOINT_XFER_ISOC)) {
218 info.interval = desc->bInterval;
219 if (info.type == USB_ENDPOINT_XFER_ISOC)
220 info.bw_num = ((desc->wMaxPacketSize & 0x1800) >> 11);
221 }
222
223 ep_fifo_setting(fusb300, info);
224
225 set_ep_reg(fusb300, info);
226
227 fusb300_ep_setting(ep, info);
228
229 fusb300->ep[info.epnum] = ep;
230
231 return 0;
232 }
233
234 static int fusb300_enable(struct usb_ep *_ep,
235 const struct usb_endpoint_descriptor *desc)
236 {
237 struct fusb300_ep *ep;
238
239 ep = container_of(_ep, struct fusb300_ep, ep);
240
241 if (ep->fusb300->reenum) {
242 ep->fusb300->fifo_entry_num = 0;
243 ep->fusb300->addrofs = 0;
244 ep->fusb300->reenum = 0;
245 }
246
247 return config_ep(ep, desc);
248 }
249
250 static int fusb300_disable(struct usb_ep *_ep)
251 {
252 struct fusb300_ep *ep;
253 struct fusb300_request *req;
254 unsigned long flags;
255
256 ep = container_of(_ep, struct fusb300_ep, ep);
257
258 BUG_ON(!ep);
259
260 while (!list_empty(&ep->queue)) {
261 req = list_entry(ep->queue.next, struct fusb300_request, queue);
262 spin_lock_irqsave(&ep->fusb300->lock, flags);
263 done(ep, req, -ECONNRESET);
264 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
265 }
266
267 return fusb300_ep_release(ep);
268 }
269
270 static struct usb_request *fusb300_alloc_request(struct usb_ep *_ep,
271 gfp_t gfp_flags)
272 {
273 struct fusb300_request *req;
274
275 req = kzalloc(sizeof(struct fusb300_request), gfp_flags);
276 if (!req)
277 return NULL;
278 INIT_LIST_HEAD(&req->queue);
279
280 return &req->req;
281 }
282
283 static void fusb300_free_request(struct usb_ep *_ep, struct usb_request *_req)
284 {
285 struct fusb300_request *req;
286
287 req = container_of(_req, struct fusb300_request, req);
288 kfree(req);
289 }
290
291 static int enable_fifo_int(struct fusb300_ep *ep)
292 {
293 struct fusb300 *fusb300 = ep->fusb300;
294
295 if (ep->epnum) {
296 fusb300_enable_bit(fusb300, FUSB300_OFFSET_IGER0,
297 FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
298 } else {
299 pr_err("can't enable_fifo_int ep0\n");
300 return -EINVAL;
301 }
302
303 return 0;
304 }
305
306 static int disable_fifo_int(struct fusb300_ep *ep)
307 {
308 struct fusb300 *fusb300 = ep->fusb300;
309
310 if (ep->epnum) {
311 fusb300_disable_bit(fusb300, FUSB300_OFFSET_IGER0,
312 FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
313 } else {
314 pr_err("can't disable_fifo_int ep0\n");
315 return -EINVAL;
316 }
317
318 return 0;
319 }
320
321 static void fusb300_set_cxlen(struct fusb300 *fusb300, u32 length)
322 {
323 u32 reg;
324
325 reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
326 reg &= ~FUSB300_CSR_LEN_MSK;
327 reg |= FUSB300_CSR_LEN(length);
328 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_CSR);
329 }
330
331 /* write data to cx fifo */
332 static void fusb300_wrcxf(struct fusb300_ep *ep,
333 struct fusb300_request *req)
334 {
335 int i = 0;
336 u8 *tmp;
337 u32 data;
338 struct fusb300 *fusb300 = ep->fusb300;
339 u32 length = req->req.length - req->req.actual;
340
341 tmp = req->req.buf + req->req.actual;
342
343 if (length > SS_CTL_MAX_PACKET_SIZE) {
344 fusb300_set_cxlen(fusb300, SS_CTL_MAX_PACKET_SIZE);
345 for (i = (SS_CTL_MAX_PACKET_SIZE >> 2); i > 0; i--) {
346 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
347 *(tmp + 3) << 24;
348 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
349 tmp += 4;
350 }
351 req->req.actual += SS_CTL_MAX_PACKET_SIZE;
352 } else { /* length is less than max packet size */
353 fusb300_set_cxlen(fusb300, length);
354 for (i = length >> 2; i > 0; i--) {
355 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
356 *(tmp + 3) << 24;
357 printk(KERN_DEBUG " 0x%x\n", data);
358 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
359 tmp = tmp + 4;
360 }
361 switch (length % 4) {
362 case 1:
363 data = *tmp;
364 printk(KERN_DEBUG " 0x%x\n", data);
365 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
366 break;
367 case 2:
368 data = *tmp | *(tmp + 1) << 8;
369 printk(KERN_DEBUG " 0x%x\n", data);
370 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
371 break;
372 case 3:
373 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16;
374 printk(KERN_DEBUG " 0x%x\n", data);
375 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
376 break;
377 default:
378 break;
379 }
380 req->req.actual += length;
381 }
382 }
383
384 static void fusb300_set_epnstall(struct fusb300 *fusb300, u8 ep)
385 {
386 fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
387 FUSB300_EPSET0_STL);
388 }
389
390 static void fusb300_clear_epnstall(struct fusb300 *fusb300, u8 ep)
391 {
392 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
393
394 if (reg & FUSB300_EPSET0_STL) {
395 printk(KERN_DEBUG "EP%d stall... Clear!!\n", ep);
396 reg &= ~FUSB300_EPSET0_STL;
397 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
398 }
399 }
400
401 static void ep0_queue(struct fusb300_ep *ep, struct fusb300_request *req)
402 {
403 if (ep->fusb300->ep0_dir) { /* if IN */
404 if (req->req.length) {
405 fusb300_wrcxf(ep, req);
406 } else
407 printk(KERN_DEBUG "%s : req->req.length = 0x%x\n",
408 __func__, req->req.length);
409 if ((req->req.length == req->req.actual) ||
410 (req->req.actual < ep->ep.maxpacket))
411 done(ep, req, 0);
412 } else { /* OUT */
413 if (!req->req.length)
414 done(ep, req, 0);
415 else
416 fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER1,
417 FUSB300_IGER1_CX_OUT_INT);
418 }
419 }
420
421 static int fusb300_queue(struct usb_ep *_ep, struct usb_request *_req,
422 gfp_t gfp_flags)
423 {
424 struct fusb300_ep *ep;
425 struct fusb300_request *req;
426 unsigned long flags;
427 int request = 0;
428
429 ep = container_of(_ep, struct fusb300_ep, ep);
430 req = container_of(_req, struct fusb300_request, req);
431
432 if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
433 return -ESHUTDOWN;
434
435 spin_lock_irqsave(&ep->fusb300->lock, flags);
436
437 if (list_empty(&ep->queue))
438 request = 1;
439
440 list_add_tail(&req->queue, &ep->queue);
441
442 req->req.actual = 0;
443 req->req.status = -EINPROGRESS;
444
445 if (ep->desc == NULL) /* ep0 */
446 ep0_queue(ep, req);
447 else if (request && !ep->stall)
448 enable_fifo_int(ep);
449
450 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
451
452 return 0;
453 }
454
455 static int fusb300_dequeue(struct usb_ep *_ep, struct usb_request *_req)
456 {
457 struct fusb300_ep *ep;
458 struct fusb300_request *req;
459 unsigned long flags;
460
461 ep = container_of(_ep, struct fusb300_ep, ep);
462 req = container_of(_req, struct fusb300_request, req);
463
464 spin_lock_irqsave(&ep->fusb300->lock, flags);
465 if (!list_empty(&ep->queue))
466 done(ep, req, -ECONNRESET);
467 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
468
469 return 0;
470 }
471
472 static int fusb300_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge)
473 {
474 struct fusb300_ep *ep;
475 struct fusb300 *fusb300;
476 unsigned long flags;
477 int ret = 0;
478
479 ep = container_of(_ep, struct fusb300_ep, ep);
480
481 fusb300 = ep->fusb300;
482
483 spin_lock_irqsave(&ep->fusb300->lock, flags);
484
485 if (!list_empty(&ep->queue)) {
486 ret = -EAGAIN;
487 goto out;
488 }
489
490 if (value) {
491 fusb300_set_epnstall(fusb300, ep->epnum);
492 ep->stall = 1;
493 if (wedge)
494 ep->wedged = 1;
495 } else {
496 fusb300_clear_epnstall(fusb300, ep->epnum);
497 ep->stall = 0;
498 ep->wedged = 0;
499 }
500
501 out:
502 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
503 return ret;
504 }
505
506 static int fusb300_set_halt(struct usb_ep *_ep, int value)
507 {
508 return fusb300_set_halt_and_wedge(_ep, value, 0);
509 }
510
511 static int fusb300_set_wedge(struct usb_ep *_ep)
512 {
513 return fusb300_set_halt_and_wedge(_ep, 1, 1);
514 }
515
516 static void fusb300_fifo_flush(struct usb_ep *_ep)
517 {
518 }
519
520 static struct usb_ep_ops fusb300_ep_ops = {
521 .enable = fusb300_enable,
522 .disable = fusb300_disable,
523
524 .alloc_request = fusb300_alloc_request,
525 .free_request = fusb300_free_request,
526
527 .queue = fusb300_queue,
528 .dequeue = fusb300_dequeue,
529
530 .set_halt = fusb300_set_halt,
531 .fifo_flush = fusb300_fifo_flush,
532 .set_wedge = fusb300_set_wedge,
533 };
534
535 /*****************************************************************************/
536 static void fusb300_clear_int(struct fusb300 *fusb300, u32 offset,
537 u32 value)
538 {
539 iowrite32(value, fusb300->reg + offset);
540 }
541
542 static void fusb300_reset(void)
543 {
544 }
545
546 static void fusb300_set_cxstall(struct fusb300 *fusb300)
547 {
548 fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
549 FUSB300_CSR_STL);
550 }
551
552 static void fusb300_set_cxdone(struct fusb300 *fusb300)
553 {
554 fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
555 FUSB300_CSR_DONE);
556 }
557
558 /* read data from cx fifo */
559 void fusb300_rdcxf(struct fusb300 *fusb300,
560 u8 *buffer, u32 length)
561 {
562 int i = 0;
563 u8 *tmp;
564 u32 data;
565
566 tmp = buffer;
567
568 for (i = (length >> 2); i > 0; i--) {
569 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
570 printk(KERN_DEBUG " 0x%x\n", data);
571 *tmp = data & 0xFF;
572 *(tmp + 1) = (data >> 8) & 0xFF;
573 *(tmp + 2) = (data >> 16) & 0xFF;
574 *(tmp + 3) = (data >> 24) & 0xFF;
575 tmp = tmp + 4;
576 }
577
578 switch (length % 4) {
579 case 1:
580 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
581 printk(KERN_DEBUG " 0x%x\n", data);
582 *tmp = data & 0xFF;
583 break;
584 case 2:
585 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
586 printk(KERN_DEBUG " 0x%x\n", data);
587 *tmp = data & 0xFF;
588 *(tmp + 1) = (data >> 8) & 0xFF;
589 break;
590 case 3:
591 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
592 printk(KERN_DEBUG " 0x%x\n", data);
593 *tmp = data & 0xFF;
594 *(tmp + 1) = (data >> 8) & 0xFF;
595 *(tmp + 2) = (data >> 16) & 0xFF;
596 break;
597 default:
598 break;
599 }
600 }
601
602 static void fusb300_rdfifo(struct fusb300_ep *ep,
603 struct fusb300_request *req,
604 u32 length)
605 {
606 int i = 0;
607 u8 *tmp;
608 u32 data, reg;
609 struct fusb300 *fusb300 = ep->fusb300;
610
611 tmp = req->req.buf + req->req.actual;
612 req->req.actual += length;
613
614 if (req->req.actual > req->req.length)
615 printk(KERN_DEBUG "req->req.actual > req->req.length\n");
616
617 for (i = (length >> 2); i > 0; i--) {
618 data = ioread32(fusb300->reg +
619 FUSB300_OFFSET_EPPORT(ep->epnum));
620 *tmp = data & 0xFF;
621 *(tmp + 1) = (data >> 8) & 0xFF;
622 *(tmp + 2) = (data >> 16) & 0xFF;
623 *(tmp + 3) = (data >> 24) & 0xFF;
624 tmp = tmp + 4;
625 }
626
627 switch (length % 4) {
628 case 1:
629 data = ioread32(fusb300->reg +
630 FUSB300_OFFSET_EPPORT(ep->epnum));
631 *tmp = data & 0xFF;
632 break;
633 case 2:
634 data = ioread32(fusb300->reg +
635 FUSB300_OFFSET_EPPORT(ep->epnum));
636 *tmp = data & 0xFF;
637 *(tmp + 1) = (data >> 8) & 0xFF;
638 break;
639 case 3:
640 data = ioread32(fusb300->reg +
641 FUSB300_OFFSET_EPPORT(ep->epnum));
642 *tmp = data & 0xFF;
643 *(tmp + 1) = (data >> 8) & 0xFF;
644 *(tmp + 2) = (data >> 16) & 0xFF;
645 break;
646 default:
647 break;
648 }
649
650 do {
651 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
652 reg &= FUSB300_IGR1_SYNF0_EMPTY_INT;
653 if (i)
654 printk(KERN_INFO "sync fifo is not empty!\n");
655 i++;
656 } while (!reg);
657 }
658
659 static u8 fusb300_get_epnstall(struct fusb300 *fusb300, u8 ep)
660 {
661 u8 value;
662 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
663
664 value = reg & FUSB300_EPSET0_STL;
665
666 return value;
667 }
668
669 static u8 fusb300_get_cxstall(struct fusb300 *fusb300)
670 {
671 u8 value;
672 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
673
674 value = (reg & FUSB300_CSR_STL) >> 1;
675
676 return value;
677 }
678
679 static void request_error(struct fusb300 *fusb300)
680 {
681 fusb300_set_cxstall(fusb300);
682 printk(KERN_DEBUG "request error!!\n");
683 }
684
685 static void get_status(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
686 __releases(fusb300->lock)
687 __acquires(fusb300->lock)
688 {
689 u8 ep;
690 u16 status = 0;
691 u16 w_index = ctrl->wIndex;
692
693 switch (ctrl->bRequestType & USB_RECIP_MASK) {
694 case USB_RECIP_DEVICE:
695 status = 1 << USB_DEVICE_SELF_POWERED;
696 break;
697 case USB_RECIP_INTERFACE:
698 status = 0;
699 break;
700 case USB_RECIP_ENDPOINT:
701 ep = w_index & USB_ENDPOINT_NUMBER_MASK;
702 if (ep) {
703 if (fusb300_get_epnstall(fusb300, ep))
704 status = 1 << USB_ENDPOINT_HALT;
705 } else {
706 if (fusb300_get_cxstall(fusb300))
707 status = 0;
708 }
709 break;
710
711 default:
712 request_error(fusb300);
713 return; /* exit */
714 }
715
716 fusb300->ep0_data = cpu_to_le16(status);
717 fusb300->ep0_req->buf = &fusb300->ep0_data;
718 fusb300->ep0_req->length = 2;
719
720 spin_unlock(&fusb300->lock);
721 fusb300_queue(fusb300->gadget.ep0, fusb300->ep0_req, GFP_KERNEL);
722 spin_lock(&fusb300->lock);
723 }
724
725 static void set_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
726 {
727 u8 ep;
728
729 switch (ctrl->bRequestType & USB_RECIP_MASK) {
730 case USB_RECIP_DEVICE:
731 fusb300_set_cxdone(fusb300);
732 break;
733 case USB_RECIP_INTERFACE:
734 fusb300_set_cxdone(fusb300);
735 break;
736 case USB_RECIP_ENDPOINT: {
737 u16 w_index = le16_to_cpu(ctrl->wIndex);
738
739 ep = w_index & USB_ENDPOINT_NUMBER_MASK;
740 if (ep)
741 fusb300_set_epnstall(fusb300, ep);
742 else
743 fusb300_set_cxstall(fusb300);
744 fusb300_set_cxdone(fusb300);
745 }
746 break;
747 default:
748 request_error(fusb300);
749 break;
750 }
751 }
752
753 static void fusb300_clear_seqnum(struct fusb300 *fusb300, u8 ep)
754 {
755 fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
756 FUSB300_EPSET0_CLRSEQNUM);
757 }
758
759 static void clear_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
760 {
761 struct fusb300_ep *ep =
762 fusb300->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK];
763
764 switch (ctrl->bRequestType & USB_RECIP_MASK) {
765 case USB_RECIP_DEVICE:
766 fusb300_set_cxdone(fusb300);
767 break;
768 case USB_RECIP_INTERFACE:
769 fusb300_set_cxdone(fusb300);
770 break;
771 case USB_RECIP_ENDPOINT:
772 if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) {
773 if (ep->wedged) {
774 fusb300_set_cxdone(fusb300);
775 break;
776 }
777 if (ep->stall) {
778 ep->stall = 0;
779 fusb300_clear_seqnum(fusb300, ep->epnum);
780 fusb300_clear_epnstall(fusb300, ep->epnum);
781 if (!list_empty(&ep->queue))
782 enable_fifo_int(ep);
783 }
784 }
785 fusb300_set_cxdone(fusb300);
786 break;
787 default:
788 request_error(fusb300);
789 break;
790 }
791 }
792
793 static void fusb300_set_dev_addr(struct fusb300 *fusb300, u16 addr)
794 {
795 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_DAR);
796
797 reg &= ~FUSB300_DAR_DRVADDR_MSK;
798 reg |= FUSB300_DAR_DRVADDR(addr);
799
800 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_DAR);
801 }
802
803 static void set_address(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
804 {
805 if (ctrl->wValue >= 0x0100)
806 request_error(fusb300);
807 else {
808 fusb300_set_dev_addr(fusb300, ctrl->wValue);
809 fusb300_set_cxdone(fusb300);
810 }
811 }
812
813 #define UVC_COPY_DESCRIPTORS(mem, src) \
814 do { \
815 const struct usb_descriptor_header * const *__src; \
816 for (__src = src; *__src; ++__src) { \
817 memcpy(mem, *__src, (*__src)->bLength); \
818 mem += (*__src)->bLength; \
819 } \
820 } while (0)
821
822 static int setup_packet(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
823 {
824 u8 *p = (u8 *)ctrl;
825 u8 ret = 0;
826 u8 i = 0;
827
828 fusb300_rdcxf(fusb300, p, 8);
829 fusb300->ep0_dir = ctrl->bRequestType & USB_DIR_IN;
830 fusb300->ep0_length = ctrl->wLength;
831
832 /* check request */
833 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
834 switch (ctrl->bRequest) {
835 case USB_REQ_GET_STATUS:
836 get_status(fusb300, ctrl);
837 break;
838 case USB_REQ_CLEAR_FEATURE:
839 clear_feature(fusb300, ctrl);
840 break;
841 case USB_REQ_SET_FEATURE:
842 set_feature(fusb300, ctrl);
843 break;
844 case USB_REQ_SET_ADDRESS:
845 set_address(fusb300, ctrl);
846 break;
847 case USB_REQ_SET_CONFIGURATION:
848 fusb300_enable_bit(fusb300, FUSB300_OFFSET_DAR,
849 FUSB300_DAR_SETCONFG);
850 /* clear sequence number */
851 for (i = 1; i <= FUSB300_MAX_NUM_EP; i++)
852 fusb300_clear_seqnum(fusb300, i);
853 fusb300->reenum = 1;
854 ret = 1;
855 break;
856 default:
857 ret = 1;
858 break;
859 }
860 } else
861 ret = 1;
862
863 return ret;
864 }
865
866 static void done(struct fusb300_ep *ep, struct fusb300_request *req,
867 int status)
868 {
869 list_del_init(&req->queue);
870
871 /* don't modify queue heads during completion callback */
872 if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
873 req->req.status = -ESHUTDOWN;
874 else
875 req->req.status = status;
876
877 spin_unlock(&ep->fusb300->lock);
878 req->req.complete(&ep->ep, &req->req);
879 spin_lock(&ep->fusb300->lock);
880
881 if (ep->epnum) {
882 disable_fifo_int(ep);
883 if (!list_empty(&ep->queue))
884 enable_fifo_int(ep);
885 } else
886 fusb300_set_cxdone(ep->fusb300);
887 }
888
889 static void fusb300_fill_idma_prdtbl(struct fusb300_ep *ep, dma_addr_t d,
890 u32 len)
891 {
892 u32 value;
893 u32 reg;
894
895 /* wait SW owner */
896 do {
897 reg = ioread32(ep->fusb300->reg +
898 FUSB300_OFFSET_EPPRD_W0(ep->epnum));
899 reg &= FUSB300_EPPRD0_H;
900 } while (reg);
901
902 iowrite32(d, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W1(ep->epnum));
903
904 value = FUSB300_EPPRD0_BTC(len) | FUSB300_EPPRD0_H |
905 FUSB300_EPPRD0_F | FUSB300_EPPRD0_L | FUSB300_EPPRD0_I;
906 iowrite32(value, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W0(ep->epnum));
907
908 iowrite32(0x0, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W2(ep->epnum));
909
910 fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_EPPRDRDY,
911 FUSB300_EPPRDR_EP_PRD_RDY(ep->epnum));
912 }
913
914 static void fusb300_wait_idma_finished(struct fusb300_ep *ep)
915 {
916 u32 reg;
917
918 do {
919 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR1);
920 if ((reg & FUSB300_IGR1_VBUS_CHG_INT) ||
921 (reg & FUSB300_IGR1_WARM_RST_INT) ||
922 (reg & FUSB300_IGR1_HOT_RST_INT) ||
923 (reg & FUSB300_IGR1_USBRST_INT)
924 )
925 goto IDMA_RESET;
926 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR0);
927 reg &= FUSB300_IGR0_EPn_PRD_INT(ep->epnum);
928 } while (!reg);
929
930 fusb300_clear_int(ep->fusb300, FUSB300_OFFSET_IGR0,
931 FUSB300_IGR0_EPn_PRD_INT(ep->epnum));
932 IDMA_RESET:
933 fusb300_clear_int(ep->fusb300, FUSB300_OFFSET_IGER0,
934 FUSB300_IGER0_EEPn_PRD_INT(ep->epnum));
935 }
936
937 static void fusb300_set_idma(struct fusb300_ep *ep,
938 struct fusb300_request *req)
939 {
940 dma_addr_t d;
941
942 d = dma_map_single(NULL, req->req.buf, req->req.length, DMA_TO_DEVICE);
943
944 if (dma_mapping_error(NULL, d)) {
945 printk(KERN_DEBUG "dma_mapping_error\n");
946 return;
947 }
948
949 dma_sync_single_for_device(NULL, d, req->req.length, DMA_TO_DEVICE);
950
951 fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER0,
952 FUSB300_IGER0_EEPn_PRD_INT(ep->epnum));
953
954 fusb300_fill_idma_prdtbl(ep, d, req->req.length);
955 /* check idma is done */
956 fusb300_wait_idma_finished(ep);
957
958 dma_unmap_single(NULL, d, req->req.length, DMA_TO_DEVICE);
959 }
960
961 static void in_ep_fifo_handler(struct fusb300_ep *ep)
962 {
963 struct fusb300_request *req = list_entry(ep->queue.next,
964 struct fusb300_request, queue);
965
966 if (req->req.length)
967 fusb300_set_idma(ep, req);
968 done(ep, req, 0);
969 }
970
971 static void out_ep_fifo_handler(struct fusb300_ep *ep)
972 {
973 struct fusb300 *fusb300 = ep->fusb300;
974 struct fusb300_request *req = list_entry(ep->queue.next,
975 struct fusb300_request, queue);
976 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPFFR(ep->epnum));
977 u32 length = reg & FUSB300_FFR_BYCNT;
978
979 fusb300_rdfifo(ep, req, length);
980
981 /* finish out transfer */
982 if ((req->req.length == req->req.actual) || (length < ep->ep.maxpacket))
983 done(ep, req, 0);
984 }
985
986 static void check_device_mode(struct fusb300 *fusb300)
987 {
988 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_GCR);
989
990 switch (reg & FUSB300_GCR_DEVEN_MSK) {
991 case FUSB300_GCR_DEVEN_SS:
992 fusb300->gadget.speed = USB_SPEED_SUPER;
993 break;
994 case FUSB300_GCR_DEVEN_HS:
995 fusb300->gadget.speed = USB_SPEED_HIGH;
996 break;
997 case FUSB300_GCR_DEVEN_FS:
998 fusb300->gadget.speed = USB_SPEED_FULL;
999 break;
1000 default:
1001 fusb300->gadget.speed = USB_SPEED_UNKNOWN;
1002 break;
1003 }
1004 printk(KERN_INFO "dev_mode = %d\n", (reg & FUSB300_GCR_DEVEN_MSK));
1005 }
1006
1007
1008 static void fusb300_ep0out(struct fusb300 *fusb300)
1009 {
1010 struct fusb300_ep *ep = fusb300->ep[0];
1011 u32 reg;
1012
1013 if (!list_empty(&ep->queue)) {
1014 struct fusb300_request *req;
1015
1016 req = list_first_entry(&ep->queue,
1017 struct fusb300_request, queue);
1018 if (req->req.length)
1019 fusb300_rdcxf(ep->fusb300, req->req.buf,
1020 req->req.length);
1021 done(ep, req, 0);
1022 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
1023 reg &= ~FUSB300_IGER1_CX_OUT_INT;
1024 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_IGER1);
1025 } else
1026 pr_err("%s : empty queue\n", __func__);
1027 }
1028
1029 static void fusb300_ep0in(struct fusb300 *fusb300)
1030 {
1031 struct fusb300_request *req;
1032 struct fusb300_ep *ep = fusb300->ep[0];
1033
1034 if ((!list_empty(&ep->queue)) && (fusb300->ep0_dir)) {
1035 req = list_entry(ep->queue.next,
1036 struct fusb300_request, queue);
1037 if (req->req.length)
1038 fusb300_wrcxf(ep, req);
1039 if ((req->req.length - req->req.actual) < ep->ep.maxpacket)
1040 done(ep, req, 0);
1041 } else
1042 fusb300_set_cxdone(fusb300);
1043 }
1044
1045 static void fusb300_grp2_handler(void)
1046 {
1047 }
1048
1049 static void fusb300_grp3_handler(void)
1050 {
1051 }
1052
1053 static void fusb300_grp4_handler(void)
1054 {
1055 }
1056
1057 static void fusb300_grp5_handler(void)
1058 {
1059 }
1060
1061 static irqreturn_t fusb300_irq(int irq, void *_fusb300)
1062 {
1063 struct fusb300 *fusb300 = _fusb300;
1064 u32 int_grp1 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
1065 u32 int_grp1_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
1066 u32 int_grp0 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR0);
1067 u32 int_grp0_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER0);
1068 struct usb_ctrlrequest ctrl;
1069 u8 in;
1070 u32 reg;
1071 int i;
1072
1073 spin_lock(&fusb300->lock);
1074
1075 int_grp1 &= int_grp1_en;
1076 int_grp0 &= int_grp0_en;
1077
1078 if (int_grp1 & FUSB300_IGR1_WARM_RST_INT) {
1079 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1080 FUSB300_IGR1_WARM_RST_INT);
1081 printk(KERN_INFO"fusb300_warmreset\n");
1082 fusb300_reset();
1083 }
1084
1085 if (int_grp1 & FUSB300_IGR1_HOT_RST_INT) {
1086 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1087 FUSB300_IGR1_HOT_RST_INT);
1088 printk(KERN_INFO"fusb300_hotreset\n");
1089 fusb300_reset();
1090 }
1091
1092 if (int_grp1 & FUSB300_IGR1_USBRST_INT) {
1093 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1094 FUSB300_IGR1_USBRST_INT);
1095 fusb300_reset();
1096 }
1097 /* COMABT_INT has a highest priority */
1098
1099 if (int_grp1 & FUSB300_IGR1_CX_COMABT_INT) {
1100 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1101 FUSB300_IGR1_CX_COMABT_INT);
1102 printk(KERN_INFO"fusb300_ep0abt\n");
1103 }
1104
1105 if (int_grp1 & FUSB300_IGR1_VBUS_CHG_INT) {
1106 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1107 FUSB300_IGR1_VBUS_CHG_INT);
1108 printk(KERN_INFO"fusb300_vbus_change\n");
1109 }
1110
1111 if (int_grp1 & FUSB300_IGR1_U3_EXIT_FAIL_INT) {
1112 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1113 FUSB300_IGR1_U3_EXIT_FAIL_INT);
1114 }
1115
1116 if (int_grp1 & FUSB300_IGR1_U2_EXIT_FAIL_INT) {
1117 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1118 FUSB300_IGR1_U2_EXIT_FAIL_INT);
1119 }
1120
1121 if (int_grp1 & FUSB300_IGR1_U1_EXIT_FAIL_INT) {
1122 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1123 FUSB300_IGR1_U1_EXIT_FAIL_INT);
1124 }
1125
1126 if (int_grp1 & FUSB300_IGR1_U2_ENTRY_FAIL_INT) {
1127 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1128 FUSB300_IGR1_U2_ENTRY_FAIL_INT);
1129 }
1130
1131 if (int_grp1 & FUSB300_IGR1_U1_ENTRY_FAIL_INT) {
1132 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1133 FUSB300_IGR1_U1_ENTRY_FAIL_INT);
1134 }
1135
1136 if (int_grp1 & FUSB300_IGR1_U3_EXIT_INT) {
1137 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1138 FUSB300_IGR1_U3_EXIT_INT);
1139 printk(KERN_INFO "FUSB300_IGR1_U3_EXIT_INT\n");
1140 }
1141
1142 if (int_grp1 & FUSB300_IGR1_U2_EXIT_INT) {
1143 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1144 FUSB300_IGR1_U2_EXIT_INT);
1145 printk(KERN_INFO "FUSB300_IGR1_U2_EXIT_INT\n");
1146 }
1147
1148 if (int_grp1 & FUSB300_IGR1_U1_EXIT_INT) {
1149 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1150 FUSB300_IGR1_U1_EXIT_INT);
1151 printk(KERN_INFO "FUSB300_IGR1_U1_EXIT_INT\n");
1152 }
1153
1154 if (int_grp1 & FUSB300_IGR1_U3_ENTRY_INT) {
1155 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1156 FUSB300_IGR1_U3_ENTRY_INT);
1157 printk(KERN_INFO "FUSB300_IGR1_U3_ENTRY_INT\n");
1158 fusb300_enable_bit(fusb300, FUSB300_OFFSET_SSCR1,
1159 FUSB300_SSCR1_GO_U3_DONE);
1160 }
1161
1162 if (int_grp1 & FUSB300_IGR1_U2_ENTRY_INT) {
1163 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1164 FUSB300_IGR1_U2_ENTRY_INT);
1165 printk(KERN_INFO "FUSB300_IGR1_U2_ENTRY_INT\n");
1166 }
1167
1168 if (int_grp1 & FUSB300_IGR1_U1_ENTRY_INT) {
1169 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1170 FUSB300_IGR1_U1_ENTRY_INT);
1171 printk(KERN_INFO "FUSB300_IGR1_U1_ENTRY_INT\n");
1172 }
1173
1174 if (int_grp1 & FUSB300_IGR1_RESM_INT) {
1175 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1176 FUSB300_IGR1_RESM_INT);
1177 printk(KERN_INFO "fusb300_resume\n");
1178 }
1179
1180 if (int_grp1 & FUSB300_IGR1_SUSP_INT) {
1181 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1182 FUSB300_IGR1_SUSP_INT);
1183 printk(KERN_INFO "fusb300_suspend\n");
1184 }
1185
1186 if (int_grp1 & FUSB300_IGR1_HS_LPM_INT) {
1187 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1188 FUSB300_IGR1_HS_LPM_INT);
1189 printk(KERN_INFO "fusb300_HS_LPM_INT\n");
1190 }
1191
1192 if (int_grp1 & FUSB300_IGR1_DEV_MODE_CHG_INT) {
1193 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1194 FUSB300_IGR1_DEV_MODE_CHG_INT);
1195 check_device_mode(fusb300);
1196 }
1197
1198 if (int_grp1 & FUSB300_IGR1_CX_COMFAIL_INT) {
1199 fusb300_set_cxstall(fusb300);
1200 printk(KERN_INFO "fusb300_ep0fail\n");
1201 }
1202
1203 if (int_grp1 & FUSB300_IGR1_CX_SETUP_INT) {
1204 printk(KERN_INFO "fusb300_ep0setup\n");
1205 if (setup_packet(fusb300, &ctrl)) {
1206 spin_unlock(&fusb300->lock);
1207 if (fusb300->driver->setup(&fusb300->gadget, &ctrl) < 0)
1208 fusb300_set_cxstall(fusb300);
1209 spin_lock(&fusb300->lock);
1210 }
1211 }
1212
1213 if (int_grp1 & FUSB300_IGR1_CX_CMDEND_INT)
1214 printk(KERN_INFO "fusb300_cmdend\n");
1215
1216
1217 if (int_grp1 & FUSB300_IGR1_CX_OUT_INT) {
1218 printk(KERN_INFO "fusb300_cxout\n");
1219 fusb300_ep0out(fusb300);
1220 }
1221
1222 if (int_grp1 & FUSB300_IGR1_CX_IN_INT) {
1223 printk(KERN_INFO "fusb300_cxin\n");
1224 fusb300_ep0in(fusb300);
1225 }
1226
1227 if (int_grp1 & FUSB300_IGR1_INTGRP5)
1228 fusb300_grp5_handler();
1229
1230 if (int_grp1 & FUSB300_IGR1_INTGRP4)
1231 fusb300_grp4_handler();
1232
1233 if (int_grp1 & FUSB300_IGR1_INTGRP3)
1234 fusb300_grp3_handler();
1235
1236 if (int_grp1 & FUSB300_IGR1_INTGRP2)
1237 fusb300_grp2_handler();
1238
1239 if (int_grp0) {
1240 for (i = 1; i < FUSB300_MAX_NUM_EP; i++) {
1241 if (int_grp0 & FUSB300_IGR0_EPn_FIFO_INT(i)) {
1242 reg = ioread32(fusb300->reg +
1243 FUSB300_OFFSET_EPSET1(i));
1244 in = (reg & FUSB300_EPSET1_DIRIN) ? 1 : 0;
1245 if (in)
1246 in_ep_fifo_handler(fusb300->ep[i]);
1247 else
1248 out_ep_fifo_handler(fusb300->ep[i]);
1249 }
1250 }
1251 }
1252
1253 spin_unlock(&fusb300->lock);
1254
1255 return IRQ_HANDLED;
1256 }
1257
1258 static void fusb300_set_u2_timeout(struct fusb300 *fusb300,
1259 u32 time)
1260 {
1261 u32 reg;
1262
1263 reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
1264 reg &= ~0xff;
1265 reg |= FUSB300_SSCR2_U2TIMEOUT(time);
1266
1267 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
1268 }
1269
1270 static void fusb300_set_u1_timeout(struct fusb300 *fusb300,
1271 u32 time)
1272 {
1273 u32 reg;
1274
1275 reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
1276 reg &= ~(0xff << 8);
1277 reg |= FUSB300_SSCR2_U1TIMEOUT(time);
1278
1279 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
1280 }
1281
1282 static void init_controller(struct fusb300 *fusb300)
1283 {
1284 u32 reg;
1285 u32 mask = 0;
1286 u32 val = 0;
1287
1288 /* split on */
1289 mask = val = FUSB300_AHBBCR_S0_SPLIT_ON | FUSB300_AHBBCR_S1_SPLIT_ON;
1290 reg = ioread32(fusb300->reg + FUSB300_OFFSET_AHBCR);
1291 reg &= ~mask;
1292 reg |= val;
1293 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_AHBCR);
1294
1295 /* enable high-speed LPM */
1296 mask = val = FUSB300_HSCR_HS_LPM_PERMIT;
1297 reg = ioread32(fusb300->reg + FUSB300_OFFSET_HSCR);
1298 reg &= ~mask;
1299 reg |= val;
1300 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_HSCR);
1301
1302 /*set u1 u2 timmer*/
1303 fusb300_set_u2_timeout(fusb300, 0xff);
1304 fusb300_set_u1_timeout(fusb300, 0xff);
1305
1306 /* enable all grp1 interrupt */
1307 iowrite32(0xcfffff9f, fusb300->reg + FUSB300_OFFSET_IGER1);
1308 }
1309 /*------------------------------------------------------------------------*/
1310 static struct fusb300 *the_controller;
1311
1312 static int fusb300_udc_start(struct usb_gadget_driver *driver,
1313 int (*bind)(struct usb_gadget *))
1314 {
1315 struct fusb300 *fusb300 = the_controller;
1316 int retval;
1317
1318 if (!driver
1319 || driver->speed < USB_SPEED_FULL
1320 || !bind
1321 || !driver->setup)
1322 return -EINVAL;
1323
1324 if (!fusb300)
1325 return -ENODEV;
1326
1327 if (fusb300->driver)
1328 return -EBUSY;
1329
1330 /* hook up the driver */
1331 driver->driver.bus = NULL;
1332 fusb300->driver = driver;
1333 fusb300->gadget.dev.driver = &driver->driver;
1334
1335 retval = device_add(&fusb300->gadget.dev);
1336 if (retval) {
1337 pr_err("device_add error (%d)\n", retval);
1338 goto error;
1339 }
1340
1341 retval = bind(&fusb300->gadget);
1342 if (retval) {
1343 pr_err("bind to driver error (%d)\n", retval);
1344 device_del(&fusb300->gadget.dev);
1345 goto error;
1346 }
1347
1348 return 0;
1349
1350 error:
1351 fusb300->driver = NULL;
1352 fusb300->gadget.dev.driver = NULL;
1353
1354 return retval;
1355 }
1356
1357 static int fusb300_udc_stop(struct usb_gadget_driver *driver)
1358 {
1359 struct fusb300 *fusb300 = the_controller;
1360
1361 if (driver != fusb300->driver || !driver->unbind)
1362 return -EINVAL;
1363
1364 driver->unbind(&fusb300->gadget);
1365 fusb300->gadget.dev.driver = NULL;
1366
1367 init_controller(fusb300);
1368 device_del(&fusb300->gadget.dev);
1369 fusb300->driver = NULL;
1370
1371 return 0;
1372 }
1373 /*--------------------------------------------------------------------------*/
1374
1375 static int fusb300_udc_pullup(struct usb_gadget *_gadget, int is_active)
1376 {
1377 return 0;
1378 }
1379
1380 static struct usb_gadget_ops fusb300_gadget_ops = {
1381 .pullup = fusb300_udc_pullup,
1382 .start = fusb300_udc_start,
1383 .stop = fusb300_udc_stop,
1384 };
1385
1386 static int __exit fusb300_remove(struct platform_device *pdev)
1387 {
1388 struct fusb300 *fusb300 = dev_get_drvdata(&pdev->dev);
1389
1390 usb_del_gadget_udc(&fusb300->gadget);
1391 iounmap(fusb300->reg);
1392 free_irq(platform_get_irq(pdev, 0), fusb300);
1393
1394 fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
1395 kfree(fusb300);
1396
1397 return 0;
1398 }
1399
1400 static int __init fusb300_probe(struct platform_device *pdev)
1401 {
1402 struct resource *res, *ires, *ires1;
1403 void __iomem *reg = NULL;
1404 struct fusb300 *fusb300 = NULL;
1405 struct fusb300_ep *_ep[FUSB300_MAX_NUM_EP];
1406 int ret = 0;
1407 int i;
1408
1409 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1410 if (!res) {
1411 ret = -ENODEV;
1412 pr_err("platform_get_resource error.\n");
1413 goto clean_up;
1414 }
1415
1416 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1417 if (!ires) {
1418 ret = -ENODEV;
1419 dev_err(&pdev->dev,
1420 "platform_get_resource IORESOURCE_IRQ error.\n");
1421 goto clean_up;
1422 }
1423
1424 ires1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
1425 if (!ires1) {
1426 ret = -ENODEV;
1427 dev_err(&pdev->dev,
1428 "platform_get_resource IORESOURCE_IRQ 1 error.\n");
1429 goto clean_up;
1430 }
1431
1432 reg = ioremap(res->start, resource_size(res));
1433 if (reg == NULL) {
1434 ret = -ENOMEM;
1435 pr_err("ioremap error.\n");
1436 goto clean_up;
1437 }
1438
1439 /* initialize udc */
1440 fusb300 = kzalloc(sizeof(struct fusb300), GFP_KERNEL);
1441 if (fusb300 == NULL) {
1442 pr_err("kzalloc error\n");
1443 goto clean_up;
1444 }
1445
1446 for (i = 0; i < FUSB300_MAX_NUM_EP; i++) {
1447 _ep[i] = kzalloc(sizeof(struct fusb300_ep), GFP_KERNEL);
1448 if (_ep[i] == NULL) {
1449 pr_err("_ep kzalloc error\n");
1450 goto clean_up;
1451 }
1452 fusb300->ep[i] = _ep[i];
1453 }
1454
1455 spin_lock_init(&fusb300->lock);
1456
1457 dev_set_drvdata(&pdev->dev, fusb300);
1458
1459 fusb300->gadget.ops = &fusb300_gadget_ops;
1460
1461 device_initialize(&fusb300->gadget.dev);
1462
1463 dev_set_name(&fusb300->gadget.dev, "gadget");
1464
1465 fusb300->gadget.is_dualspeed = 1;
1466 fusb300->gadget.dev.parent = &pdev->dev;
1467 fusb300->gadget.dev.dma_mask = pdev->dev.dma_mask;
1468 fusb300->gadget.dev.release = pdev->dev.release;
1469 fusb300->gadget.name = udc_name;
1470 fusb300->reg = reg;
1471
1472 ret = request_irq(ires->start, fusb300_irq, IRQF_SHARED,
1473 udc_name, fusb300);
1474 if (ret < 0) {
1475 pr_err("request_irq error (%d)\n", ret);
1476 goto clean_up;
1477 }
1478
1479 ret = request_irq(ires1->start, fusb300_irq,
1480 IRQF_SHARED, udc_name, fusb300);
1481 if (ret < 0) {
1482 pr_err("request_irq1 error (%d)\n", ret);
1483 goto clean_up;
1484 }
1485
1486 INIT_LIST_HEAD(&fusb300->gadget.ep_list);
1487
1488 for (i = 0; i < FUSB300_MAX_NUM_EP ; i++) {
1489 struct fusb300_ep *ep = fusb300->ep[i];
1490
1491 if (i != 0) {
1492 INIT_LIST_HEAD(&fusb300->ep[i]->ep.ep_list);
1493 list_add_tail(&fusb300->ep[i]->ep.ep_list,
1494 &fusb300->gadget.ep_list);
1495 }
1496 ep->fusb300 = fusb300;
1497 INIT_LIST_HEAD(&ep->queue);
1498 ep->ep.name = fusb300_ep_name[i];
1499 ep->ep.ops = &fusb300_ep_ops;
1500 ep->ep.maxpacket = HS_BULK_MAX_PACKET_SIZE;
1501 }
1502 fusb300->ep[0]->ep.maxpacket = HS_CTL_MAX_PACKET_SIZE;
1503 fusb300->ep[0]->epnum = 0;
1504 fusb300->gadget.ep0 = &fusb300->ep[0]->ep;
1505 INIT_LIST_HEAD(&fusb300->gadget.ep0->ep_list);
1506
1507 the_controller = fusb300;
1508
1509 fusb300->ep0_req = fusb300_alloc_request(&fusb300->ep[0]->ep,
1510 GFP_KERNEL);
1511 if (fusb300->ep0_req == NULL)
1512 goto clean_up3;
1513
1514 init_controller(fusb300);
1515 ret = usb_add_gadget_udc(&pdev->dev, &fusb300->gadget);
1516 if (ret)
1517 goto err_add_udc;
1518
1519 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1520
1521 return 0;
1522 err_add_udc:
1523 fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
1524
1525 clean_up3:
1526 free_irq(ires->start, fusb300);
1527
1528 clean_up:
1529 if (fusb300) {
1530 if (fusb300->ep0_req)
1531 fusb300_free_request(&fusb300->ep[0]->ep,
1532 fusb300->ep0_req);
1533 kfree(fusb300);
1534 }
1535 if (reg)
1536 iounmap(reg);
1537
1538 return ret;
1539 }
1540
1541 static struct platform_driver fusb300_driver = {
1542 .remove = __exit_p(fusb300_remove),
1543 .driver = {
1544 .name = (char *) udc_name,
1545 .owner = THIS_MODULE,
1546 },
1547 };
1548
1549 static int __init fusb300_udc_init(void)
1550 {
1551 return platform_driver_probe(&fusb300_driver, fusb300_probe);
1552 }
1553
1554 module_init(fusb300_udc_init);
1555
1556 static void __exit fusb300_udc_cleanup(void)
1557 {
1558 platform_driver_unregister(&fusb300_driver);
1559 }
1560 module_exit(fusb300_udc_cleanup);
Linux with added FPC-III support