[S390] Remove error checking from copy_oldmem_page()
[linux/fpc-iii.git] / drivers / usb / host / xhci-pci.c
blob9f51f88cc0f5461f8bfd9da57ff15c020850a99f
1 /*
2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/slab.h>
26 #include "xhci.h"
28 /* Device for a quirk */
29 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
30 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
32 #define PCI_VENDOR_ID_ETRON 0x1b6f
33 #define PCI_DEVICE_ID_ASROCK_P67 0x7023
35 static const char hcd_name[] = "xhci_hcd";
37 /* called after powerup, by probe or system-pm "wakeup" */
38 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
41 * TODO: Implement finding debug ports later.
42 * TODO: see if there are any quirks that need to be added to handle
43 * new extended capabilities.
46 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
47 if (!pci_set_mwi(pdev))
48 xhci_dbg(xhci, "MWI active\n");
50 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
51 return 0;
54 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
56 struct pci_dev *pdev = to_pci_dev(dev);
58 /* Look for vendor-specific quirks */
59 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
60 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) {
61 if (pdev->revision == 0x0) {
62 xhci->quirks |= XHCI_RESET_EP_QUIRK;
63 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
64 " endpoint cmd after reset endpoint\n");
66 /* Fresco Logic confirms: all revisions of this chip do not
67 * support MSI, even though some of them claim to in their PCI
68 * capabilities.
70 xhci->quirks |= XHCI_BROKEN_MSI;
71 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
72 "has broken MSI implementation\n",
73 pdev->revision);
76 if (pdev->vendor == PCI_VENDOR_ID_NEC)
77 xhci->quirks |= XHCI_NEC_HOST;
79 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
80 xhci->quirks |= XHCI_AMD_0x96_HOST;
82 /* AMD PLL quirk */
83 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
84 xhci->quirks |= XHCI_AMD_PLL_FIX;
85 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
86 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
87 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
88 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
89 xhci->limit_active_eps = 64;
90 xhci->quirks |= XHCI_SW_BW_CHECKING;
92 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
93 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
94 xhci->quirks |= XHCI_RESET_ON_RESUME;
95 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
99 /* called during probe() after chip reset completes */
100 static int xhci_pci_setup(struct usb_hcd *hcd)
102 struct xhci_hcd *xhci;
103 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
104 int retval;
106 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
107 if (retval)
108 return retval;
110 xhci = hcd_to_xhci(hcd);
111 if (!usb_hcd_is_primary_hcd(hcd))
112 return 0;
114 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
115 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
117 /* Find any debug ports */
118 retval = xhci_pci_reinit(xhci, pdev);
119 if (!retval)
120 return retval;
122 kfree(xhci);
123 return retval;
127 * We need to register our own PCI probe function (instead of the USB core's
128 * function) in order to create a second roothub under xHCI.
130 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
132 int retval;
133 struct xhci_hcd *xhci;
134 struct hc_driver *driver;
135 struct usb_hcd *hcd;
137 driver = (struct hc_driver *)id->driver_data;
138 /* Register the USB 2.0 roothub.
139 * FIXME: USB core must know to register the USB 2.0 roothub first.
140 * This is sort of silly, because we could just set the HCD driver flags
141 * to say USB 2.0, but I'm not sure what the implications would be in
142 * the other parts of the HCD code.
144 retval = usb_hcd_pci_probe(dev, id);
146 if (retval)
147 return retval;
149 /* USB 2.0 roothub is stored in the PCI device now. */
150 hcd = dev_get_drvdata(&dev->dev);
151 xhci = hcd_to_xhci(hcd);
152 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
153 pci_name(dev), hcd);
154 if (!xhci->shared_hcd) {
155 retval = -ENOMEM;
156 goto dealloc_usb2_hcd;
159 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
160 * is called by usb_add_hcd().
162 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
164 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
165 IRQF_SHARED);
166 if (retval)
167 goto put_usb3_hcd;
168 /* Roothub already marked as USB 3.0 speed */
169 return 0;
171 put_usb3_hcd:
172 usb_put_hcd(xhci->shared_hcd);
173 dealloc_usb2_hcd:
174 usb_hcd_pci_remove(dev);
175 return retval;
178 static void xhci_pci_remove(struct pci_dev *dev)
180 struct xhci_hcd *xhci;
182 xhci = hcd_to_xhci(pci_get_drvdata(dev));
183 if (xhci->shared_hcd) {
184 usb_remove_hcd(xhci->shared_hcd);
185 usb_put_hcd(xhci->shared_hcd);
187 usb_hcd_pci_remove(dev);
188 kfree(xhci);
191 #ifdef CONFIG_PM
192 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
194 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
195 int retval = 0;
197 if (hcd->state != HC_STATE_SUSPENDED ||
198 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
199 return -EINVAL;
201 retval = xhci_suspend(xhci);
203 return retval;
206 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
208 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
209 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
210 int retval = 0;
212 /* The BIOS on systems with the Intel Panther Point chipset may or may
213 * not support xHCI natively. That means that during system resume, it
214 * may switch the ports back to EHCI so that users can use their
215 * keyboard to select a kernel from GRUB after resume from hibernate.
217 * The BIOS is supposed to remember whether the OS had xHCI ports
218 * enabled before resume, and switch the ports back to xHCI when the
219 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
220 * writers.
222 * Unconditionally switch the ports back to xHCI after a system resume.
223 * We can't tell whether the EHCI or xHCI controller will be resumed
224 * first, so we have to do the port switchover in both drivers. Writing
225 * a '1' to the port switchover registers should have no effect if the
226 * port was already switched over.
228 if (usb_is_intel_switchable_xhci(pdev))
229 usb_enable_xhci_ports(pdev);
231 retval = xhci_resume(xhci, hibernated);
232 return retval;
234 #endif /* CONFIG_PM */
236 static const struct hc_driver xhci_pci_hc_driver = {
237 .description = hcd_name,
238 .product_desc = "xHCI Host Controller",
239 .hcd_priv_size = sizeof(struct xhci_hcd *),
242 * generic hardware linkage
244 .irq = xhci_irq,
245 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
248 * basic lifecycle operations
250 .reset = xhci_pci_setup,
251 .start = xhci_run,
252 #ifdef CONFIG_PM
253 .pci_suspend = xhci_pci_suspend,
254 .pci_resume = xhci_pci_resume,
255 #endif
256 .stop = xhci_stop,
257 .shutdown = xhci_shutdown,
260 * managing i/o requests and associated device resources
262 .urb_enqueue = xhci_urb_enqueue,
263 .urb_dequeue = xhci_urb_dequeue,
264 .alloc_dev = xhci_alloc_dev,
265 .free_dev = xhci_free_dev,
266 .alloc_streams = xhci_alloc_streams,
267 .free_streams = xhci_free_streams,
268 .add_endpoint = xhci_add_endpoint,
269 .drop_endpoint = xhci_drop_endpoint,
270 .endpoint_reset = xhci_endpoint_reset,
271 .check_bandwidth = xhci_check_bandwidth,
272 .reset_bandwidth = xhci_reset_bandwidth,
273 .address_device = xhci_address_device,
274 .update_hub_device = xhci_update_hub_device,
275 .reset_device = xhci_discover_or_reset_device,
278 * scheduling support
280 .get_frame_number = xhci_get_frame,
282 /* Root hub support */
283 .hub_control = xhci_hub_control,
284 .hub_status_data = xhci_hub_status_data,
285 .bus_suspend = xhci_bus_suspend,
286 .bus_resume = xhci_bus_resume,
288 * call back when device connected and addressed
290 .update_device = xhci_update_device,
291 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
294 /*-------------------------------------------------------------------------*/
296 /* PCI driver selection metadata; PCI hotplugging uses this */
297 static const struct pci_device_id pci_ids[] = { {
298 /* handle any USB 3.0 xHCI controller */
299 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
300 .driver_data = (unsigned long) &xhci_pci_hc_driver,
302 { /* end: all zeroes */ }
304 MODULE_DEVICE_TABLE(pci, pci_ids);
306 /* pci driver glue; this is a "new style" PCI driver module */
307 static struct pci_driver xhci_pci_driver = {
308 .name = (char *) hcd_name,
309 .id_table = pci_ids,
311 .probe = xhci_pci_probe,
312 .remove = xhci_pci_remove,
313 /* suspend and resume implemented later */
315 .shutdown = usb_hcd_pci_shutdown,
316 #ifdef CONFIG_PM_SLEEP
317 .driver = {
318 .pm = &usb_hcd_pci_pm_ops
320 #endif
323 int __init xhci_register_pci(void)
325 return pci_register_driver(&xhci_pci_driver);
328 void __exit xhci_unregister_pci(void)
330 pci_unregister_driver(&xhci_pci_driver);