drivers/usb/host/xhci-pci.c

   1 /*
   2  * xHCI host controller driver PCI Bus Glue.
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/pci.h>
  24 #include <linux/slab.h>
  25 #include <linux/module.h>
  26
  27 #include "xhci.h"
  28 #include "xhci-trace.h"
  29
  30 /* Device for a quirk */
  31 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
  32 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
  33 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
  34
  35 #define PCI_VENDOR_ID_ETRON             0x1b6f
  36 #define PCI_DEVICE_ID_ASROCK_P67        0x7023
  37
  38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI      0x8c31
  39 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI   0x9c31
  40
  41 static const char hcd_name[] = "xhci_hcd";
  42
  43 /* called after powerup, by probe or system-pm "wakeup" */
  44 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  45 {
  46         /*
  47          * TODO: Implement finding debug ports later.
  48          * TODO: see if there are any quirks that need to be added to handle
  49          * new extended capabilities.
  50          */
  51
  52         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  53         if (!pci_set_mwi(pdev))
  54                 xhci_dbg(xhci, "MWI active\n");
  55
  56         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  57         return 0;
  58 }
  59
  60 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
  61 {
  62         struct pci_dev          *pdev = to_pci_dev(dev);
  63
  64         /* Look for vendor-specific quirks */
  65         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
  66                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
  67                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
  68                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  69                                 pdev->revision == 0x0) {
  70                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
  71                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
  72                                 "QUIRK: Fresco Logic xHC needs configure"
  73                                 " endpoint cmd after reset endpoint");
  74                 }
  75                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  76                                 pdev->revision == 0x4) {
  77                         xhci->quirks |= XHCI_SLOW_SUSPEND;
  78                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
  79                                 "QUIRK: Fresco Logic xHC revision %u"
  80                                 "must be suspended extra slowly",
  81                                 pdev->revision);
  82                 }
  83                 /* Fresco Logic confirms: all revisions of this chip do not
  84                  * support MSI, even though some of them claim to in their PCI
  85                  * capabilities.
  86                  */
  87                 xhci->quirks |= XHCI_BROKEN_MSI;
  88                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
  89                                 "QUIRK: Fresco Logic revision %u "
  90                                 "has broken MSI implementation",
  91                                 pdev->revision);
  92                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
  93         }
  94
  95         if (pdev->vendor == PCI_VENDOR_ID_NEC)
  96                 xhci->quirks |= XHCI_NEC_HOST;
  97
  98         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
  99                 xhci->quirks |= XHCI_AMD_0x96_HOST;
 100
 101         /* AMD PLL quirk */
 102         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
 103                 xhci->quirks |= XHCI_AMD_PLL_FIX;
 104         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
 105                 xhci->quirks |= XHCI_LPM_SUPPORT;
 106                 xhci->quirks |= XHCI_INTEL_HOST;
 107         }
 108         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 109                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
 110                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
 111                 xhci->limit_active_eps = 64;
 112                 xhci->quirks |= XHCI_SW_BW_CHECKING;
 113                 /*
 114                  * PPT desktop boards DH77EB and DH77DF will power back on after
 115                  * a few seconds of being shutdown.  The fix for this is to
 116                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
 117                  * DMI information to find those particular boards (since each
 118                  * vendor will change the board name), so we have to key off all
 119                  * PPT chipsets.
 120                  */
 121                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 122                 xhci->quirks |= XHCI_AVOID_BEI;
 123         }
 124         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 125             (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI ||
 126              pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI)) {
 127                 /* Workaround for occasional spurious wakeups from S5 (or
 128                  * any other sleep) on Haswell machines with LPT and LPT-LP
 129                  * with the new Intel BIOS
 130                  */
 131                 /* Limit the quirk to only known vendors, as this triggers
 132                  * yet another BIOS bug on some other machines
 133                  * https://bugzilla.kernel.org/show_bug.cgi?id=66171
 134                  */
 135                 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)
 136                         xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
 137         }
 138         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 139                 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) {
 140                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 141         }
 142         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
 143                         pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
 144                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 145                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 146                                 "QUIRK: Resetting on resume");
 147                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 148         }
 149         if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
 150                         pdev->device == 0x0015)
 151                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 152         if (pdev->vendor == PCI_VENDOR_ID_VIA)
 153                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 154 }
 155
 156 /* called during probe() after chip reset completes */
 157 static int xhci_pci_setup(struct usb_hcd *hcd)
 158 {
 159         struct xhci_hcd         *xhci;
 160         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 161         int                     retval;
 162
 163         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
 164         if (retval)
 165                 return retval;
 166
 167         xhci = hcd_to_xhci(hcd);
 168         if (!usb_hcd_is_primary_hcd(hcd))
 169                 return 0;
 170
 171         pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
 172         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
 173
 174         /* Find any debug ports */
 175         retval = xhci_pci_reinit(xhci, pdev);
 176         if (!retval)
 177                 return retval;
 178
 179         kfree(xhci);
 180         return retval;
 181 }
 182
 183 /*
 184  * We need to register our own PCI probe function (instead of the USB core's
 185  * function) in order to create a second roothub under xHCI.
 186  */
 187 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 188 {
 189         int retval;
 190         struct xhci_hcd *xhci;
 191         struct hc_driver *driver;
 192         struct usb_hcd *hcd;
 193
 194         driver = (struct hc_driver *)id->driver_data;
 195
 196         /* Prevent runtime suspending between USB-2 and USB-3 initialization */
 197         pm_runtime_get_noresume(&dev->dev);
 198
 199         /* Register the USB 2.0 roothub.
 200          * FIXME: USB core must know to register the USB 2.0 roothub first.
 201          * This is sort of silly, because we could just set the HCD driver flags
 202          * to say USB 2.0, but I'm not sure what the implications would be in
 203          * the other parts of the HCD code.
 204          */
 205         retval = usb_hcd_pci_probe(dev, id);
 206
 207         if (retval)
 208                 goto put_runtime_pm;
 209
 210         /* USB 2.0 roothub is stored in the PCI device now. */
 211         hcd = dev_get_drvdata(&dev->dev);
 212         xhci = hcd_to_xhci(hcd);
 213         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
 214                                 pci_name(dev), hcd);
 215         if (!xhci->shared_hcd) {
 216                 retval = -ENOMEM;
 217                 goto dealloc_usb2_hcd;
 218         }
 219
 220         /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
 221          * is called by usb_add_hcd().
 222          */
 223         *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
 224
 225         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
 226                         IRQF_SHARED);
 227         if (retval)
 228                 goto put_usb3_hcd;
 229         /* Roothub already marked as USB 3.0 speed */
 230
 231         /* We know the LPM timeout algorithms for this host, let the USB core
 232          * enable and disable LPM for devices under the USB 3.0 roothub.
 233          */
 234         if (xhci->quirks & XHCI_LPM_SUPPORT)
 235                 hcd_to_bus(xhci->shared_hcd)->root_hub->lpm_capable = 1;
 236
 237         /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
 238         pm_runtime_put_noidle(&dev->dev);
 239
 240         return 0;
 241
 242 put_usb3_hcd:
 243         usb_put_hcd(xhci->shared_hcd);
 244 dealloc_usb2_hcd:
 245         usb_hcd_pci_remove(dev);
 246 put_runtime_pm:
 247         pm_runtime_put_noidle(&dev->dev);
 248         return retval;
 249 }
 250
 251 static void xhci_pci_remove(struct pci_dev *dev)
 252 {
 253         struct xhci_hcd *xhci;
 254
 255         xhci = hcd_to_xhci(pci_get_drvdata(dev));
 256         if (xhci->shared_hcd) {
 257                 usb_remove_hcd(xhci->shared_hcd);
 258                 usb_put_hcd(xhci->shared_hcd);
 259         }
 260         usb_hcd_pci_remove(dev);
 261
 262         /* Workaround for spurious wakeups at shutdown with HSW */
 263         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
 264                 pci_set_power_state(dev, PCI_D3hot);
 265
 266         kfree(xhci);
 267 }
 268
 269 #ifdef CONFIG_PM
 270 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 271 {
 272         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 273         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 274
 275         /*
 276          * Systems with the TI redriver that loses port status change events
 277          * need to have the registers polled during D3, so avoid D3cold.
 278          */
 279         if (xhci_compliance_mode_recovery_timer_quirk_check())
 280                 pdev->no_d3cold = true;
 281
 282         return xhci_suspend(xhci);
 283 }
 284
 285 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 286 {
 287         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
 288         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 289         int                     retval = 0;
 290
 291         /* The BIOS on systems with the Intel Panther Point chipset may or may
 292          * not support xHCI natively.  That means that during system resume, it
 293          * may switch the ports back to EHCI so that users can use their
 294          * keyboard to select a kernel from GRUB after resume from hibernate.
 295          *
 296          * The BIOS is supposed to remember whether the OS had xHCI ports
 297          * enabled before resume, and switch the ports back to xHCI when the
 298          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
 299          * writers.
 300          *
 301          * Unconditionally switch the ports back to xHCI after a system resume.
 302          * It should not matter whether the EHCI or xHCI controller is
 303          * resumed first. It's enough to do the switchover in xHCI because
 304          * USB core won't notice anything as the hub driver doesn't start
 305          * running again until after all the devices (including both EHCI and
 306          * xHCI host controllers) have been resumed.
 307          */
 308
 309         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
 310                 usb_enable_intel_xhci_ports(pdev);
 311
 312         retval = xhci_resume(xhci, hibernated);
 313         return retval;
 314 }
 315 #endif /* CONFIG_PM */
 316
 317 static const struct hc_driver xhci_pci_hc_driver = {
 318         .description =          hcd_name,
 319         .product_desc =         "xHCI Host Controller",
 320         .hcd_priv_size =        sizeof(struct xhci_hcd *),
 321
 322         /*
 323          * generic hardware linkage
 324          */
 325         .irq =                  xhci_irq,
 326         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
 327
 328         /*
 329          * basic lifecycle operations
 330          */
 331         .reset =                xhci_pci_setup,
 332         .start =                xhci_run,
 333 #ifdef CONFIG_PM
 334         .pci_suspend =          xhci_pci_suspend,
 335         .pci_resume =           xhci_pci_resume,
 336 #endif
 337         .stop =                 xhci_stop,
 338         .shutdown =             xhci_shutdown,
 339
 340         /*
 341          * managing i/o requests and associated device resources
 342          */
 343         .urb_enqueue =          xhci_urb_enqueue,
 344         .urb_dequeue =          xhci_urb_dequeue,
 345         .alloc_dev =            xhci_alloc_dev,
 346         .free_dev =             xhci_free_dev,
 347         .alloc_streams =        xhci_alloc_streams,
 348         .free_streams =         xhci_free_streams,
 349         .add_endpoint =         xhci_add_endpoint,
 350         .drop_endpoint =        xhci_drop_endpoint,
 351         .endpoint_reset =       xhci_endpoint_reset,
 352         .check_bandwidth =      xhci_check_bandwidth,
 353         .reset_bandwidth =      xhci_reset_bandwidth,
 354         .address_device =       xhci_address_device,
 355         .update_hub_device =    xhci_update_hub_device,
 356         .reset_device =         xhci_discover_or_reset_device,
 357
 358         /*
 359          * scheduling support
 360          */
 361         .get_frame_number =     xhci_get_frame,
 362
 363         /* Root hub support */
 364         .hub_control =          xhci_hub_control,
 365         .hub_status_data =      xhci_hub_status_data,
 366         .bus_suspend =          xhci_bus_suspend,
 367         .bus_resume =           xhci_bus_resume,
 368         /*
 369          * call back when device connected and addressed
 370          */
 371         .update_device =        xhci_update_device,
 372         .set_usb2_hw_lpm =      xhci_set_usb2_hardware_lpm,
 373         .enable_usb3_lpm_timeout =      xhci_enable_usb3_lpm_timeout,
 374         .disable_usb3_lpm_timeout =     xhci_disable_usb3_lpm_timeout,
 375         .find_raw_port_number = xhci_find_raw_port_number,
 376 };
 377
 378 /*-------------------------------------------------------------------------*/
 379
 380 /* PCI driver selection metadata; PCI hotplugging uses this */
 381 static const struct pci_device_id pci_ids[] = { {
 382         /* handle any USB 3.0 xHCI controller */
 383         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
 384         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
 385         },
 386         { /* end: all zeroes */ }
 387 };
 388 MODULE_DEVICE_TABLE(pci, pci_ids);
 389
 390 /* pci driver glue; this is a "new style" PCI driver module */
 391 static struct pci_driver xhci_pci_driver = {
 392         .name =         (char *) hcd_name,
 393         .id_table =     pci_ids,
 394
 395         .probe =        xhci_pci_probe,
 396         .remove =       xhci_pci_remove,
 397         /* suspend and resume implemented later */
 398
 399         .shutdown =     usb_hcd_pci_shutdown,
 400 #ifdef CONFIG_PM
 401         .driver = {
 402                 .pm = &usb_hcd_pci_pm_ops
 403         },
 404 #endif
 405 };
 406
 407 int __init xhci_register_pci(void)
 408 {
 409         return pci_register_driver(&xhci_pci_driver);
 410 }
 411
 412 void xhci_unregister_pci(void)
 413 {
 414         pci_unregister_driver(&xhci_pci_driver);
 415 }