| blob | a74aa233b84ede4c0b50a740a3558b821ec65e26 |
1 /*
2 * Head of the kernel - alter with care
3 *
4 * Copyright (C) 2000, 2001, 2010 Axis Communications AB
5 *
6 */
8 #include <linux/init.h>
10 #define ASSEMBLER_MACROS_ONLY
11 /* The IO_* macros use the ## token concatenation operator, so
12 -traditional must not be used when assembling this file. */
13 #include <arch/sv_addr_ag.h>
15 #define CRAMFS_MAGIC 0x28cd3d45
16 #define RAM_INIT_MAGIC 0x56902387
17 #define COMMAND_LINE_MAGIC 0x87109563
19 #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
20 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
22 ;; exported symbols
24 .globl etrax_irv
25 .globl romfs_start
26 .globl romfs_length
27 .globl romfs_in_flash
28 .globl swapper_pg_dir
30 __HEAD
32 ;; This is the entry point of the kernel. We are in supervisor mode.
33 ;; 0x00000000 if Flash, 0x40004000 if DRAM
34 ;; since etrax actually starts at address 2 when booting from flash, we
35 ;; put a nop (2 bytes) here first so we dont accidentally skip the di
36 ;;
37 ;; NOTICE! The registers r8 and r9 are used as parameters carrying
38 ;; information from the decompressor (if the kernel was compressed).
39 ;; They should not be used in the code below until read.
41 nop
42 di
44 ;; First setup the kseg_c mapping from where the kernel is linked
45 ;; to 0x40000000 (where the actual DRAM resides) otherwise
46 ;; we cannot do very much! See arch/cris/README.mm
47 ;;
48 ;; Notice that since we're potentially running at 0x00 or 0x40 right now,
49 ;; we will get a fault as soon as we enable the MMU if we dont
50 ;; temporarily map those segments linearily.
51 ;;
52 ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory
53 ;; slightly different. The bug is that you can't remap bit 31 of
54 ;; an address. Though we can check the version register for
55 ;; whether the bug is present, some constants would then have to
56 ;; be variables, so we don't. The drawback is that you can "only" map
57 ;; 1G per process with CONFIG_CRIS_LOW_MAP.
59 #ifdef CONFIG_CRIS_LOW_MAP
60 ; kseg mappings, temporary map of 0xc0->0x40
61 move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
62 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \
63 | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \
64 | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
65 move.d $r0, [R_MMU_KBASE_HI]
67 ; temporary map of 0x40->0x40 and 0x60->0x40
68 move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \
69 | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
70 move.d $r0, [R_MMU_KBASE_LO]
72 ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
73 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
74 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
75 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
76 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
77 | IO_STATE (R_MMU_CONFIG, seg_f, page) \
78 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
79 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
80 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
81 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
82 | IO_STATE (R_MMU_CONFIG, seg_a, seg) \
83 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
84 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
85 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
86 | IO_STATE (R_MMU_CONFIG, seg_6, seg) \
87 | IO_STATE (R_MMU_CONFIG, seg_5, seg) \
88 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
89 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
90 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
91 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
92 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
93 move.d $r0, [R_MMU_CONFIG]
94 #else
95 ; kseg mappings
96 move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \
97 | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
98 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
99 move.d $r0, [R_MMU_KBASE_HI]
101 ; temporary map of 0x40->0x40 and 0x00->0x00
102 move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
103 move.d $r0, [R_MMU_KBASE_LO]
105 ; mmu enable, segs f,e,c,b,4,0 segment mapped
106 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
107 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
108 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
109 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
110 | IO_STATE (R_MMU_CONFIG, seg_f, seg) \
111 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
112 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
113 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
114 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
115 | IO_STATE (R_MMU_CONFIG, seg_a, page) \
116 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
117 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
118 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
119 | IO_STATE (R_MMU_CONFIG, seg_6, page) \
120 | IO_STATE (R_MMU_CONFIG, seg_5, page) \
121 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
122 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
123 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
124 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
125 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
126 move.d $r0, [R_MMU_CONFIG]
127 #endif
129 ;; Now we need to sort out the segments and their locations in RAM or
130 ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces:
131 ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image
132 ;; But the linker has linked the kernel to expect this layout in
133 ;; DRAM memory:
134 ;; 1) kernel text, 2) kernel data, 3) kernel BSS
135 ;; (the location of the ROM filesystem is determined by the krom driver)
136 ;; If we boot this from Flash, we want to keep the ROM filesystem in
137 ;; the flash, we want to copy the text and need to copy the data to DRAM.
138 ;; But if we boot from DRAM, we need to move the ROMFS image
139 ;; from its position after kernel data, to after kernel BSS, BEFORE the
140 ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS)
141 ;;
142 ;; In both cases, we start in un-cached mode, and need to jump into a
143 ;; cached PC after we're done fiddling around with the segments.
144 ;;
145 ;; arch/etrax100/etrax100.ld sets some symbols that define the start
146 ;; and end of each segment.
148 ;; Check if we start from DRAM or FLASH by testing PC
150 move.d $pc,$r0
151 and.d 0x7fffffff,$r0 ; get rid of the non-cache bit
152 cmp.d 0x10000,$r0 ; arbitrary... just something above this code
153 blo _inflash0
154 nop
156 jump _inram ; enter cached ram
158 ;; Jumpgate for branches.
159 _inflash0:
160 jump _inflash
162 ;; Put this in a suitable section where we can reclaim storage
163 ;; after init.
164 __INIT
165 _inflash:
166 #ifdef CONFIG_ETRAX_ETHERNET
167 ;; Start MII clock to make sure it is running when tranceiver is reset
168 move.d START_ETHERNET_CLOCK, $r0
169 move.d $r0, [R_NETWORK_GEN_CONFIG]
170 #endif
172 ;; Set up waitstates etc according to kernel configuration.
173 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
174 move.d $r0, [R_WAITSTATES]
176 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
177 move.d $r0, [R_BUS_CONFIG]
179 ;; We need to initialze DRAM registers before we start using the DRAM
181 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
182 beq _dram_init_finished
183 nop
185 #include "../lib/dram_init.S"
187 _dram_init_finished:
188 ;; Copy text+data to DRAM
189 ;; This is fragile - the calculation of r4 as the image size depends
190 ;; on that the labels below actually are the first and last positions
191 ;; in the linker-script.
192 ;;
193 ;; Then the locating of the cramfs image depends on the aforementioned
194 ;; image being located in the flash at 0. This is most often not true,
195 ;; thus the following does not work (normally there is a rescue-block
196 ;; between the physical start of the flash and the flash-image start,
197 ;; and when run with compression, the kernel is actually unpacked to
198 ;; DRAM and we never get here in the first place :))
200 moveq 0, $r0 ; source
201 move.d text_start, $r1 ; destination
202 move.d __vmlinux_end, $r2 ; end destination
203 move.d $r2, $r4
204 sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below
205 1: move.w [$r0+], $r3
206 move.w $r3, [$r1+]
207 cmp.d $r2, $r1
208 blo 1b
209 nop
211 ;; We keep the cramfs in the flash.
212 ;; There might be none, but that does not matter because
213 ;; we don't do anything than read some bytes here.
215 moveq 0, $r0
216 move.d $r0, [romfs_length] ; default if there is no cramfs
218 move.d [$r4], $r0 ; cramfs_super.magic
219 cmp.d CRAMFS_MAGIC, $r0
220 bne 1f
221 nop
222 move.d [$r4 + 4], $r0 ; cramfs_super.size
223 move.d $r0, [romfs_length]
224 #ifdef CONFIG_CRIS_LOW_MAP
225 add.d 0x50000000, $r4 ; add flash start in virtual memory (cached)
226 #else
227 add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached)
228 #endif
229 move.d $r4, [romfs_start]
230 1:
231 moveq 1, $r0
232 move.d $r0, [romfs_in_flash]
234 jump _start_it ; enter code, cached this time
236 _inram:
237 ;; Move the ROM fs to after BSS end. This assumes that the cramfs
238 ;; second longword contains the length of the cramfs
240 moveq 0, $r0
241 move.d $r0, [romfs_length] ; default if there is no cramfs
243 ;; The kernel could have been unpacked to DRAM by the loader, but
244 ;; the cramfs image could still be in the Flash directly after the
245 ;; compressed kernel image. The loader passes the address of the
246 ;; byte succeeding the last compressed byte in the flash in the
247 ;; register r9 when starting the kernel. Check if r9 points to a
248 ;; decent cramfs image!
249 ;; (Notice that if this is not booted from the loader, r9 will be
250 ;; garbage but we do sanity checks on it, the chance that it points
251 ;; to a cramfs magic is small.. )
253 cmp.d 0x0ffffff8, $r9
254 bhs _no_romfs_in_flash ; r9 points outside the flash area
255 nop
256 move.d [$r9], $r0 ; cramfs_super.magic
257 cmp.d CRAMFS_MAGIC, $r0
258 bne _no_romfs_in_flash
259 nop
260 move.d [$r9+4], $r0 ; cramfs_super.length
261 move.d $r0, [romfs_length]
262 #ifdef CONFIG_CRIS_LOW_MAP
263 add.d 0x50000000, $r9 ; add flash start in virtual memory (cached)
264 #else
265 add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached)
266 #endif
267 move.d $r9, [romfs_start]
269 moveq 1, $r0
270 move.d $r0, [romfs_in_flash]
272 jump _start_it ; enter code, cached this time
274 _no_romfs_in_flash:
276 ;; Check if there is a cramfs (magic value).
277 ;; Notice that we check for cramfs magic value - which is
278 ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
279 ;; not need this mechanism anyway)
281 move.d __init_end, $r0; the image will be after the end of init
282 move.d [$r0], $r1 ; cramfs assumes same endian on host/target
283 cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock
284 bne 2f
285 nop
287 ;; Ok. What is its size ?
289 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
291 ;; We want to copy it to the end of the BSS
293 move.d _end, $r1
295 ;; Remember values so cramfs and setup can find this info
297 move.d $r1, [romfs_start] ; new romfs location
298 move.d $r2, [romfs_length]
300 ;; We need to copy it backwards, since they can be overlapping
302 add.d $r2, $r0
303 add.d $r2, $r1
305 ;; Go ahead. Make my loop.
307 lsrq 1, $r2 ; size is in bytes, we copy words
309 1: move.w [$r0=$r0-2],$r3
310 move.w $r3,[$r1=$r1-2]
311 subq 1, $r2
312 bne 1b
313 nop
315 2:
316 ;; Dont worry that the BSS is tainted. It will be cleared later.
318 moveq 0, $r0
319 move.d $r0, [romfs_in_flash]
321 jump _start_it ; better skip the additional cramfs check below
323 _start_it:
325 ;; Check if kernel command line is supplied
326 cmp.d COMMAND_LINE_MAGIC, $r10
327 bne no_command_line
328 nop
330 move.d 256, $r13
331 move.d cris_command_line, $r10
332 or.d 0x80000000, $r11 ; Make it virtual
333 1:
334 move.b [$r11+], $r12
335 move.b $r12, [$r10+]
336 subq 1, $r13
337 bne 1b
338 nop
340 no_command_line:
342 ;; the kernel stack is overlayed with the task structure for each
343 ;; task. thus the initial kernel stack is in the same page as the
344 ;; init_task (but starts in the top of the page, size 8192)
345 move.d init_thread_union + 8192, $sp
346 move.d ibr_start,$r0 ; this symbol is set by the linker script
347 move $r0,$ibr
348 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
350 ;; Clear BSS region, from _bss_start to _end
352 move.d __bss_start, $r0
353 move.d _end, $r1
354 1: clear.d [$r0+]
355 cmp.d $r1, $r0
356 blo 1b
357 nop
359 ;; Etrax product HW genconfig setup
361 moveq 0,$r0
363 ;; Select or disable serial port 2
364 #ifdef CONFIG_ETRAX_SERIAL_PORT2
365 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
366 #else
367 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
368 #endif
370 ;; Init interfaces (disable them).
371 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
372 | IO_STATE (R_GEN_CONFIG, ata, disable) \
373 | IO_STATE (R_GEN_CONFIG, par0, disable) \
374 | IO_STATE (R_GEN_CONFIG, mio, disable) \
375 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
376 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
377 | IO_STATE (R_GEN_CONFIG, par1, disable) \
378 | IO_STATE (R_GEN_CONFIG, ser3, disable) \
379 | IO_STATE (R_GEN_CONFIG, mio_w, disable) \
380 | IO_STATE (R_GEN_CONFIG, usb1, disable) \
381 | IO_STATE (R_GEN_CONFIG, usb2, disable) \
382 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
384 ;; Init DMA channel muxing (set to unused clients).
385 or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \
386 | IO_STATE (R_GEN_CONFIG, dma3, ata) \
387 | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \
388 | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \
389 | IO_STATE (R_GEN_CONFIG, dma6, unused) \
390 | IO_STATE (R_GEN_CONFIG, dma7, unused) \
391 | IO_STATE (R_GEN_CONFIG, dma8, usb) \
392 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
395 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
397 move.d $r0,[R_GEN_CONFIG]
399 #if 0
400 moveq 4,$r0
401 move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
402 move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
403 1: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish
404 and.b 7,$r0
405 cmp.b 4,$r0
406 beq 1b
407 nop
408 1: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish
409 and.b 7,$r0
410 cmp.b 4,$r0
411 beq 1b
412 nop
413 #endif
415 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
416 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
417 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
418 1: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
419 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0
420 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
421 beq 1b
422 nop
423 1: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
424 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0
425 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
426 beq 1b
427 nop
429 ;; setup port PA and PB default initial directions and data
430 ;; including their shadow registers
432 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
433 move.b $r0,[port_pa_dir_shadow]
434 move.b $r0,[R_PORT_PA_DIR]
435 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
436 move.b $r0,[port_pa_data_shadow]
437 move.b $r0,[R_PORT_PA_DATA]
439 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
440 move.b $r0,[port_pb_config_shadow]
441 move.b $r0,[R_PORT_PB_CONFIG]
442 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
443 move.b $r0,[port_pb_dir_shadow]
444 move.b $r0,[R_PORT_PB_DIR]
445 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
446 move.b $r0,[port_pb_data_shadow]
447 move.b $r0,[R_PORT_PB_DATA]
449 moveq 0, $r0
450 move.d $r0,[port_pb_i2c_shadow]
451 move.d $r0, [R_PORT_PB_I2C]
453 moveq 0,$r0
454 move.d $r0,[port_g_data_shadow]
455 move.d $r0,[R_PORT_G_DATA]
457 ;; setup the serial port 0 at 115200 baud for debug purposes
459 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
460 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
461 | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
462 move.d $r0,[R_SERIAL0_XOFF]
464 ; 115.2kbaud for both transmit and receive
465 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
466 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
467 move.b $r0,[R_SERIAL0_BAUD]
469 ; Set up and enable the serial0 receiver.
470 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
471 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
472 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
473 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
474 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
475 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
476 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
477 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
478 move.b $r0,[R_SERIAL0_REC_CTRL]
480 ; Set up and enable the serial0 transmitter.
481 move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \
482 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
483 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
484 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
485 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
486 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
487 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
488 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
489 move.b $r0,[R_SERIAL0_TR_CTRL]
491 ;; setup the serial port 1 at 115200 baud for debug purposes
493 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
494 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
495 | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
496 move.d $r0,[R_SERIAL1_XOFF]
498 ; 115.2kbaud for both transmit and receive
499 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
500 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
501 move.b $r0,[R_SERIAL1_BAUD]
503 ; Set up and enable the serial1 receiver.
504 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
505 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
506 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
507 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
508 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
509 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
510 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
511 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
512 move.b $r0,[R_SERIAL1_REC_CTRL]
514 ; Set up and enable the serial1 transmitter.
515 move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \
516 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
517 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
518 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
519 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
520 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
521 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
522 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
523 move.b $r0,[R_SERIAL1_TR_CTRL]
525 #ifdef CONFIG_ETRAX_SERIAL_PORT2
526 ;; setup the serial port 2 at 115200 baud for debug purposes
528 moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \
529 | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \
530 | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0
531 move.d $r0,[R_SERIAL2_XOFF]
533 ; 115.2kbaud for both transmit and receive
534 move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
535 | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
536 move.b $r0,[R_SERIAL2_BAUD]
538 ; Set up and enable the serial2 receiver.
539 move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
540 | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
541 | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \
542 | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \
543 | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \
544 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \
545 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \
546 | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
547 move.b $r0,[R_SERIAL2_REC_CTRL]
549 ; Set up and enable the serial2 transmitter.
550 move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \
551 | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \
552 | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \
553 | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \
554 | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \
555 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \
556 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \
557 | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
558 move.b $r0,[R_SERIAL2_TR_CTRL]
559 #endif
561 #ifdef CONFIG_ETRAX_SERIAL_PORT3
562 ;; setup the serial port 3 at 115200 baud for debug purposes
564 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
565 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
566 | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
567 move.d $r0,[R_SERIAL3_XOFF]
569 ; 115.2kbaud for both transmit and receive
570 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
571 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
572 move.b $r0,[R_SERIAL3_BAUD]
574 ; Set up and enable the serial3 receiver.
575 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
576 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
577 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
578 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
579 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
580 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
581 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
582 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
583 move.b $r0,[R_SERIAL3_REC_CTRL]
585 ; Set up and enable the serial3 transmitter.
586 move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \
587 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
588 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
589 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
590 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
591 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
592 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
593 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
594 move.b $r0,[R_SERIAL3_TR_CTRL]
595 #endif
597 jump start_kernel ; jump into the C-function start_kernel in init/main.c
599 .data
600 etrax_irv:
601 .dword 0
602 romfs_start:
603 .dword 0
604 romfs_length:
605 .dword 0
606 romfs_in_flash:
607 .dword 0
609 ;; put some special pages at the beginning of the kernel aligned
610 ;; to page boundaries - the kernel cannot start until after this
612 #ifdef CONFIG_CRIS_LOW_MAP
613 swapper_pg_dir = 0x60002000
614 #else
615 swapper_pg_dir = 0xc0002000
616 #endif
618 .section ".init.data", "aw"
619 #include "../lib/hw_settings.S"