Linux 4.8-rc8
[linux/fpc-iii.git] / arch / s390 / include / asm / processor.h
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1 /*
2 * S390 version
3 * Copyright IBM Corp. 1999
4 * Author(s): Hartmut Penner (hp@de.ibm.com),
5 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Derived from "include/asm-i386/processor.h"
8 * Copyright (C) 1994, Linus Torvalds
9 */
11 #ifndef __ASM_S390_PROCESSOR_H
12 #define __ASM_S390_PROCESSOR_H
14 #include <linux/const.h>
16 #define CIF_MCCK_PENDING 0 /* machine check handling is pending */
17 #define CIF_ASCE 1 /* user asce needs fixup / uaccess */
18 #define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */
19 #define CIF_FPU 3 /* restore FPU registers */
20 #define CIF_IGNORE_IRQ 4 /* ignore interrupt (for udelay) */
21 #define CIF_ENABLED_WAIT 5 /* in enabled wait state */
23 #define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING)
24 #define _CIF_ASCE _BITUL(CIF_ASCE)
25 #define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY)
26 #define _CIF_FPU _BITUL(CIF_FPU)
27 #define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ)
28 #define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT)
30 #ifndef __ASSEMBLY__
32 #include <linux/linkage.h>
33 #include <linux/irqflags.h>
34 #include <asm/cpu.h>
35 #include <asm/page.h>
36 #include <asm/ptrace.h>
37 #include <asm/setup.h>
38 #include <asm/runtime_instr.h>
39 #include <asm/fpu/types.h>
40 #include <asm/fpu/internal.h>
42 static inline void set_cpu_flag(int flag)
44 S390_lowcore.cpu_flags |= (1UL << flag);
47 static inline void clear_cpu_flag(int flag)
49 S390_lowcore.cpu_flags &= ~(1UL << flag);
52 static inline int test_cpu_flag(int flag)
54 return !!(S390_lowcore.cpu_flags & (1UL << flag));
58 * Test CIF flag of another CPU. The caller needs to ensure that
59 * CPU hotplug can not happen, e.g. by disabling preemption.
61 static inline int test_cpu_flag_of(int flag, int cpu)
63 struct lowcore *lc = lowcore_ptr[cpu];
64 return !!(lc->cpu_flags & (1UL << flag));
67 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
70 * Default implementation of macro that returns current
71 * instruction pointer ("program counter").
73 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
75 static inline void get_cpu_id(struct cpuid *ptr)
77 asm volatile("stidp %0" : "=Q" (*ptr));
80 void s390_adjust_jiffies(void);
81 void s390_update_cpu_mhz(void);
82 void cpu_detect_mhz_feature(void);
84 extern const struct seq_operations cpuinfo_op;
85 extern int sysctl_ieee_emulation_warnings;
86 extern void execve_tail(void);
89 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
92 #define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
93 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
94 (1UL << 30) : (1UL << 41))
95 #define TASK_SIZE TASK_SIZE_OF(current)
96 #define TASK_MAX_SIZE (1UL << 53)
98 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
99 #define STACK_TOP_MAX (1UL << 42)
101 #define HAVE_ARCH_PICK_MMAP_LAYOUT
103 typedef struct {
104 __u32 ar4;
105 } mm_segment_t;
108 * Thread structure
110 struct thread_struct {
111 unsigned int acrs[NUM_ACRS];
112 unsigned long ksp; /* kernel stack pointer */
113 mm_segment_t mm_segment;
114 unsigned long gmap_addr; /* address of last gmap fault. */
115 unsigned int gmap_write_flag; /* gmap fault write indication */
116 unsigned int gmap_int_code; /* int code of last gmap fault */
117 unsigned int gmap_pfault; /* signal of a pending guest pfault */
118 struct per_regs per_user; /* User specified PER registers */
119 struct per_event per_event; /* Cause of the last PER trap */
120 unsigned long per_flags; /* Flags to control debug behavior */
121 /* pfault_wait is used to block the process on a pfault event */
122 unsigned long pfault_wait;
123 struct list_head list;
124 /* cpu runtime instrumentation */
125 struct runtime_instr_cb *ri_cb;
126 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
128 * Warning: 'fpu' is dynamically-sized. It *MUST* be at
129 * the end.
131 struct fpu fpu; /* FP and VX register save area */
134 /* Flag to disable transactions. */
135 #define PER_FLAG_NO_TE 1UL
136 /* Flag to enable random transaction aborts. */
137 #define PER_FLAG_TE_ABORT_RAND 2UL
138 /* Flag to specify random transaction abort mode:
139 * - abort each transaction at a random instruction before TEND if set.
140 * - abort random transactions at a random instruction if cleared.
142 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL
144 typedef struct thread_struct thread_struct;
147 * Stack layout of a C stack frame.
149 #ifndef __PACK_STACK
150 struct stack_frame {
151 unsigned long back_chain;
152 unsigned long empty1[5];
153 unsigned long gprs[10];
154 unsigned int empty2[8];
156 #else
157 struct stack_frame {
158 unsigned long empty1[5];
159 unsigned int empty2[8];
160 unsigned long gprs[10];
161 unsigned long back_chain;
163 #endif
165 #define ARCH_MIN_TASKALIGN 8
167 #define INIT_THREAD { \
168 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
169 .fpu.regs = (void *) init_task.thread.fpu.fprs, \
173 * Do necessary setup to start up a new thread.
175 #define start_thread(regs, new_psw, new_stackp) do { \
176 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
177 regs->psw.addr = new_psw; \
178 regs->gprs[15] = new_stackp; \
179 execve_tail(); \
180 } while (0)
182 #define start_thread31(regs, new_psw, new_stackp) do { \
183 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
184 regs->psw.addr = new_psw; \
185 regs->gprs[15] = new_stackp; \
186 crst_table_downgrade(current->mm); \
187 execve_tail(); \
188 } while (0)
190 /* Forward declaration, a strange C thing */
191 struct task_struct;
192 struct mm_struct;
193 struct seq_file;
195 typedef int (*dump_trace_func_t)(void *data, unsigned long address);
196 void dump_trace(dump_trace_func_t func, void *data,
197 struct task_struct *task, unsigned long sp);
199 void show_cacheinfo(struct seq_file *m);
201 /* Free all resources held by a thread. */
202 extern void release_thread(struct task_struct *);
205 * Return saved PC of a blocked thread.
207 extern unsigned long thread_saved_pc(struct task_struct *t);
209 unsigned long get_wchan(struct task_struct *p);
210 #define task_pt_regs(tsk) ((struct pt_regs *) \
211 (task_stack_page(tsk) + THREAD_SIZE) - 1)
212 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
213 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
215 /* Has task runtime instrumentation enabled ? */
216 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
218 static inline unsigned long current_stack_pointer(void)
220 unsigned long sp;
222 asm volatile("la %0,0(15)" : "=a" (sp));
223 return sp;
226 static inline unsigned short stap(void)
228 unsigned short cpu_address;
230 asm volatile("stap %0" : "=m" (cpu_address));
231 return cpu_address;
235 * Give up the time slice of the virtual PU.
237 void cpu_relax(void);
239 #define cpu_relax_lowlatency() barrier()
241 #define ECAG_CACHE_ATTRIBUTE 0
242 #define ECAG_CPU_ATTRIBUTE 1
244 static inline unsigned long __ecag(unsigned int asi, unsigned char parm)
246 unsigned long val;
248 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */
249 : "=d" (val) : "a" (asi << 8 | parm));
250 return val;
253 static inline void psw_set_key(unsigned int key)
255 asm volatile("spka 0(%0)" : : "d" (key));
259 * Set PSW to specified value.
261 static inline void __load_psw(psw_t psw)
263 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
267 * Set PSW mask to specified value, while leaving the
268 * PSW addr pointing to the next instruction.
270 static inline void __load_psw_mask(unsigned long mask)
272 unsigned long addr;
273 psw_t psw;
275 psw.mask = mask;
277 asm volatile(
278 " larl %0,1f\n"
279 " stg %0,%O1+8(%R1)\n"
280 " lpswe %1\n"
281 "1:"
282 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
286 * Extract current PSW mask
288 static inline unsigned long __extract_psw(void)
290 unsigned int reg1, reg2;
292 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
293 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
296 static inline void local_mcck_enable(void)
298 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
301 static inline void local_mcck_disable(void)
303 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
307 * Rewind PSW instruction address by specified number of bytes.
309 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
311 unsigned long mask;
313 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
314 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
315 (1UL << 24) - 1;
316 return (psw.addr - ilc) & mask;
320 * Function to stop a processor until the next interrupt occurs
322 void enabled_wait(void);
325 * Function to drop a processor into disabled wait state
327 static inline void __noreturn disabled_wait(unsigned long code)
329 psw_t psw;
331 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
332 psw.addr = code;
333 __load_psw(psw);
334 while (1);
338 * Basic Machine Check/Program Check Handler.
341 extern void s390_base_mcck_handler(void);
342 extern void s390_base_pgm_handler(void);
343 extern void s390_base_ext_handler(void);
345 extern void (*s390_base_mcck_handler_fn)(void);
346 extern void (*s390_base_pgm_handler_fn)(void);
347 extern void (*s390_base_ext_handler_fn)(void);
349 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
351 extern int memcpy_real(void *, void *, size_t);
352 extern void memcpy_absolute(void *, void *, size_t);
354 #define mem_assign_absolute(dest, val) { \
355 __typeof__(dest) __tmp = (val); \
357 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
358 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
361 #endif /* __ASSEMBLY__ */
363 #endif /* __ASM_S390_PROCESSOR_H */