1 /* smp.c: Sparc64 SMP support.
3 * Copyright (C) 1997, 2007, 2008 David S. Miller (davem@davemloft.net)
6 #include <linux/export.h>
7 #include <linux/kernel.h>
8 #include <linux/sched.h>
10 #include <linux/pagemap.h>
11 #include <linux/threads.h>
12 #include <linux/smp.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/delay.h>
16 #include <linux/init.h>
17 #include <linux/spinlock.h>
19 #include <linux/seq_file.h>
20 #include <linux/cache.h>
21 #include <linux/jiffies.h>
22 #include <linux/profile.h>
23 #include <linux/bootmem.h>
24 #include <linux/vmalloc.h>
25 #include <linux/ftrace.h>
26 #include <linux/cpu.h>
27 #include <linux/slab.h>
28 #include <linux/kgdb.h>
31 #include <asm/ptrace.h>
32 #include <linux/atomic.h>
33 #include <asm/tlbflush.h>
34 #include <asm/mmu_context.h>
35 #include <asm/cpudata.h>
36 #include <asm/hvtramp.h>
38 #include <asm/timer.h>
39 #include <asm/setup.h>
42 #include <asm/irq_regs.h>
44 #include <asm/pgtable.h>
45 #include <asm/oplib.h>
46 #include <asm/uaccess.h>
47 #include <asm/starfire.h>
49 #include <asm/sections.h>
51 #include <asm/mdesc.h>
53 #include <asm/hypervisor.h>
59 DEFINE_PER_CPU(cpumask_t
, cpu_sibling_map
) = CPU_MASK_NONE
;
60 cpumask_t cpu_core_map
[NR_CPUS
] __read_mostly
=
61 { [0 ... NR_CPUS
-1] = CPU_MASK_NONE
};
63 cpumask_t cpu_core_sib_map
[NR_CPUS
] __read_mostly
= {
64 [0 ... NR_CPUS
-1] = CPU_MASK_NONE
};
66 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
67 EXPORT_SYMBOL(cpu_core_map
);
68 EXPORT_SYMBOL(cpu_core_sib_map
);
70 static cpumask_t smp_commenced_mask
;
72 void smp_info(struct seq_file
*m
)
76 seq_printf(m
, "State:\n");
77 for_each_online_cpu(i
)
78 seq_printf(m
, "CPU%d:\t\tonline\n", i
);
81 void smp_bogo(struct seq_file
*m
)
85 for_each_online_cpu(i
)
87 "Cpu%dClkTck\t: %016lx\n",
88 i
, cpu_data(i
).clock_tick
);
91 extern void setup_sparc64_timer(void);
93 static volatile unsigned long callin_flag
= 0;
97 int cpuid
= hard_smp_processor_id();
99 __local_per_cpu_offset
= __per_cpu_offset(cpuid
);
101 if (tlb_type
== hypervisor
)
102 sun4v_ktsb_register();
106 setup_sparc64_timer();
108 if (cheetah_pcache_forced_on
)
109 cheetah_enable_pcache();
112 __asm__
__volatile__("membar #Sync\n\t"
113 "flush %%g6" : : : "memory");
115 /* Clear this or we will die instantly when we
116 * schedule back to this idler...
118 current_thread_info()->new_child
= 0;
120 /* Attach to the address space of init_task. */
121 atomic_inc(&init_mm
.mm_count
);
122 current
->active_mm
= &init_mm
;
124 /* inform the notifiers about the new cpu */
125 notify_cpu_starting(cpuid
);
127 while (!cpumask_test_cpu(cpuid
, &smp_commenced_mask
))
130 set_cpu_online(cpuid
, true);
132 /* idle thread is expected to have preempt disabled */
137 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE
);
142 printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id());
143 panic("SMP bolixed\n");
146 /* This tick register synchronization scheme is taken entirely from
147 * the ia64 port, see arch/ia64/kernel/smpboot.c for details and credit.
149 * The only change I've made is to rework it so that the master
150 * initiates the synchonization instead of the slave. -DaveM
154 #define SLAVE (SMP_CACHE_BYTES/sizeof(unsigned long))
156 #define NUM_ROUNDS 64 /* magic value */
157 #define NUM_ITERS 5 /* likewise */
159 static DEFINE_RAW_SPINLOCK(itc_sync_lock
);
160 static unsigned long go
[SLAVE
+ 1];
162 #define DEBUG_TICK_SYNC 0
164 static inline long get_delta (long *rt
, long *master
)
166 unsigned long best_t0
= 0, best_t1
= ~0UL, best_tm
= 0;
167 unsigned long tcenter
, t0
, t1
, tm
;
170 for (i
= 0; i
< NUM_ITERS
; i
++) {
171 t0
= tick_ops
->get_tick();
173 membar_safe("#StoreLoad");
174 while (!(tm
= go
[SLAVE
]))
178 t1
= tick_ops
->get_tick();
180 if (t1
- t0
< best_t1
- best_t0
)
181 best_t0
= t0
, best_t1
= t1
, best_tm
= tm
;
184 *rt
= best_t1
- best_t0
;
185 *master
= best_tm
- best_t0
;
187 /* average best_t0 and best_t1 without overflow: */
188 tcenter
= (best_t0
/2 + best_t1
/2);
189 if (best_t0
% 2 + best_t1
% 2 == 2)
191 return tcenter
- best_tm
;
194 void smp_synchronize_tick_client(void)
196 long i
, delta
, adj
, adjust_latency
= 0, done
= 0;
197 unsigned long flags
, rt
, master_time_stamp
;
200 long rt
; /* roundtrip time */
201 long master
; /* master's timestamp */
202 long diff
; /* difference between midpoint and master's timestamp */
203 long lat
; /* estimate of itc adjustment latency */
212 local_irq_save(flags
);
214 for (i
= 0; i
< NUM_ROUNDS
; i
++) {
215 delta
= get_delta(&rt
, &master_time_stamp
);
217 done
= 1; /* let's lock on to this... */
221 adjust_latency
+= -delta
;
222 adj
= -delta
+ adjust_latency
/4;
226 tick_ops
->add_tick(adj
);
230 t
[i
].master
= master_time_stamp
;
232 t
[i
].lat
= adjust_latency
/4;
236 local_irq_restore(flags
);
239 for (i
= 0; i
< NUM_ROUNDS
; i
++)
240 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
241 t
[i
].rt
, t
[i
].master
, t
[i
].diff
, t
[i
].lat
);
244 printk(KERN_INFO
"CPU %d: synchronized TICK with master CPU "
245 "(last diff %ld cycles, maxerr %lu cycles)\n",
246 smp_processor_id(), delta
, rt
);
249 static void smp_start_sync_tick_client(int cpu
);
251 static void smp_synchronize_one_tick(int cpu
)
253 unsigned long flags
, i
;
257 smp_start_sync_tick_client(cpu
);
259 /* wait for client to be ready */
263 /* now let the client proceed into his loop */
265 membar_safe("#StoreLoad");
267 raw_spin_lock_irqsave(&itc_sync_lock
, flags
);
269 for (i
= 0; i
< NUM_ROUNDS
*NUM_ITERS
; i
++) {
274 go
[SLAVE
] = tick_ops
->get_tick();
275 membar_safe("#StoreLoad");
278 raw_spin_unlock_irqrestore(&itc_sync_lock
, flags
);
281 #if defined(CONFIG_SUN_LDOMS) && defined(CONFIG_HOTPLUG_CPU)
282 static void ldom_startcpu_cpuid(unsigned int cpu
, unsigned long thread_reg
,
285 extern unsigned long sparc64_ttable_tl0
;
286 extern unsigned long kern_locked_tte_data
;
287 struct hvtramp_descr
*hdesc
;
288 unsigned long trampoline_ra
;
289 struct trap_per_cpu
*tb
;
290 u64 tte_vaddr
, tte_data
;
291 unsigned long hv_err
;
294 hdesc
= kzalloc(sizeof(*hdesc
) +
295 (sizeof(struct hvtramp_mapping
) *
296 num_kernel_image_mappings
- 1),
299 printk(KERN_ERR
"ldom_startcpu_cpuid: Cannot allocate "
306 hdesc
->num_mappings
= num_kernel_image_mappings
;
308 tb
= &trap_block
[cpu
];
310 hdesc
->fault_info_va
= (unsigned long) &tb
->fault_info
;
311 hdesc
->fault_info_pa
= kimage_addr_to_ra(&tb
->fault_info
);
313 hdesc
->thread_reg
= thread_reg
;
315 tte_vaddr
= (unsigned long) KERNBASE
;
316 tte_data
= kern_locked_tte_data
;
318 for (i
= 0; i
< hdesc
->num_mappings
; i
++) {
319 hdesc
->maps
[i
].vaddr
= tte_vaddr
;
320 hdesc
->maps
[i
].tte
= tte_data
;
321 tte_vaddr
+= 0x400000;
322 tte_data
+= 0x400000;
325 trampoline_ra
= kimage_addr_to_ra(hv_cpu_startup
);
327 hv_err
= sun4v_cpu_start(cpu
, trampoline_ra
,
328 kimage_addr_to_ra(&sparc64_ttable_tl0
),
331 printk(KERN_ERR
"ldom_startcpu_cpuid: sun4v_cpu_start() "
332 "gives error %lu\n", hv_err
);
336 extern unsigned long sparc64_cpu_startup
;
338 /* The OBP cpu startup callback truncates the 3rd arg cookie to
339 * 32-bits (I think) so to be safe we have it read the pointer
340 * contained here so we work on >4GB machines. -DaveM
342 static struct thread_info
*cpu_new_thread
= NULL
;
344 static int smp_boot_one_cpu(unsigned int cpu
, struct task_struct
*idle
)
346 unsigned long entry
=
347 (unsigned long)(&sparc64_cpu_startup
);
348 unsigned long cookie
=
349 (unsigned long)(&cpu_new_thread
);
354 cpu_new_thread
= task_thread_info(idle
);
356 if (tlb_type
== hypervisor
) {
357 #if defined(CONFIG_SUN_LDOMS) && defined(CONFIG_HOTPLUG_CPU)
358 if (ldom_domaining_enabled
)
359 ldom_startcpu_cpuid(cpu
,
360 (unsigned long) cpu_new_thread
,
364 prom_startcpu_cpuid(cpu
, entry
, cookie
);
366 struct device_node
*dp
= of_find_node_by_cpuid(cpu
);
368 prom_startcpu(dp
->phandle
, entry
, cookie
);
371 for (timeout
= 0; timeout
< 50000; timeout
++) {
380 printk("Processor %d is stuck.\n", cpu
);
383 cpu_new_thread
= NULL
;
390 static void spitfire_xcall_helper(u64 data0
, u64 data1
, u64 data2
, u64 pstate
, unsigned long cpu
)
395 if (this_is_starfire
) {
396 /* map to real upaid */
397 cpu
= (((cpu
& 0x3c) << 1) |
398 ((cpu
& 0x40) >> 4) |
402 target
= (cpu
<< 14) | 0x70;
404 /* Ok, this is the real Spitfire Errata #54.
405 * One must read back from a UDB internal register
406 * after writes to the UDB interrupt dispatch, but
407 * before the membar Sync for that write.
408 * So we use the high UDB control register (ASI 0x7f,
409 * ADDR 0x20) for the dummy read. -DaveM
412 __asm__
__volatile__(
413 "wrpr %1, %2, %%pstate\n\t"
414 "stxa %4, [%0] %3\n\t"
415 "stxa %5, [%0+%8] %3\n\t"
417 "stxa %6, [%0+%8] %3\n\t"
419 "stxa %%g0, [%7] %3\n\t"
422 "ldxa [%%g1] 0x7f, %%g0\n\t"
425 : "r" (pstate
), "i" (PSTATE_IE
), "i" (ASI_INTR_W
),
426 "r" (data0
), "r" (data1
), "r" (data2
), "r" (target
),
427 "r" (0x10), "0" (tmp
)
430 /* NOTE: PSTATE_IE is still clear. */
433 __asm__
__volatile__("ldxa [%%g0] %1, %0"
435 : "i" (ASI_INTR_DISPATCH_STAT
));
437 __asm__
__volatile__("wrpr %0, 0x0, %%pstate"
444 } while (result
& 0x1);
445 __asm__
__volatile__("wrpr %0, 0x0, %%pstate"
448 printk("CPU[%d]: mondo stuckage result[%016llx]\n",
449 smp_processor_id(), result
);
456 static void spitfire_xcall_deliver(struct trap_per_cpu
*tb
, int cnt
)
458 u64
*mondo
, data0
, data1
, data2
;
463 __asm__
__volatile__("rdpr %%pstate, %0" : "=r" (pstate
));
464 cpu_list
= __va(tb
->cpu_list_pa
);
465 mondo
= __va(tb
->cpu_mondo_block_pa
);
469 for (i
= 0; i
< cnt
; i
++)
470 spitfire_xcall_helper(data0
, data1
, data2
, pstate
, cpu_list
[i
]);
473 /* Cheetah now allows to send the whole 64-bytes of data in the interrupt
474 * packet, but we have no use for that. However we do take advantage of
475 * the new pipelining feature (ie. dispatch to multiple cpus simultaneously).
477 static void cheetah_xcall_deliver(struct trap_per_cpu
*tb
, int cnt
)
479 int nack_busy_id
, is_jbus
, need_more
;
480 u64
*mondo
, pstate
, ver
, busy_mask
;
483 cpu_list
= __va(tb
->cpu_list_pa
);
484 mondo
= __va(tb
->cpu_mondo_block_pa
);
486 /* Unfortunately, someone at Sun had the brilliant idea to make the
487 * busy/nack fields hard-coded by ITID number for this Ultra-III
488 * derivative processor.
490 __asm__ ("rdpr %%ver, %0" : "=r" (ver
));
491 is_jbus
= ((ver
>> 32) == __JALAPENO_ID
||
492 (ver
>> 32) == __SERRANO_ID
);
494 __asm__
__volatile__("rdpr %%pstate, %0" : "=r" (pstate
));
498 __asm__
__volatile__("wrpr %0, %1, %%pstate\n\t"
499 : : "r" (pstate
), "i" (PSTATE_IE
));
501 /* Setup the dispatch data registers. */
502 __asm__
__volatile__("stxa %0, [%3] %6\n\t"
503 "stxa %1, [%4] %6\n\t"
504 "stxa %2, [%5] %6\n\t"
507 : "r" (mondo
[0]), "r" (mondo
[1]), "r" (mondo
[2]),
508 "r" (0x40), "r" (0x50), "r" (0x60),
516 for (i
= 0; i
< cnt
; i
++) {
523 target
= (nr
<< 14) | 0x70;
525 busy_mask
|= (0x1UL
<< (nr
* 2));
527 target
|= (nack_busy_id
<< 24);
528 busy_mask
|= (0x1UL
<<
531 __asm__
__volatile__(
532 "stxa %%g0, [%0] %1\n\t"
535 : "r" (target
), "i" (ASI_INTR_W
));
537 if (nack_busy_id
== 32) {
544 /* Now, poll for completion. */
546 u64 dispatch_stat
, nack_mask
;
549 stuck
= 100000 * nack_busy_id
;
550 nack_mask
= busy_mask
<< 1;
552 __asm__
__volatile__("ldxa [%%g0] %1, %0"
553 : "=r" (dispatch_stat
)
554 : "i" (ASI_INTR_DISPATCH_STAT
));
555 if (!(dispatch_stat
& (busy_mask
| nack_mask
))) {
556 __asm__
__volatile__("wrpr %0, 0x0, %%pstate"
558 if (unlikely(need_more
)) {
560 for (i
= 0; i
< cnt
; i
++) {
561 if (cpu_list
[i
] == 0xffff)
563 cpu_list
[i
] = 0xffff;
574 } while (dispatch_stat
& busy_mask
);
576 __asm__
__volatile__("wrpr %0, 0x0, %%pstate"
579 if (dispatch_stat
& busy_mask
) {
580 /* Busy bits will not clear, continue instead
581 * of freezing up on this cpu.
583 printk("CPU[%d]: mondo stuckage result[%016llx]\n",
584 smp_processor_id(), dispatch_stat
);
586 int i
, this_busy_nack
= 0;
588 /* Delay some random time with interrupts enabled
589 * to prevent deadlock.
591 udelay(2 * nack_busy_id
);
593 /* Clear out the mask bits for cpus which did not
596 for (i
= 0; i
< cnt
; i
++) {
604 check_mask
= (0x2UL
<< (2*nr
));
606 check_mask
= (0x2UL
<<
608 if ((dispatch_stat
& check_mask
) == 0)
609 cpu_list
[i
] = 0xffff;
611 if (this_busy_nack
== 64)
620 /* Multi-cpu list version. */
621 static void hypervisor_xcall_deliver(struct trap_per_cpu
*tb
, int cnt
)
623 int retries
, this_cpu
, prev_sent
, i
, saw_cpu_error
;
624 unsigned long status
;
627 this_cpu
= smp_processor_id();
629 cpu_list
= __va(tb
->cpu_list_pa
);
635 int forward_progress
, n_sent
;
637 status
= sun4v_cpu_mondo_send(cnt
,
639 tb
->cpu_mondo_block_pa
);
641 /* HV_EOK means all cpus received the xcall, we're done. */
642 if (likely(status
== HV_EOK
))
645 /* First, see if we made any forward progress.
647 * The hypervisor indicates successful sends by setting
648 * cpu list entries to the value 0xffff.
651 for (i
= 0; i
< cnt
; i
++) {
652 if (likely(cpu_list
[i
] == 0xffff))
656 forward_progress
= 0;
657 if (n_sent
> prev_sent
)
658 forward_progress
= 1;
662 /* If we get a HV_ECPUERROR, then one or more of the cpus
663 * in the list are in error state. Use the cpu_state()
664 * hypervisor call to find out which cpus are in error state.
666 if (unlikely(status
== HV_ECPUERROR
)) {
667 for (i
= 0; i
< cnt
; i
++) {
675 err
= sun4v_cpu_state(cpu
);
676 if (err
== HV_CPU_STATE_ERROR
) {
677 saw_cpu_error
= (cpu
+ 1);
678 cpu_list
[i
] = 0xffff;
681 } else if (unlikely(status
!= HV_EWOULDBLOCK
))
682 goto fatal_mondo_error
;
684 /* Don't bother rewriting the CPU list, just leave the
685 * 0xffff and non-0xffff entries in there and the
686 * hypervisor will do the right thing.
688 * Only advance timeout state if we didn't make any
691 if (unlikely(!forward_progress
)) {
692 if (unlikely(++retries
> 10000))
693 goto fatal_mondo_timeout
;
695 /* Delay a little bit to let other cpus catch up
696 * on their cpu mondo queue work.
702 if (unlikely(saw_cpu_error
))
703 goto fatal_mondo_cpu_error
;
707 fatal_mondo_cpu_error
:
708 printk(KERN_CRIT
"CPU[%d]: SUN4V mondo cpu error, some target cpus "
709 "(including %d) were in error state\n",
710 this_cpu
, saw_cpu_error
- 1);
714 printk(KERN_CRIT
"CPU[%d]: SUN4V mondo timeout, no forward "
715 " progress after %d retries.\n",
717 goto dump_cpu_list_and_out
;
720 printk(KERN_CRIT
"CPU[%d]: Unexpected SUN4V mondo error %lu\n",
722 printk(KERN_CRIT
"CPU[%d]: Args were cnt(%d) cpulist_pa(%lx) "
723 "mondo_block_pa(%lx)\n",
724 this_cpu
, cnt
, tb
->cpu_list_pa
, tb
->cpu_mondo_block_pa
);
726 dump_cpu_list_and_out
:
727 printk(KERN_CRIT
"CPU[%d]: CPU list [ ", this_cpu
);
728 for (i
= 0; i
< cnt
; i
++)
729 printk("%u ", cpu_list
[i
]);
733 static void (*xcall_deliver_impl
)(struct trap_per_cpu
*, int);
735 static void xcall_deliver(u64 data0
, u64 data1
, u64 data2
, const cpumask_t
*mask
)
737 struct trap_per_cpu
*tb
;
738 int this_cpu
, i
, cnt
;
743 /* We have to do this whole thing with interrupts fully disabled.
744 * Otherwise if we send an xcall from interrupt context it will
745 * corrupt both our mondo block and cpu list state.
747 * One consequence of this is that we cannot use timeout mechanisms
748 * that depend upon interrupts being delivered locally. So, for
749 * example, we cannot sample jiffies and expect it to advance.
751 * Fortunately, udelay() uses %stick/%tick so we can use that.
753 local_irq_save(flags
);
755 this_cpu
= smp_processor_id();
756 tb
= &trap_block
[this_cpu
];
758 mondo
= __va(tb
->cpu_mondo_block_pa
);
764 cpu_list
= __va(tb
->cpu_list_pa
);
766 /* Setup the initial cpu list. */
768 for_each_cpu(i
, mask
) {
769 if (i
== this_cpu
|| !cpu_online(i
))
775 xcall_deliver_impl(tb
, cnt
);
777 local_irq_restore(flags
);
780 /* Send cross call to all processors mentioned in MASK_P
781 * except self. Really, there are only two cases currently,
782 * "cpu_online_mask" and "mm_cpumask(mm)".
784 static void smp_cross_call_masked(unsigned long *func
, u32 ctx
, u64 data1
, u64 data2
, const cpumask_t
*mask
)
786 u64 data0
= (((u64
)ctx
)<<32 | (((u64
)func
) & 0xffffffff));
788 xcall_deliver(data0
, data1
, data2
, mask
);
791 /* Send cross call to all processors except self. */
792 static void smp_cross_call(unsigned long *func
, u32 ctx
, u64 data1
, u64 data2
)
794 smp_cross_call_masked(func
, ctx
, data1
, data2
, cpu_online_mask
);
797 extern unsigned long xcall_sync_tick
;
799 static void smp_start_sync_tick_client(int cpu
)
801 xcall_deliver((u64
) &xcall_sync_tick
, 0, 0,
805 extern unsigned long xcall_call_function
;
807 void arch_send_call_function_ipi_mask(const struct cpumask
*mask
)
809 xcall_deliver((u64
) &xcall_call_function
, 0, 0, mask
);
812 extern unsigned long xcall_call_function_single
;
814 void arch_send_call_function_single_ipi(int cpu
)
816 xcall_deliver((u64
) &xcall_call_function_single
, 0, 0,
820 void __irq_entry
smp_call_function_client(int irq
, struct pt_regs
*regs
)
822 clear_softint(1 << irq
);
824 generic_smp_call_function_interrupt();
828 void __irq_entry
smp_call_function_single_client(int irq
, struct pt_regs
*regs
)
830 clear_softint(1 << irq
);
832 generic_smp_call_function_single_interrupt();
836 static void tsb_sync(void *info
)
838 struct trap_per_cpu
*tp
= &trap_block
[raw_smp_processor_id()];
839 struct mm_struct
*mm
= info
;
841 /* It is not valid to test "current->active_mm == mm" here.
843 * The value of "current" is not changed atomically with
844 * switch_mm(). But that's OK, we just need to check the
845 * current cpu's trap block PGD physical address.
847 if (tp
->pgd_paddr
== __pa(mm
->pgd
))
848 tsb_context_switch(mm
);
851 void smp_tsb_sync(struct mm_struct
*mm
)
853 smp_call_function_many(mm_cpumask(mm
), tsb_sync
, mm
, 1);
856 extern unsigned long xcall_flush_tlb_mm
;
857 extern unsigned long xcall_flush_tlb_page
;
858 extern unsigned long xcall_flush_tlb_kernel_range
;
859 extern unsigned long xcall_fetch_glob_regs
;
860 extern unsigned long xcall_fetch_glob_pmu
;
861 extern unsigned long xcall_fetch_glob_pmu_n4
;
862 extern unsigned long xcall_receive_signal
;
863 extern unsigned long xcall_new_mmu_context_version
;
865 extern unsigned long xcall_kgdb_capture
;
868 #ifdef DCACHE_ALIASING_POSSIBLE
869 extern unsigned long xcall_flush_dcache_page_cheetah
;
871 extern unsigned long xcall_flush_dcache_page_spitfire
;
873 static inline void __local_flush_dcache_page(struct page
*page
)
875 #ifdef DCACHE_ALIASING_POSSIBLE
876 __flush_dcache_page(page_address(page
),
877 ((tlb_type
== spitfire
) &&
878 page_mapping(page
) != NULL
));
880 if (page_mapping(page
) != NULL
&&
881 tlb_type
== spitfire
)
882 __flush_icache_page(__pa(page_address(page
)));
886 void smp_flush_dcache_page_impl(struct page
*page
, int cpu
)
890 if (tlb_type
== hypervisor
)
893 #ifdef CONFIG_DEBUG_DCFLUSH
894 atomic_inc(&dcpage_flushes
);
897 this_cpu
= get_cpu();
899 if (cpu
== this_cpu
) {
900 __local_flush_dcache_page(page
);
901 } else if (cpu_online(cpu
)) {
902 void *pg_addr
= page_address(page
);
905 if (tlb_type
== spitfire
) {
906 data0
= ((u64
)&xcall_flush_dcache_page_spitfire
);
907 if (page_mapping(page
) != NULL
)
908 data0
|= ((u64
)1 << 32);
909 } else if (tlb_type
== cheetah
|| tlb_type
== cheetah_plus
) {
910 #ifdef DCACHE_ALIASING_POSSIBLE
911 data0
= ((u64
)&xcall_flush_dcache_page_cheetah
);
915 xcall_deliver(data0
, __pa(pg_addr
),
916 (u64
) pg_addr
, cpumask_of(cpu
));
917 #ifdef CONFIG_DEBUG_DCFLUSH
918 atomic_inc(&dcpage_flushes_xcall
);
926 void flush_dcache_page_all(struct mm_struct
*mm
, struct page
*page
)
931 if (tlb_type
== hypervisor
)
936 #ifdef CONFIG_DEBUG_DCFLUSH
937 atomic_inc(&dcpage_flushes
);
940 pg_addr
= page_address(page
);
941 if (tlb_type
== spitfire
) {
942 data0
= ((u64
)&xcall_flush_dcache_page_spitfire
);
943 if (page_mapping(page
) != NULL
)
944 data0
|= ((u64
)1 << 32);
945 } else if (tlb_type
== cheetah
|| tlb_type
== cheetah_plus
) {
946 #ifdef DCACHE_ALIASING_POSSIBLE
947 data0
= ((u64
)&xcall_flush_dcache_page_cheetah
);
951 xcall_deliver(data0
, __pa(pg_addr
),
952 (u64
) pg_addr
, cpu_online_mask
);
953 #ifdef CONFIG_DEBUG_DCFLUSH
954 atomic_inc(&dcpage_flushes_xcall
);
957 __local_flush_dcache_page(page
);
962 void __irq_entry
smp_new_mmu_context_version_client(int irq
, struct pt_regs
*regs
)
964 struct mm_struct
*mm
;
967 clear_softint(1 << irq
);
969 /* See if we need to allocate a new TLB context because
970 * the version of the one we are using is now out of date.
972 mm
= current
->active_mm
;
973 if (unlikely(!mm
|| (mm
== &init_mm
)))
976 spin_lock_irqsave(&mm
->context
.lock
, flags
);
978 if (unlikely(!CTX_VALID(mm
->context
)))
979 get_new_mmu_context(mm
);
981 spin_unlock_irqrestore(&mm
->context
.lock
, flags
);
983 load_secondary_context(mm
);
984 __flush_tlb_mm(CTX_HWBITS(mm
->context
),
988 void smp_new_mmu_context_version(void)
990 smp_cross_call(&xcall_new_mmu_context_version
, 0, 0, 0);
994 void kgdb_roundup_cpus(unsigned long flags
)
996 smp_cross_call(&xcall_kgdb_capture
, 0, 0, 0);
1000 void smp_fetch_global_regs(void)
1002 smp_cross_call(&xcall_fetch_glob_regs
, 0, 0, 0);
1005 void smp_fetch_global_pmu(void)
1007 if (tlb_type
== hypervisor
&&
1008 sun4v_chip_type
>= SUN4V_CHIP_NIAGARA4
)
1009 smp_cross_call(&xcall_fetch_glob_pmu_n4
, 0, 0, 0);
1011 smp_cross_call(&xcall_fetch_glob_pmu
, 0, 0, 0);
1014 /* We know that the window frames of the user have been flushed
1015 * to the stack before we get here because all callers of us
1016 * are flush_tlb_*() routines, and these run after flush_cache_*()
1017 * which performs the flushw.
1019 * The SMP TLB coherency scheme we use works as follows:
1021 * 1) mm->cpu_vm_mask is a bit mask of which cpus an address
1022 * space has (potentially) executed on, this is the heuristic
1023 * we use to avoid doing cross calls.
1025 * Also, for flushing from kswapd and also for clones, we
1026 * use cpu_vm_mask as the list of cpus to make run the TLB.
1028 * 2) TLB context numbers are shared globally across all processors
1029 * in the system, this allows us to play several games to avoid
1032 * One invariant is that when a cpu switches to a process, and
1033 * that processes tsk->active_mm->cpu_vm_mask does not have the
1034 * current cpu's bit set, that tlb context is flushed locally.
1036 * If the address space is non-shared (ie. mm->count == 1) we avoid
1037 * cross calls when we want to flush the currently running process's
1038 * tlb state. This is done by clearing all cpu bits except the current
1039 * processor's in current->mm->cpu_vm_mask and performing the
1040 * flush locally only. This will force any subsequent cpus which run
1041 * this task to flush the context from the local tlb if the process
1042 * migrates to another cpu (again).
1044 * 3) For shared address spaces (threads) and swapping we bite the
1045 * bullet for most cases and perform the cross call (but only to
1046 * the cpus listed in cpu_vm_mask).
1048 * The performance gain from "optimizing" away the cross call for threads is
1049 * questionable (in theory the big win for threads is the massive sharing of
1050 * address space state across processors).
1053 /* This currently is only used by the hugetlb arch pre-fault
1054 * hook on UltraSPARC-III+ and later when changing the pagesize
1055 * bits of the context register for an address space.
1057 void smp_flush_tlb_mm(struct mm_struct
*mm
)
1059 u32 ctx
= CTX_HWBITS(mm
->context
);
1060 int cpu
= get_cpu();
1062 if (atomic_read(&mm
->mm_users
) == 1) {
1063 cpumask_copy(mm_cpumask(mm
), cpumask_of(cpu
));
1064 goto local_flush_and_out
;
1067 smp_cross_call_masked(&xcall_flush_tlb_mm
,
1071 local_flush_and_out
:
1072 __flush_tlb_mm(ctx
, SECONDARY_CONTEXT
);
1077 struct tlb_pending_info
{
1080 unsigned long *vaddrs
;
1083 static void tlb_pending_func(void *info
)
1085 struct tlb_pending_info
*t
= info
;
1087 __flush_tlb_pending(t
->ctx
, t
->nr
, t
->vaddrs
);
1090 void smp_flush_tlb_pending(struct mm_struct
*mm
, unsigned long nr
, unsigned long *vaddrs
)
1092 u32 ctx
= CTX_HWBITS(mm
->context
);
1093 struct tlb_pending_info info
;
1094 int cpu
= get_cpu();
1098 info
.vaddrs
= vaddrs
;
1100 if (mm
== current
->mm
&& atomic_read(&mm
->mm_users
) == 1)
1101 cpumask_copy(mm_cpumask(mm
), cpumask_of(cpu
));
1103 smp_call_function_many(mm_cpumask(mm
), tlb_pending_func
,
1106 __flush_tlb_pending(ctx
, nr
, vaddrs
);
1111 void smp_flush_tlb_page(struct mm_struct
*mm
, unsigned long vaddr
)
1113 unsigned long context
= CTX_HWBITS(mm
->context
);
1114 int cpu
= get_cpu();
1116 if (mm
== current
->mm
&& atomic_read(&mm
->mm_users
) == 1)
1117 cpumask_copy(mm_cpumask(mm
), cpumask_of(cpu
));
1119 smp_cross_call_masked(&xcall_flush_tlb_page
,
1122 __flush_tlb_page(context
, vaddr
);
1127 void smp_flush_tlb_kernel_range(unsigned long start
, unsigned long end
)
1130 end
= PAGE_ALIGN(end
);
1132 smp_cross_call(&xcall_flush_tlb_kernel_range
,
1135 __flush_tlb_kernel_range(start
, end
);
1140 /* #define CAPTURE_DEBUG */
1141 extern unsigned long xcall_capture
;
1143 static atomic_t smp_capture_depth
= ATOMIC_INIT(0);
1144 static atomic_t smp_capture_registry
= ATOMIC_INIT(0);
1145 static unsigned long penguins_are_doing_time
;
1147 void smp_capture(void)
1149 int result
= atomic_add_return(1, &smp_capture_depth
);
1152 int ncpus
= num_online_cpus();
1154 #ifdef CAPTURE_DEBUG
1155 printk("CPU[%d]: Sending penguins to jail...",
1156 smp_processor_id());
1158 penguins_are_doing_time
= 1;
1159 atomic_inc(&smp_capture_registry
);
1160 smp_cross_call(&xcall_capture
, 0, 0, 0);
1161 while (atomic_read(&smp_capture_registry
) != ncpus
)
1163 #ifdef CAPTURE_DEBUG
1169 void smp_release(void)
1171 if (atomic_dec_and_test(&smp_capture_depth
)) {
1172 #ifdef CAPTURE_DEBUG
1173 printk("CPU[%d]: Giving pardon to "
1174 "imprisoned penguins\n",
1175 smp_processor_id());
1177 penguins_are_doing_time
= 0;
1178 membar_safe("#StoreLoad");
1179 atomic_dec(&smp_capture_registry
);
1183 /* Imprisoned penguins run with %pil == PIL_NORMAL_MAX, but PSTATE_IE
1184 * set, so they can service tlb flush xcalls...
1186 extern void prom_world(int);
1188 void __irq_entry
smp_penguin_jailcell(int irq
, struct pt_regs
*regs
)
1190 clear_softint(1 << irq
);
1194 __asm__
__volatile__("flushw");
1196 atomic_inc(&smp_capture_registry
);
1197 membar_safe("#StoreLoad");
1198 while (penguins_are_doing_time
)
1200 atomic_dec(&smp_capture_registry
);
1206 /* /proc/profile writes can call this, don't __init it please. */
1207 int setup_profiling_timer(unsigned int multiplier
)
1212 void __init
smp_prepare_cpus(unsigned int max_cpus
)
1216 void smp_prepare_boot_cpu(void)
1220 void __init
smp_setup_processor_id(void)
1222 if (tlb_type
== spitfire
)
1223 xcall_deliver_impl
= spitfire_xcall_deliver
;
1224 else if (tlb_type
== cheetah
|| tlb_type
== cheetah_plus
)
1225 xcall_deliver_impl
= cheetah_xcall_deliver
;
1227 xcall_deliver_impl
= hypervisor_xcall_deliver
;
1230 void smp_fill_in_sib_core_maps(void)
1234 for_each_present_cpu(i
) {
1237 cpumask_clear(&cpu_core_map
[i
]);
1238 if (cpu_data(i
).core_id
== 0) {
1239 cpumask_set_cpu(i
, &cpu_core_map
[i
]);
1243 for_each_present_cpu(j
) {
1244 if (cpu_data(i
).core_id
==
1245 cpu_data(j
).core_id
)
1246 cpumask_set_cpu(j
, &cpu_core_map
[i
]);
1250 for_each_present_cpu(i
) {
1253 for_each_present_cpu(j
) {
1254 if (cpu_data(i
).sock_id
== cpu_data(j
).sock_id
)
1255 cpumask_set_cpu(j
, &cpu_core_sib_map
[i
]);
1259 for_each_present_cpu(i
) {
1262 cpumask_clear(&per_cpu(cpu_sibling_map
, i
));
1263 if (cpu_data(i
).proc_id
== -1) {
1264 cpumask_set_cpu(i
, &per_cpu(cpu_sibling_map
, i
));
1268 for_each_present_cpu(j
) {
1269 if (cpu_data(i
).proc_id
==
1270 cpu_data(j
).proc_id
)
1271 cpumask_set_cpu(j
, &per_cpu(cpu_sibling_map
, i
));
1276 int __cpu_up(unsigned int cpu
, struct task_struct
*tidle
)
1278 int ret
= smp_boot_one_cpu(cpu
, tidle
);
1281 cpumask_set_cpu(cpu
, &smp_commenced_mask
);
1282 while (!cpu_online(cpu
))
1284 if (!cpu_online(cpu
)) {
1287 /* On SUN4V, writes to %tick and %stick are
1290 if (tlb_type
!= hypervisor
)
1291 smp_synchronize_one_tick(cpu
);
1297 #ifdef CONFIG_HOTPLUG_CPU
1298 void cpu_play_dead(void)
1300 int cpu
= smp_processor_id();
1301 unsigned long pstate
;
1305 if (tlb_type
== hypervisor
) {
1306 struct trap_per_cpu
*tb
= &trap_block
[cpu
];
1308 sun4v_cpu_qconf(HV_CPU_QUEUE_CPU_MONDO
,
1309 tb
->cpu_mondo_pa
, 0);
1310 sun4v_cpu_qconf(HV_CPU_QUEUE_DEVICE_MONDO
,
1311 tb
->dev_mondo_pa
, 0);
1312 sun4v_cpu_qconf(HV_CPU_QUEUE_RES_ERROR
,
1313 tb
->resum_mondo_pa
, 0);
1314 sun4v_cpu_qconf(HV_CPU_QUEUE_NONRES_ERROR
,
1315 tb
->nonresum_mondo_pa
, 0);
1318 cpumask_clear_cpu(cpu
, &smp_commenced_mask
);
1319 membar_safe("#Sync");
1321 local_irq_disable();
1323 __asm__
__volatile__(
1324 "rdpr %%pstate, %0\n\t"
1325 "wrpr %0, %1, %%pstate"
1333 int __cpu_disable(void)
1335 int cpu
= smp_processor_id();
1339 for_each_cpu(i
, &cpu_core_map
[cpu
])
1340 cpumask_clear_cpu(cpu
, &cpu_core_map
[i
]);
1341 cpumask_clear(&cpu_core_map
[cpu
]);
1343 for_each_cpu(i
, &per_cpu(cpu_sibling_map
, cpu
))
1344 cpumask_clear_cpu(cpu
, &per_cpu(cpu_sibling_map
, i
));
1345 cpumask_clear(&per_cpu(cpu_sibling_map
, cpu
));
1354 /* Make sure no interrupts point to this cpu. */
1359 local_irq_disable();
1361 set_cpu_online(cpu
, false);
1368 void __cpu_die(unsigned int cpu
)
1372 for (i
= 0; i
< 100; i
++) {
1374 if (!cpumask_test_cpu(cpu
, &smp_commenced_mask
))
1378 if (cpumask_test_cpu(cpu
, &smp_commenced_mask
)) {
1379 printk(KERN_ERR
"CPU %u didn't die...\n", cpu
);
1381 #if defined(CONFIG_SUN_LDOMS)
1382 unsigned long hv_err
;
1386 hv_err
= sun4v_cpu_stop(cpu
);
1387 if (hv_err
== HV_EOK
) {
1388 set_cpu_present(cpu
, false);
1391 } while (--limit
> 0);
1393 printk(KERN_ERR
"sun4v_cpu_stop() fails err=%lu\n",
1401 void __init
smp_cpus_done(unsigned int max_cpus
)
1405 void smp_send_reschedule(int cpu
)
1407 if (cpu
== smp_processor_id()) {
1408 WARN_ON_ONCE(preemptible());
1409 set_softint(1 << PIL_SMP_RECEIVE_SIGNAL
);
1411 xcall_deliver((u64
) &xcall_receive_signal
,
1412 0, 0, cpumask_of(cpu
));
1416 void __irq_entry
smp_receive_signal_client(int irq
, struct pt_regs
*regs
)
1418 clear_softint(1 << irq
);
1422 static void stop_this_cpu(void *dummy
)
1427 void smp_send_stop(void)
1431 if (tlb_type
== hypervisor
) {
1432 for_each_online_cpu(cpu
) {
1433 if (cpu
== smp_processor_id())
1435 #ifdef CONFIG_SUN_LDOMS
1436 if (ldom_domaining_enabled
) {
1437 unsigned long hv_err
;
1438 hv_err
= sun4v_cpu_stop(cpu
);
1440 printk(KERN_ERR
"sun4v_cpu_stop() "
1441 "failed err=%lu\n", hv_err
);
1444 prom_stopcpu_cpuid(cpu
);
1447 smp_call_function(stop_this_cpu
, NULL
, 0);
1451 * pcpu_alloc_bootmem - NUMA friendly alloc_bootmem wrapper for percpu
1452 * @cpu: cpu to allocate for
1453 * @size: size allocation in bytes
1456 * Allocate @size bytes aligned at @align for cpu @cpu. This wrapper
1457 * does the right thing for NUMA regardless of the current
1461 * Pointer to the allocated area on success, NULL on failure.
1463 static void * __init
pcpu_alloc_bootmem(unsigned int cpu
, size_t size
,
1466 const unsigned long goal
= __pa(MAX_DMA_ADDRESS
);
1467 #ifdef CONFIG_NEED_MULTIPLE_NODES
1468 int node
= cpu_to_node(cpu
);
1471 if (!node_online(node
) || !NODE_DATA(node
)) {
1472 ptr
= __alloc_bootmem(size
, align
, goal
);
1473 pr_info("cpu %d has no node %d or node-local memory\n",
1475 pr_debug("per cpu data for cpu%d %lu bytes at %016lx\n",
1476 cpu
, size
, __pa(ptr
));
1478 ptr
= __alloc_bootmem_node(NODE_DATA(node
),
1480 pr_debug("per cpu data for cpu%d %lu bytes on node%d at "
1481 "%016lx\n", cpu
, size
, node
, __pa(ptr
));
1485 return __alloc_bootmem(size
, align
, goal
);
1489 static void __init
pcpu_free_bootmem(void *ptr
, size_t size
)
1491 free_bootmem(__pa(ptr
), size
);
1494 static int __init
pcpu_cpu_distance(unsigned int from
, unsigned int to
)
1496 if (cpu_to_node(from
) == cpu_to_node(to
))
1497 return LOCAL_DISTANCE
;
1499 return REMOTE_DISTANCE
;
1502 static void __init
pcpu_populate_pte(unsigned long addr
)
1504 pgd_t
*pgd
= pgd_offset_k(addr
);
1508 if (pgd_none(*pgd
)) {
1511 new = __alloc_bootmem(PAGE_SIZE
, PAGE_SIZE
, PAGE_SIZE
);
1512 pgd_populate(&init_mm
, pgd
, new);
1515 pud
= pud_offset(pgd
, addr
);
1516 if (pud_none(*pud
)) {
1519 new = __alloc_bootmem(PAGE_SIZE
, PAGE_SIZE
, PAGE_SIZE
);
1520 pud_populate(&init_mm
, pud
, new);
1523 pmd
= pmd_offset(pud
, addr
);
1524 if (!pmd_present(*pmd
)) {
1527 new = __alloc_bootmem(PAGE_SIZE
, PAGE_SIZE
, PAGE_SIZE
);
1528 pmd_populate_kernel(&init_mm
, pmd
, new);
1532 void __init
setup_per_cpu_areas(void)
1534 unsigned long delta
;
1538 if (pcpu_chosen_fc
!= PCPU_FC_PAGE
) {
1539 rc
= pcpu_embed_first_chunk(PERCPU_MODULE_RESERVE
,
1540 PERCPU_DYNAMIC_RESERVE
, 4 << 20,
1545 pr_warning("PERCPU: %s allocator failed (%d), "
1546 "falling back to page size\n",
1547 pcpu_fc_names
[pcpu_chosen_fc
], rc
);
1550 rc
= pcpu_page_first_chunk(PERCPU_MODULE_RESERVE
,
1555 panic("cannot initialize percpu area (err=%d)", rc
);
1557 delta
= (unsigned long)pcpu_base_addr
- (unsigned long)__per_cpu_start
;
1558 for_each_possible_cpu(cpu
)
1559 __per_cpu_offset(cpu
) = delta
+ pcpu_unit_offsets
[cpu
];
1561 /* Setup %g5 for the boot cpu. */
1562 __local_per_cpu_offset
= __per_cpu_offset(smp_processor_id());
1564 of_fill_in_cpu_data();
1565 if (tlb_type
== hypervisor
)
1566 mdesc_fill_in_cpu_data(cpu_all_mask
);