drivers/tty/serial/apbuart.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __GRLIB_APBUART_H__
   3 #define __GRLIB_APBUART_H__
   4
   5 #include <asm/io.h>
   6
   7 #define UART_NR         8
   8 static int grlib_apbuart_port_nr;
   9
  10 struct grlib_apbuart_regs_map {
  11         u32 data;
  12         u32 status;
  13         u32 ctrl;
  14         u32 scaler;
  15 };
  16
  17 struct amba_prom_registers {
  18         unsigned int phys_addr;
  19         unsigned int reg_size;
  20 };
  21
  22 /*
  23  *  The following defines the bits in the APBUART Status Registers.
  24  */
  25 #define UART_STATUS_DR   0x00000001     /* Data Ready */
  26 #define UART_STATUS_TSE  0x00000002     /* TX Send Register Empty */
  27 #define UART_STATUS_THE  0x00000004     /* TX Hold Register Empty */
  28 #define UART_STATUS_BR   0x00000008     /* Break Error */
  29 #define UART_STATUS_OE   0x00000010     /* RX Overrun Error */
  30 #define UART_STATUS_PE   0x00000020     /* RX Parity Error */
  31 #define UART_STATUS_FE   0x00000040     /* RX Framing Error */
  32 #define UART_STATUS_ERR  0x00000078     /* Error Mask */
  33
  34 /*
  35  *  The following defines the bits in the APBUART Ctrl Registers.
  36  */
  37 #define UART_CTRL_RE     0x00000001     /* Receiver enable */
  38 #define UART_CTRL_TE     0x00000002     /* Transmitter enable */
  39 #define UART_CTRL_RI     0x00000004     /* Receiver interrupt enable */
  40 #define UART_CTRL_TI     0x00000008     /* Transmitter irq */
  41 #define UART_CTRL_PS     0x00000010     /* Parity select */
  42 #define UART_CTRL_PE     0x00000020     /* Parity enable */
  43 #define UART_CTRL_FL     0x00000040     /* Flow control enable */
  44 #define UART_CTRL_LB     0x00000080     /* Loopback enable */
  45
  46 #define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase))
  47
  48 #define APBBASE_DATA_P(port)    (&(APBBASE(port)->data))
  49 #define APBBASE_STATUS_P(port)  (&(APBBASE(port)->status))
  50 #define APBBASE_CTRL_P(port)    (&(APBBASE(port)->ctrl))
  51 #define APBBASE_SCALAR_P(port)  (&(APBBASE(port)->scaler))
  52
  53 #define UART_GET_CHAR(port)     (__raw_readl(APBBASE_DATA_P(port)))
  54 #define UART_PUT_CHAR(port, v)  (__raw_writel(v, APBBASE_DATA_P(port)))
  55 #define UART_GET_STATUS(port)   (__raw_readl(APBBASE_STATUS_P(port)))
  56 #define UART_PUT_STATUS(port, v)(__raw_writel(v, APBBASE_STATUS_P(port)))
  57 #define UART_GET_CTRL(port)     (__raw_readl(APBBASE_CTRL_P(port)))
  58 #define UART_PUT_CTRL(port, v)  (__raw_writel(v, APBBASE_CTRL_P(port)))
  59 #define UART_GET_SCAL(port)     (__raw_readl(APBBASE_SCALAR_P(port)))
  60 #define UART_PUT_SCAL(port, v)  (__raw_writel(v, APBBASE_SCALAR_P(port)))
  61
  62 #define UART_RX_DATA(s)         (((s) & UART_STATUS_DR) != 0)
  63 #define UART_TX_READY(s)        (((s) & UART_STATUS_THE) != 0)
  64
  65 #endif /* __GRLIB_APBUART_H__ */