2 * drivers/pci/pci-sysfs.c
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
11 * File attributes for PCI devices
13 * Modeled after usb's driverfs.c
18 #include <linux/kernel.h>
19 #include <linux/pci.h>
20 #include <linux/stat.h>
21 #include <linux/topology.h>
26 static int sysfs_initialized
; /* = 0 */
28 /* show configuration fields */
29 #define pci_config_attr(field, format_string) \
31 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
33 struct pci_dev *pdev; \
35 pdev = to_pci_dev (dev); \
36 return sprintf (buf, format_string, pdev->field); \
39 pci_config_attr(vendor
, "0x%04x\n");
40 pci_config_attr(device
, "0x%04x\n");
41 pci_config_attr(subsystem_vendor
, "0x%04x\n");
42 pci_config_attr(subsystem_device
, "0x%04x\n");
43 pci_config_attr(class, "0x%06x\n");
44 pci_config_attr(irq
, "%u\n");
46 static ssize_t
broken_parity_status_show(struct device
*dev
,
47 struct device_attribute
*attr
,
50 struct pci_dev
*pdev
= to_pci_dev(dev
);
51 return sprintf (buf
, "%u\n", pdev
->broken_parity_status
);
54 static ssize_t
broken_parity_status_store(struct device
*dev
,
55 struct device_attribute
*attr
,
56 const char *buf
, size_t count
)
58 struct pci_dev
*pdev
= to_pci_dev(dev
);
59 ssize_t consumed
= -EINVAL
;
61 if ((count
> 0) && (*buf
== '0' || *buf
== '1')) {
62 pdev
->broken_parity_status
= *buf
== '1' ? 1 : 0;
68 static ssize_t
local_cpus_show(struct device
*dev
,
69 struct device_attribute
*attr
, char *buf
)
74 mask
= pcibus_to_cpumask(to_pci_dev(dev
)->bus
);
75 len
= cpumask_scnprintf(buf
, PAGE_SIZE
-2, mask
);
82 resource_show(struct device
* dev
, struct device_attribute
*attr
, char * buf
)
84 struct pci_dev
* pci_dev
= to_pci_dev(dev
);
88 resource_size_t start
, end
;
90 if (pci_dev
->subordinate
)
91 max
= DEVICE_COUNT_RESOURCE
;
93 for (i
= 0; i
< max
; i
++) {
94 struct resource
*res
= &pci_dev
->resource
[i
];
95 pci_resource_to_user(pci_dev
, i
, res
, &start
, &end
);
96 str
+= sprintf(str
,"0x%016llx 0x%016llx 0x%016llx\n",
97 (unsigned long long)start
,
98 (unsigned long long)end
,
99 (unsigned long long)res
->flags
);
104 static ssize_t
modalias_show(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
106 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
108 return sprintf(buf
, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
109 pci_dev
->vendor
, pci_dev
->device
,
110 pci_dev
->subsystem_vendor
, pci_dev
->subsystem_device
,
111 (u8
)(pci_dev
->class >> 16), (u8
)(pci_dev
->class >> 8),
112 (u8
)(pci_dev
->class));
115 static ssize_t
is_enabled_store(struct device
*dev
,
116 struct device_attribute
*attr
, const char *buf
,
119 ssize_t result
= -EINVAL
;
120 struct pci_dev
*pdev
= to_pci_dev(dev
);
122 /* this can crash the machine when done on the "wrong" device */
123 if (!capable(CAP_SYS_ADMIN
))
127 if (atomic_read(&pdev
->enable_cnt
) != 0)
128 pci_disable_device(pdev
);
131 } else if (*buf
== '1')
132 result
= pci_enable_device(pdev
);
134 return result
< 0 ? result
: count
;
137 static ssize_t
is_enabled_show(struct device
*dev
,
138 struct device_attribute
*attr
, char *buf
)
140 struct pci_dev
*pdev
;
142 pdev
= to_pci_dev (dev
);
143 return sprintf (buf
, "%u\n", atomic_read(&pdev
->enable_cnt
));
148 numa_node_show(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
150 return sprintf (buf
, "%d\n", dev
->numa_node
);
155 msi_bus_show(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
157 struct pci_dev
*pdev
= to_pci_dev(dev
);
159 if (!pdev
->subordinate
)
162 return sprintf (buf
, "%u\n",
163 !(pdev
->subordinate
->bus_flags
& PCI_BUS_FLAGS_NO_MSI
));
167 msi_bus_store(struct device
*dev
, struct device_attribute
*attr
,
168 const char *buf
, size_t count
)
170 struct pci_dev
*pdev
= to_pci_dev(dev
);
172 /* bad things may happen if the no_msi flag is changed
173 * while some drivers are loaded */
174 if (!capable(CAP_SYS_ADMIN
))
177 if (!pdev
->subordinate
)
181 pdev
->subordinate
->bus_flags
|= PCI_BUS_FLAGS_NO_MSI
;
182 dev_warn(&pdev
->dev
, "forced subordinate bus to not support MSI,"
183 " bad things could happen.\n");
187 pdev
->subordinate
->bus_flags
&= ~PCI_BUS_FLAGS_NO_MSI
;
188 dev_warn(&pdev
->dev
, "forced subordinate bus to support MSI,"
189 " bad things could happen.\n");
195 struct device_attribute pci_dev_attrs
[] = {
199 __ATTR_RO(subsystem_vendor
),
200 __ATTR_RO(subsystem_device
),
203 __ATTR_RO(local_cpus
),
206 __ATTR_RO(numa_node
),
208 __ATTR(enable
, 0600, is_enabled_show
, is_enabled_store
),
209 __ATTR(broken_parity_status
,(S_IRUGO
|S_IWUSR
),
210 broken_parity_status_show
,broken_parity_status_store
),
211 __ATTR(msi_bus
, 0644, msi_bus_show
, msi_bus_store
),
216 pci_read_config(struct kobject
*kobj
, char *buf
, loff_t off
, size_t count
)
218 struct pci_dev
*dev
= to_pci_dev(container_of(kobj
,struct device
,kobj
));
219 unsigned int size
= 64;
220 loff_t init_off
= off
;
221 u8
*data
= (u8
*) buf
;
223 /* Several chips lock up trying to read undefined config space */
224 if (capable(CAP_SYS_ADMIN
)) {
225 size
= dev
->cfg_size
;
226 } else if (dev
->hdr_type
== PCI_HEADER_TYPE_CARDBUS
) {
232 if (off
+ count
> size
) {
239 if ((off
& 1) && size
) {
241 pci_user_read_config_byte(dev
, off
, &val
);
242 data
[off
- init_off
] = val
;
247 if ((off
& 3) && size
> 2) {
249 pci_user_read_config_word(dev
, off
, &val
);
250 data
[off
- init_off
] = val
& 0xff;
251 data
[off
- init_off
+ 1] = (val
>> 8) & 0xff;
258 pci_user_read_config_dword(dev
, off
, &val
);
259 data
[off
- init_off
] = val
& 0xff;
260 data
[off
- init_off
+ 1] = (val
>> 8) & 0xff;
261 data
[off
- init_off
+ 2] = (val
>> 16) & 0xff;
262 data
[off
- init_off
+ 3] = (val
>> 24) & 0xff;
269 pci_user_read_config_word(dev
, off
, &val
);
270 data
[off
- init_off
] = val
& 0xff;
271 data
[off
- init_off
+ 1] = (val
>> 8) & 0xff;
278 pci_user_read_config_byte(dev
, off
, &val
);
279 data
[off
- init_off
] = val
;
288 pci_write_config(struct kobject
*kobj
, char *buf
, loff_t off
, size_t count
)
290 struct pci_dev
*dev
= to_pci_dev(container_of(kobj
,struct device
,kobj
));
291 unsigned int size
= count
;
292 loff_t init_off
= off
;
293 u8
*data
= (u8
*) buf
;
295 if (off
> dev
->cfg_size
)
297 if (off
+ count
> dev
->cfg_size
) {
298 size
= dev
->cfg_size
- off
;
302 if ((off
& 1) && size
) {
303 pci_user_write_config_byte(dev
, off
, data
[off
- init_off
]);
308 if ((off
& 3) && size
> 2) {
309 u16 val
= data
[off
- init_off
];
310 val
|= (u16
) data
[off
- init_off
+ 1] << 8;
311 pci_user_write_config_word(dev
, off
, val
);
317 u32 val
= data
[off
- init_off
];
318 val
|= (u32
) data
[off
- init_off
+ 1] << 8;
319 val
|= (u32
) data
[off
- init_off
+ 2] << 16;
320 val
|= (u32
) data
[off
- init_off
+ 3] << 24;
321 pci_user_write_config_dword(dev
, off
, val
);
327 u16 val
= data
[off
- init_off
];
328 val
|= (u16
) data
[off
- init_off
+ 1] << 8;
329 pci_user_write_config_word(dev
, off
, val
);
335 pci_user_write_config_byte(dev
, off
, data
[off
- init_off
]);
343 #ifdef HAVE_PCI_LEGACY
345 * pci_read_legacy_io - read byte(s) from legacy I/O port space
346 * @kobj: kobject corresponding to file to read from
347 * @buf: buffer to store results
348 * @off: offset into legacy I/O port space
349 * @count: number of bytes to read
351 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
352 * callback routine (pci_legacy_read).
355 pci_read_legacy_io(struct kobject
*kobj
, char *buf
, loff_t off
, size_t count
)
357 struct pci_bus
*bus
= to_pci_bus(container_of(kobj
,
361 /* Only support 1, 2 or 4 byte accesses */
362 if (count
!= 1 && count
!= 2 && count
!= 4)
365 return pci_legacy_read(bus
, off
, (u32
*)buf
, count
);
369 * pci_write_legacy_io - write byte(s) to legacy I/O port space
370 * @kobj: kobject corresponding to file to read from
371 * @buf: buffer containing value to be written
372 * @off: offset into legacy I/O port space
373 * @count: number of bytes to write
375 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
376 * callback routine (pci_legacy_write).
379 pci_write_legacy_io(struct kobject
*kobj
, char *buf
, loff_t off
, size_t count
)
381 struct pci_bus
*bus
= to_pci_bus(container_of(kobj
,
384 /* Only support 1, 2 or 4 byte accesses */
385 if (count
!= 1 && count
!= 2 && count
!= 4)
388 return pci_legacy_write(bus
, off
, *(u32
*)buf
, count
);
392 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
393 * @kobj: kobject corresponding to device to be mapped
394 * @attr: struct bin_attribute for this file
395 * @vma: struct vm_area_struct passed to mmap
397 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
398 * legacy memory space (first meg of bus space) into application virtual
402 pci_mmap_legacy_mem(struct kobject
*kobj
, struct bin_attribute
*attr
,
403 struct vm_area_struct
*vma
)
405 struct pci_bus
*bus
= to_pci_bus(container_of(kobj
,
409 return pci_mmap_legacy_page_range(bus
, vma
);
411 #endif /* HAVE_PCI_LEGACY */
415 * pci_mmap_resource - map a PCI resource into user memory space
416 * @kobj: kobject for mapping
417 * @attr: struct bin_attribute for the file being mapped
418 * @vma: struct vm_area_struct passed into the mmap
420 * Use the regular PCI mapping routines to map a PCI resource into userspace.
421 * FIXME: write combining? maybe automatic for prefetchable regions?
424 pci_mmap_resource(struct kobject
*kobj
, struct bin_attribute
*attr
,
425 struct vm_area_struct
*vma
)
427 struct pci_dev
*pdev
= to_pci_dev(container_of(kobj
,
428 struct device
, kobj
));
429 struct resource
*res
= (struct resource
*)attr
->private;
430 enum pci_mmap_state mmap_type
;
431 resource_size_t start
, end
;
434 for (i
= 0; i
< PCI_ROM_RESOURCE
; i
++)
435 if (res
== &pdev
->resource
[i
])
437 if (i
>= PCI_ROM_RESOURCE
)
440 /* pci_mmap_page_range() expects the same kind of entry as coming
441 * from /proc/bus/pci/ which is a "user visible" value. If this is
442 * different from the resource itself, arch will do necessary fixup.
444 pci_resource_to_user(pdev
, i
, res
, &start
, &end
);
445 vma
->vm_pgoff
+= start
>> PAGE_SHIFT
;
446 mmap_type
= res
->flags
& IORESOURCE_MEM
? pci_mmap_mem
: pci_mmap_io
;
448 return pci_mmap_page_range(pdev
, vma
, mmap_type
, 0);
452 * pci_remove_resource_files - cleanup resource files
453 * @dev: dev to cleanup
455 * If we created resource files for @dev, remove them from sysfs and
456 * free their resources.
459 pci_remove_resource_files(struct pci_dev
*pdev
)
463 for (i
= 0; i
< PCI_ROM_RESOURCE
; i
++) {
464 struct bin_attribute
*res_attr
;
466 res_attr
= pdev
->res_attr
[i
];
468 sysfs_remove_bin_file(&pdev
->dev
.kobj
, res_attr
);
475 * pci_create_resource_files - create resource files in sysfs for @dev
476 * @dev: dev in question
478 * Walk the resources in @dev creating files for each resource available.
480 static int pci_create_resource_files(struct pci_dev
*pdev
)
485 /* Expose the PCI resources from this device as files */
486 for (i
= 0; i
< PCI_ROM_RESOURCE
; i
++) {
487 struct bin_attribute
*res_attr
;
489 /* skip empty resources */
490 if (!pci_resource_len(pdev
, i
))
493 /* allocate attribute structure, piggyback attribute name */
494 res_attr
= kzalloc(sizeof(*res_attr
) + 10, GFP_ATOMIC
);
496 char *res_attr_name
= (char *)(res_attr
+ 1);
498 pdev
->res_attr
[i
] = res_attr
;
499 sprintf(res_attr_name
, "resource%d", i
);
500 res_attr
->attr
.name
= res_attr_name
;
501 res_attr
->attr
.mode
= S_IRUSR
| S_IWUSR
;
502 res_attr
->attr
.owner
= THIS_MODULE
;
503 res_attr
->size
= pci_resource_len(pdev
, i
);
504 res_attr
->mmap
= pci_mmap_resource
;
505 res_attr
->private = &pdev
->resource
[i
];
506 retval
= sysfs_create_bin_file(&pdev
->dev
.kobj
, res_attr
);
508 pci_remove_resource_files(pdev
);
517 #else /* !HAVE_PCI_MMAP */
518 static inline int pci_create_resource_files(struct pci_dev
*dev
) { return 0; }
519 static inline void pci_remove_resource_files(struct pci_dev
*dev
) { return; }
520 #endif /* HAVE_PCI_MMAP */
523 * pci_write_rom - used to enable access to the PCI ROM display
524 * @kobj: kernel object handle
527 * @count: number of byte in input
529 * writing anything except 0 enables it
532 pci_write_rom(struct kobject
*kobj
, char *buf
, loff_t off
, size_t count
)
534 struct pci_dev
*pdev
= to_pci_dev(container_of(kobj
, struct device
, kobj
));
536 if ((off
== 0) && (*buf
== '0') && (count
== 2))
537 pdev
->rom_attr_enabled
= 0;
539 pdev
->rom_attr_enabled
= 1;
545 * pci_read_rom - read a PCI ROM
546 * @kobj: kernel object handle
547 * @buf: where to put the data we read from the ROM
549 * @count: number of bytes to read
551 * Put @count bytes starting at @off into @buf from the ROM in the PCI
552 * device corresponding to @kobj.
555 pci_read_rom(struct kobject
*kobj
, char *buf
, loff_t off
, size_t count
)
557 struct pci_dev
*pdev
= to_pci_dev(container_of(kobj
, struct device
, kobj
));
561 if (!pdev
->rom_attr_enabled
)
564 rom
= pci_map_rom(pdev
, &size
); /* size starts out as PCI window size */
571 if (off
+ count
> size
)
574 memcpy_fromio(buf
, rom
+ off
, count
);
576 pci_unmap_rom(pdev
, rom
);
581 static struct bin_attribute pci_config_attr
= {
584 .mode
= S_IRUGO
| S_IWUSR
,
585 .owner
= THIS_MODULE
,
588 .read
= pci_read_config
,
589 .write
= pci_write_config
,
592 static struct bin_attribute pcie_config_attr
= {
595 .mode
= S_IRUGO
| S_IWUSR
,
596 .owner
= THIS_MODULE
,
599 .read
= pci_read_config
,
600 .write
= pci_write_config
,
603 int __must_check
pci_create_sysfs_dev_files (struct pci_dev
*pdev
)
605 struct bin_attribute
*rom_attr
= NULL
;
608 if (!sysfs_initialized
)
611 if (pdev
->cfg_size
< 4096)
612 retval
= sysfs_create_bin_file(&pdev
->dev
.kobj
, &pci_config_attr
);
614 retval
= sysfs_create_bin_file(&pdev
->dev
.kobj
, &pcie_config_attr
);
618 retval
= pci_create_resource_files(pdev
);
622 /* If the device has a ROM, try to expose it in sysfs. */
623 if (pci_resource_len(pdev
, PCI_ROM_RESOURCE
)) {
624 rom_attr
= kzalloc(sizeof(*rom_attr
), GFP_ATOMIC
);
626 pdev
->rom_attr
= rom_attr
;
627 rom_attr
->size
= pci_resource_len(pdev
, PCI_ROM_RESOURCE
);
628 rom_attr
->attr
.name
= "rom";
629 rom_attr
->attr
.mode
= S_IRUSR
;
630 rom_attr
->attr
.owner
= THIS_MODULE
;
631 rom_attr
->read
= pci_read_rom
;
632 rom_attr
->write
= pci_write_rom
;
633 retval
= sysfs_create_bin_file(&pdev
->dev
.kobj
, rom_attr
);
641 /* add platform-specific attributes */
642 pcibios_add_platform_entries(pdev
);
649 if (pdev
->cfg_size
< 4096)
650 sysfs_remove_bin_file(&pdev
->dev
.kobj
, &pci_config_attr
);
652 sysfs_remove_bin_file(&pdev
->dev
.kobj
, &pcie_config_attr
);
658 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
659 * @pdev: device whose entries we should free
661 * Cleanup when @pdev is removed from sysfs.
663 void pci_remove_sysfs_dev_files(struct pci_dev
*pdev
)
665 if (!sysfs_initialized
)
668 if (pdev
->cfg_size
< 4096)
669 sysfs_remove_bin_file(&pdev
->dev
.kobj
, &pci_config_attr
);
671 sysfs_remove_bin_file(&pdev
->dev
.kobj
, &pcie_config_attr
);
673 pci_remove_resource_files(pdev
);
675 if (pci_resource_len(pdev
, PCI_ROM_RESOURCE
)) {
676 if (pdev
->rom_attr
) {
677 sysfs_remove_bin_file(&pdev
->dev
.kobj
, pdev
->rom_attr
);
678 kfree(pdev
->rom_attr
);
683 static int __init
pci_sysfs_init(void)
685 struct pci_dev
*pdev
= NULL
;
688 sysfs_initialized
= 1;
689 for_each_pci_dev(pdev
) {
690 retval
= pci_create_sysfs_dev_files(pdev
);
698 __initcall(pci_sysfs_init
);