drm/radeon: fix voltage setup on hawaii
[linux/fpc-iii.git] / arch / nios2 / kernel / cpuinfo.c
bloba223691dff4fb1699c52b3e025ebb6446394fbb0
1 /*
2 * Copyright (C) 2013 Altera Corporation
3 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
5 * Based on cpuinfo.c from microblaze
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/seq_file.h>
26 #include <linux/string.h>
27 #include <linux/of.h>
28 #include <asm/cpuinfo.h>
30 struct cpuinfo cpuinfo;
32 #define err_cpu(x) \
33 pr_err("ERROR: Nios II " x " different for kernel and DTS\n")
35 static inline u32 fcpu(struct device_node *cpu, const char *n)
37 u32 val = 0;
39 of_property_read_u32(cpu, n, &val);
41 return val;
44 static inline u32 fcpu_has(struct device_node *cpu, const char *n)
46 return of_get_property(cpu, n, NULL) ? 1 : 0;
49 void __init setup_cpuinfo(void)
51 struct device_node *cpu;
52 const char *str;
53 int len;
55 cpu = of_find_node_by_type(NULL, "cpu");
56 if (!cpu)
57 panic("%s: No CPU found in devicetree!\n", __func__);
59 if (!fcpu_has(cpu, "altr,has-initda"))
60 panic("initda instruction is unimplemented. Please update your "
61 "hardware system to have more than 4-byte line data "
62 "cache\n");
64 cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency");
66 str = of_get_property(cpu, "altr,implementation", &len);
67 if (str)
68 strlcpy(cpuinfo.cpu_impl, str, sizeof(cpuinfo.cpu_impl));
69 else
70 strcpy(cpuinfo.cpu_impl, "<unknown>");
72 cpuinfo.has_div = fcpu_has(cpu, "altr,has-div");
73 cpuinfo.has_mul = fcpu_has(cpu, "altr,has-mul");
74 cpuinfo.has_mulx = fcpu_has(cpu, "altr,has-mulx");
75 cpuinfo.mmu = fcpu_has(cpu, "altr,has-mmu");
77 if (IS_ENABLED(CONFIG_NIOS2_HW_DIV_SUPPORT) && !cpuinfo.has_div)
78 err_cpu("DIV");
80 if (IS_ENABLED(CONFIG_NIOS2_HW_MUL_SUPPORT) && !cpuinfo.has_mul)
81 err_cpu("MUL");
83 if (IS_ENABLED(CONFIG_NIOS2_HW_MULX_SUPPORT) && !cpuinfo.has_mulx)
84 err_cpu("MULX");
86 cpuinfo.tlb_num_ways = fcpu(cpu, "altr,tlb-num-ways");
87 if (!cpuinfo.tlb_num_ways)
88 panic("altr,tlb-num-ways can't be 0. Please check your hardware "
89 "system\n");
90 cpuinfo.icache_line_size = fcpu(cpu, "icache-line-size");
91 cpuinfo.icache_size = fcpu(cpu, "icache-size");
92 if (CONFIG_NIOS2_ICACHE_SIZE != cpuinfo.icache_size)
93 pr_warn("Warning: icache size configuration mismatch "
94 "(0x%x vs 0x%x) of CONFIG_NIOS2_ICACHE_SIZE vs "
95 "device tree icache-size\n",
96 CONFIG_NIOS2_ICACHE_SIZE, cpuinfo.icache_size);
98 cpuinfo.dcache_line_size = fcpu(cpu, "dcache-line-size");
99 if (CONFIG_NIOS2_DCACHE_LINE_SIZE != cpuinfo.dcache_line_size)
100 pr_warn("Warning: dcache line size configuration mismatch "
101 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_LINE_SIZE vs "
102 "device tree dcache-line-size\n",
103 CONFIG_NIOS2_DCACHE_LINE_SIZE, cpuinfo.dcache_line_size);
104 cpuinfo.dcache_size = fcpu(cpu, "dcache-size");
105 if (CONFIG_NIOS2_DCACHE_SIZE != cpuinfo.dcache_size)
106 pr_warn("Warning: dcache size configuration mismatch "
107 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_SIZE vs "
108 "device tree dcache-size\n",
109 CONFIG_NIOS2_DCACHE_SIZE, cpuinfo.dcache_size);
111 cpuinfo.tlb_pid_num_bits = fcpu(cpu, "altr,pid-num-bits");
112 cpuinfo.tlb_num_ways_log2 = ilog2(cpuinfo.tlb_num_ways);
113 cpuinfo.tlb_num_entries = fcpu(cpu, "altr,tlb-num-entries");
114 cpuinfo.tlb_num_lines = cpuinfo.tlb_num_entries / cpuinfo.tlb_num_ways;
115 cpuinfo.tlb_ptr_sz = fcpu(cpu, "altr,tlb-ptr-sz");
117 cpuinfo.reset_addr = fcpu(cpu, "altr,reset-addr");
118 cpuinfo.exception_addr = fcpu(cpu, "altr,exception-addr");
119 cpuinfo.fast_tlb_miss_exc_addr = fcpu(cpu, "altr,fast-tlb-miss-addr");
122 #ifdef CONFIG_PROC_FS
125 * Get CPU information for use by the procfs.
127 static int show_cpuinfo(struct seq_file *m, void *v)
129 int count = 0;
130 const u32 clockfreq = cpuinfo.cpu_clock_freq;
132 count = seq_printf(m,
133 "CPU:\t\tNios II/%s\n"
134 "MMU:\t\t%s\n"
135 "FPU:\t\tnone\n"
136 "Clocking:\t%u.%02u MHz\n"
137 "BogoMips:\t%lu.%02lu\n"
138 "Calibration:\t%lu loops\n",
139 cpuinfo.cpu_impl,
140 cpuinfo.mmu ? "present" : "none",
141 clockfreq / 1000000, (clockfreq / 100000) % 10,
142 (loops_per_jiffy * HZ) / 500000,
143 ((loops_per_jiffy * HZ) / 5000) % 100,
144 (loops_per_jiffy * HZ));
146 count += seq_printf(m,
147 "HW:\n"
148 " MUL:\t\t%s\n"
149 " MULX:\t\t%s\n"
150 " DIV:\t\t%s\n",
151 cpuinfo.has_mul ? "yes" : "no",
152 cpuinfo.has_mulx ? "yes" : "no",
153 cpuinfo.has_div ? "yes" : "no");
155 count += seq_printf(m,
156 "Icache:\t\t%ukB, line length: %u\n",
157 cpuinfo.icache_size >> 10,
158 cpuinfo.icache_line_size);
160 count += seq_printf(m,
161 "Dcache:\t\t%ukB, line length: %u\n",
162 cpuinfo.dcache_size >> 10,
163 cpuinfo.dcache_line_size);
165 count += seq_printf(m,
166 "TLB:\t\t%u ways, %u entries, %u PID bits\n",
167 cpuinfo.tlb_num_ways,
168 cpuinfo.tlb_num_entries,
169 cpuinfo.tlb_pid_num_bits);
171 return 0;
174 static void *cpuinfo_start(struct seq_file *m, loff_t *pos)
176 unsigned long i = *pos;
178 return i < num_possible_cpus() ? (void *) (i + 1) : NULL;
181 static void *cpuinfo_next(struct seq_file *m, void *v, loff_t *pos)
183 ++*pos;
184 return cpuinfo_start(m, pos);
187 static void cpuinfo_stop(struct seq_file *m, void *v)
191 const struct seq_operations cpuinfo_op = {
192 .start = cpuinfo_start,
193 .next = cpuinfo_next,
194 .stop = cpuinfo_stop,
195 .show = show_cpuinfo
198 #endif /* CONFIG_PROC_FS */