drm/radeon: fix voltage setup on hawaii
[linux/fpc-iii.git] / arch / parisc / include / asm / dma-mapping.h
blobd0eae5f2bd8795e244d2a086f30e7d78439050f3
1 #ifndef _PARISC_DMA_MAPPING_H
2 #define _PARISC_DMA_MAPPING_H
4 #include <linux/mm.h>
5 #include <asm/cacheflush.h>
6 #include <asm/scatterlist.h>
8 /* See Documentation/DMA-API-HOWTO.txt */
9 struct hppa_dma_ops {
10 int (*dma_supported)(struct device *dev, u64 mask);
11 void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
12 void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
13 void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t iova);
14 dma_addr_t (*map_single)(struct device *dev, void *addr, size_t size, enum dma_data_direction direction);
15 void (*unmap_single)(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction direction);
16 int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction);
17 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nhwents, enum dma_data_direction direction);
18 void (*dma_sync_single_for_cpu)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
19 void (*dma_sync_single_for_device)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
20 void (*dma_sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
21 void (*dma_sync_sg_for_device)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
25 ** We could live without the hppa_dma_ops indirection if we didn't want
26 ** to support 4 different coherent dma models with one binary (they will
27 ** someday be loadable modules):
28 ** I/O MMU consistent method dma_sync behavior
29 ** ============= ====================== =======================
30 ** a) PA-7x00LC uncachable host memory flush/purge
31 ** b) U2/Uturn cachable host memory NOP
32 ** c) Ike/Astro cachable host memory NOP
33 ** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel
35 ** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
37 ** Systems (eg PCX-T workstations) that don't fall into the above
38 ** categories will need to modify the needed drivers to perform
39 ** flush/purge and allocate "regular" cacheable pages for everything.
42 #ifdef CONFIG_PA11
43 extern struct hppa_dma_ops pcxl_dma_ops;
44 extern struct hppa_dma_ops pcx_dma_ops;
45 #endif
47 extern struct hppa_dma_ops *hppa_dma_ops;
49 #define dma_alloc_attrs(d, s, h, f, a) dma_alloc_coherent(d, s, h, f)
50 #define dma_free_attrs(d, s, h, f, a) dma_free_coherent(d, s, h, f)
52 static inline void *
53 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
54 gfp_t flag)
56 return hppa_dma_ops->alloc_consistent(dev, size, dma_handle, flag);
59 static inline void *
60 dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
61 gfp_t flag)
63 return hppa_dma_ops->alloc_noncoherent(dev, size, dma_handle, flag);
66 static inline void
67 dma_free_coherent(struct device *dev, size_t size,
68 void *vaddr, dma_addr_t dma_handle)
70 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
73 static inline void
74 dma_free_noncoherent(struct device *dev, size_t size,
75 void *vaddr, dma_addr_t dma_handle)
77 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
80 static inline dma_addr_t
81 dma_map_single(struct device *dev, void *ptr, size_t size,
82 enum dma_data_direction direction)
84 return hppa_dma_ops->map_single(dev, ptr, size, direction);
87 static inline void
88 dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
89 enum dma_data_direction direction)
91 hppa_dma_ops->unmap_single(dev, dma_addr, size, direction);
94 static inline int
95 dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
96 enum dma_data_direction direction)
98 return hppa_dma_ops->map_sg(dev, sg, nents, direction);
101 static inline void
102 dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
103 enum dma_data_direction direction)
105 hppa_dma_ops->unmap_sg(dev, sg, nhwentries, direction);
108 static inline dma_addr_t
109 dma_map_page(struct device *dev, struct page *page, unsigned long offset,
110 size_t size, enum dma_data_direction direction)
112 return dma_map_single(dev, (page_address(page) + (offset)), size, direction);
115 static inline void
116 dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
117 enum dma_data_direction direction)
119 dma_unmap_single(dev, dma_address, size, direction);
123 static inline void
124 dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
125 enum dma_data_direction direction)
127 if(hppa_dma_ops->dma_sync_single_for_cpu)
128 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, 0, size, direction);
131 static inline void
132 dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
133 enum dma_data_direction direction)
135 if(hppa_dma_ops->dma_sync_single_for_device)
136 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, 0, size, direction);
139 static inline void
140 dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
141 unsigned long offset, size_t size,
142 enum dma_data_direction direction)
144 if(hppa_dma_ops->dma_sync_single_for_cpu)
145 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, offset, size, direction);
148 static inline void
149 dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
150 unsigned long offset, size_t size,
151 enum dma_data_direction direction)
153 if(hppa_dma_ops->dma_sync_single_for_device)
154 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, offset, size, direction);
157 static inline void
158 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
159 enum dma_data_direction direction)
161 if(hppa_dma_ops->dma_sync_sg_for_cpu)
162 hppa_dma_ops->dma_sync_sg_for_cpu(dev, sg, nelems, direction);
165 static inline void
166 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
167 enum dma_data_direction direction)
169 if(hppa_dma_ops->dma_sync_sg_for_device)
170 hppa_dma_ops->dma_sync_sg_for_device(dev, sg, nelems, direction);
173 static inline int
174 dma_supported(struct device *dev, u64 mask)
176 return hppa_dma_ops->dma_supported(dev, mask);
179 static inline int
180 dma_set_mask(struct device *dev, u64 mask)
182 if(!dev->dma_mask || !dma_supported(dev, mask))
183 return -EIO;
185 *dev->dma_mask = mask;
187 return 0;
190 static inline void
191 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
192 enum dma_data_direction direction)
194 if(hppa_dma_ops->dma_sync_single_for_cpu)
195 flush_kernel_dcache_range((unsigned long)vaddr, size);
198 static inline void *
199 parisc_walk_tree(struct device *dev)
201 struct device *otherdev;
202 if(likely(dev->platform_data != NULL))
203 return dev->platform_data;
204 /* OK, just traverse the bus to find it */
205 for(otherdev = dev->parent; otherdev;
206 otherdev = otherdev->parent) {
207 if(otherdev->platform_data) {
208 dev->platform_data = otherdev->platform_data;
209 break;
212 BUG_ON(!dev->platform_data);
213 return dev->platform_data;
216 #define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu)
219 #ifdef CONFIG_IOMMU_CCIO
220 struct parisc_device;
221 struct ioc;
222 void * ccio_get_iommu(const struct parisc_device *dev);
223 int ccio_request_resource(const struct parisc_device *dev,
224 struct resource *res);
225 int ccio_allocate_resource(const struct parisc_device *dev,
226 struct resource *res, unsigned long size,
227 unsigned long min, unsigned long max, unsigned long align);
228 #else /* !CONFIG_IOMMU_CCIO */
229 #define ccio_get_iommu(dev) NULL
230 #define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
231 #define ccio_allocate_resource(dev, res, size, min, max, align) \
232 allocate_resource(&iomem_resource, res, size, min, max, \
233 align, NULL, NULL)
234 #endif /* !CONFIG_IOMMU_CCIO */
236 #ifdef CONFIG_IOMMU_SBA
237 struct parisc_device;
238 void * sba_get_iommu(struct parisc_device *dev);
239 #endif
241 /* At the moment, we panic on error for IOMMU resource exaustion */
242 #define dma_mapping_error(dev, x) 0
244 /* This API cannot be supported on PA-RISC */
245 static inline int dma_mmap_coherent(struct device *dev,
246 struct vm_area_struct *vma, void *cpu_addr,
247 dma_addr_t dma_addr, size_t size)
249 return -EINVAL;
252 static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
253 void *cpu_addr, dma_addr_t dma_addr,
254 size_t size)
256 return -EINVAL;
259 #endif