drm/radeon: fix voltage setup on hawaii
[linux/fpc-iii.git] / arch / parisc / include / asm / tlbflush.h
blob9d086a599fa05f56a13cbd6b214b466ad4b43a12
1 #ifndef _PARISC_TLBFLUSH_H
2 #define _PARISC_TLBFLUSH_H
4 /* TLB flushing routines.... */
6 #include <linux/mm.h>
7 #include <linux/sched.h>
8 #include <asm/mmu_context.h>
11 /* This is for the serialisation of PxTLB broadcasts. At least on the
12 * N class systems, only one PxTLB inter processor broadcast can be
13 * active at any one time on the Merced bus. This tlb purge
14 * synchronisation is fairly lightweight and harmless so we activate
15 * it on all systems not just the N class.
17 extern spinlock_t pa_tlb_lock;
19 #define purge_tlb_start(flags) spin_lock_irqsave(&pa_tlb_lock, flags)
20 #define purge_tlb_end(flags) spin_unlock_irqrestore(&pa_tlb_lock, flags)
22 extern void flush_tlb_all(void);
23 extern void flush_tlb_all_local(void *);
25 #define smp_flush_tlb_all() flush_tlb_all()
28 * flush_tlb_mm()
30 * XXX This code is NOT valid for HP-UX compatibility processes,
31 * (although it will probably work 99% of the time). HP-UX
32 * processes are free to play with the space id's and save them
33 * over long periods of time, etc. so we have to preserve the
34 * space and just flush the entire tlb. We need to check the
35 * personality in order to do that, but the personality is not
36 * currently being set correctly.
38 * Of course, Linux processes could do the same thing, but
39 * we don't support that (and the compilers, dynamic linker,
40 * etc. do not do that).
43 static inline void flush_tlb_mm(struct mm_struct *mm)
45 BUG_ON(mm == &init_mm); /* Should never happen */
47 #if 1 || defined(CONFIG_SMP)
48 flush_tlb_all();
49 #else
50 /* FIXME: currently broken, causing space id and protection ids
51 * to go out of sync, resulting in faults on userspace accesses.
53 if (mm) {
54 if (mm->context != 0)
55 free_sid(mm->context);
56 mm->context = alloc_sid();
57 if (mm == current->active_mm)
58 load_context(mm->context);
60 #endif
63 static inline void flush_tlb_page(struct vm_area_struct *vma,
64 unsigned long addr)
66 unsigned long flags, sid;
68 /* For one page, it's not worth testing the split_tlb variable */
70 mb();
71 sid = vma->vm_mm->context;
72 purge_tlb_start(flags);
73 mtsp(sid, 1);
74 pdtlb(addr);
75 pitlb(addr);
76 purge_tlb_end(flags);
79 void __flush_tlb_range(unsigned long sid,
80 unsigned long start, unsigned long end);
82 #define flush_tlb_range(vma,start,end) __flush_tlb_range((vma)->vm_mm->context,start,end)
84 #define flush_tlb_kernel_range(start, end) __flush_tlb_range(0,start,end)
86 #endif