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Linux 3.4.102
[linux/fpc-iii.git] / drivers / i2c / algos / i2c-algo-pca.c
blob73133b1063f012416d2a957f3fc2432ace395439
1 /*
2 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
3 * Copyright (C) 2004 Arcom Control Systems
4 * Copyright (C) 2008 Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301 USA.
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/delay.h>
26 #include <linux/jiffies.h>
27 #include <linux/init.h>
28 #include <linux/errno.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c-algo-pca.h>
31
32 #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
33 printk(KERN_DEBUG fmt, ## args); } while (0)
34 #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
35 printk(KERN_DEBUG fmt, ## args); } while (0)
36 #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
37 printk(KERN_DEBUG fmt, ## args); } while (0)
38
39 static int i2c_debug;
40
41 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
42 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
43
44 #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
45 #define pca_clock(adap) adap->i2c_clock
46 #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
47 #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
48 #define pca_wait(adap) adap->wait_for_completion(adap->data)
49 #define pca_reset(adap) adap->reset_chip(adap->data)
50
51 static void pca9665_reset(void *pd)
52 {
53 struct i2c_algo_pca_data *adap = pd;
54 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
55 pca_outw(adap, I2C_PCA_IND, 0xA5);
56 pca_outw(adap, I2C_PCA_IND, 0x5A);
57 }
58
59 /*
60 * Generate a start condition on the i2c bus.
61 *
62 * returns after the start condition has occurred
63 */
64 static int pca_start(struct i2c_algo_pca_data *adap)
65 {
66 int sta = pca_get_con(adap);
67 DEB2("=== START\n");
68 sta |= I2C_PCA_CON_STA;
69 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
70 pca_set_con(adap, sta);
71 return pca_wait(adap);
72 }
73
74 /*
75 * Generate a repeated start condition on the i2c bus
76 *
77 * return after the repeated start condition has occurred
78 */
79 static int pca_repeated_start(struct i2c_algo_pca_data *adap)
80 {
81 int sta = pca_get_con(adap);
82 DEB2("=== REPEATED START\n");
83 sta |= I2C_PCA_CON_STA;
84 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
85 pca_set_con(adap, sta);
86 return pca_wait(adap);
87 }
88
89 /*
90 * Generate a stop condition on the i2c bus
91 *
92 * returns after the stop condition has been generated
93 *
94 * STOPs do not generate an interrupt or set the SI flag, since the
95 * part returns the idle state (0xf8). Hence we don't need to
96 * pca_wait here.
97 */
98 static void pca_stop(struct i2c_algo_pca_data *adap)
99 {
100 int sta = pca_get_con(adap);
101 DEB2("=== STOP\n");
102 sta |= I2C_PCA_CON_STO;
103 sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
104 pca_set_con(adap, sta);
105 }
106
107 /*
108 * Send the slave address and R/W bit
109 *
110 * returns after the address has been sent
111 */
112 static int pca_address(struct i2c_algo_pca_data *adap,
113 struct i2c_msg *msg)
114 {
115 int sta = pca_get_con(adap);
116 int addr;
117
118 addr = ((0x7f & msg->addr) << 1);
119 if (msg->flags & I2C_M_RD)
120 addr |= 1;
121 DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
122 msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
123
124 pca_outw(adap, I2C_PCA_DAT, addr);
125
126 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
127 pca_set_con(adap, sta);
128
129 return pca_wait(adap);
130 }
131
132 /*
133 * Transmit a byte.
134 *
135 * Returns after the byte has been transmitted
136 */
137 static int pca_tx_byte(struct i2c_algo_pca_data *adap,
138 __u8 b)
139 {
140 int sta = pca_get_con(adap);
141 DEB2("=== WRITE %#04x\n", b);
142 pca_outw(adap, I2C_PCA_DAT, b);
143
144 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
145 pca_set_con(adap, sta);
146
147 return pca_wait(adap);
148 }
149
150 /*
151 * Receive a byte
152 *
153 * returns immediately.
154 */
155 static void pca_rx_byte(struct i2c_algo_pca_data *adap,
156 __u8 *b, int ack)
157 {
158 *b = pca_inw(adap, I2C_PCA_DAT);
159 DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
160 }
161
162 /*
163 * Setup ACK or NACK for next received byte and wait for it to arrive.
164 *
165 * Returns after next byte has arrived.
166 */
167 static int pca_rx_ack(struct i2c_algo_pca_data *adap,
168 int ack)
169 {
170 int sta = pca_get_con(adap);
171
172 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
173
174 if (ack)
175 sta |= I2C_PCA_CON_AA;
176
177 pca_set_con(adap, sta);
178 return pca_wait(adap);
179 }
180
181 static int pca_xfer(struct i2c_adapter *i2c_adap,
182 struct i2c_msg *msgs,
183 int num)
184 {
185 struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
186 struct i2c_msg *msg = NULL;
187 int curmsg;
188 int numbytes = 0;
189 int state;
190 int ret;
191 int completed = 1;
192 unsigned long timeout = jiffies + i2c_adap->timeout;
193
194 while ((state = pca_status(adap)) != 0xf8) {
195 if (time_before(jiffies, timeout)) {
196 msleep(10);
197 } else {
198 dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
199 "%#04x\n", state);
200 return -EBUSY;
201 }
202 }
203
204 DEB1("{{{ XFER %d messages\n", num);
205
206 if (i2c_debug >= 2) {
207 for (curmsg = 0; curmsg < num; curmsg++) {
208 int addr, i;
209 msg = &msgs[curmsg];
210
211 addr = (0x7f & msg->addr) ;
212
213 if (msg->flags & I2C_M_RD)
214 printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
215 curmsg, msg->len, addr, (addr << 1) | 1);
216 else {
217 printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
218 curmsg, msg->len, addr, addr << 1,
219 msg->len == 0 ? "" : ", ");
220 for (i = 0; i < msg->len; i++)
221 printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
222 printk("]\n");
223 }
224 }
225 }
226
227 curmsg = 0;
228 ret = -EIO;
229 while (curmsg < num) {
230 state = pca_status(adap);
231
232 DEB3("STATE is 0x%02x\n", state);
233 msg = &msgs[curmsg];
234
235 switch (state) {
236 case 0xf8: /* On reset or stop the bus is idle */
237 completed = pca_start(adap);
238 break;
239
240 case 0x08: /* A START condition has been transmitted */
241 case 0x10: /* A repeated start condition has been transmitted */
242 completed = pca_address(adap, msg);
243 break;
244
245 case 0x18: /* SLA+W has been transmitted; ACK has been received */
246 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
247 if (numbytes < msg->len) {
248 completed = pca_tx_byte(adap,
249 msg->buf[numbytes]);
250 numbytes++;
251 break;
252 }
253 curmsg++; numbytes = 0;
254 if (curmsg == num)
255 pca_stop(adap);
256 else
257 completed = pca_repeated_start(adap);
258 break;
259
260 case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
261 DEB2("NOT ACK received after SLA+W\n");
262 pca_stop(adap);
263 ret = -ENXIO;
264 goto out;
265
266 case 0x40: /* SLA+R has been transmitted; ACK has been received */
267 completed = pca_rx_ack(adap, msg->len > 1);
268 break;
269
270 case 0x50: /* Data bytes has been received; ACK has been returned */
271 if (numbytes < msg->len) {
272 pca_rx_byte(adap, &msg->buf[numbytes], 1);
273 numbytes++;
274 completed = pca_rx_ack(adap,
275 numbytes < msg->len - 1);
276 break;
277 }
278 curmsg++; numbytes = 0;
279 if (curmsg == num)
280 pca_stop(adap);
281 else
282 completed = pca_repeated_start(adap);
283 break;
284
285 case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
286 DEB2("NOT ACK received after SLA+R\n");
287 pca_stop(adap);
288 ret = -ENXIO;
289 goto out;
290
291 case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
292 DEB2("NOT ACK received after data byte\n");
293 pca_stop(adap);
294 goto out;
295
296 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
297 DEB2("Arbitration lost\n");
298 /*
299 * The PCA9564 data sheet (2006-09-01) says "A
300 * START condition will be transmitted when the
301 * bus becomes free (STOP or SCL and SDA high)"
302 * when the STA bit is set (p. 11).
303 *
304 * In case this won't work, try pca_reset()
305 * instead.
306 */
307 pca_start(adap);
308 goto out;
309
310 case 0x58: /* Data byte has been received; NOT ACK has been returned */
311 if (numbytes == msg->len - 1) {
312 pca_rx_byte(adap, &msg->buf[numbytes], 0);
313 curmsg++; numbytes = 0;
314 if (curmsg == num)
315 pca_stop(adap);
316 else
317 completed = pca_repeated_start(adap);
318 } else {
319 DEB2("NOT ACK sent after data byte received. "
320 "Not final byte. numbytes %d. len %d\n",
321 numbytes, msg->len);
322 pca_stop(adap);
323 goto out;
324 }
325 break;
326 case 0x70: /* Bus error - SDA stuck low */
327 DEB2("BUS ERROR - SDA Stuck low\n");
328 pca_reset(adap);
329 goto out;
330 case 0x90: /* Bus error - SCL stuck low */
331 DEB2("BUS ERROR - SCL Stuck low\n");
332 pca_reset(adap);
333 goto out;
334 case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
335 DEB2("BUS ERROR - Illegal START or STOP\n");
336 pca_reset(adap);
337 goto out;
338 default:
339 dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
340 break;
341 }
342
343 if (!completed)
344 goto out;
345 }
346
347 ret = curmsg;
348 out:
349 DEB1("}}} transferred %d/%d messages. "
350 "status is %#04x. control is %#04x\n",
351 curmsg, num, pca_status(adap),
352 pca_get_con(adap));
353 return ret;
354 }
355
356 static u32 pca_func(struct i2c_adapter *adap)
357 {
358 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
359 }
360
361 static const struct i2c_algorithm pca_algo = {
362 .master_xfer = pca_xfer,
363 .functionality = pca_func,
364 };
365
366 static unsigned int pca_probe_chip(struct i2c_adapter *adap)
367 {
368 struct i2c_algo_pca_data *pca_data = adap->algo_data;
369 /* The trick here is to check if there is an indirect register
370 * available. If there is one, we will read the value we first
371 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
372 * we wrote on I2C_PCA_ADR
373 */
374 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
375 pca_outw(pca_data, I2C_PCA_IND, 0xAA);
376 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
377 pca_outw(pca_data, I2C_PCA_IND, 0x00);
378 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
379 if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
380 printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
381 return I2C_PCA_CHIP_9665;
382 } else {
383 printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
384 return I2C_PCA_CHIP_9564;
385 }
386 }
387
388 static int pca_init(struct i2c_adapter *adap)
389 {
390 struct i2c_algo_pca_data *pca_data = adap->algo_data;
391
392 adap->algo = &pca_algo;
393
394 if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
395 static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
396 int clock;
397
398 if (pca_data->i2c_clock > 7) {
399 switch (pca_data->i2c_clock) {
400 case 330000:
401 pca_data->i2c_clock = I2C_PCA_CON_330kHz;
402 break;
403 case 288000:
404 pca_data->i2c_clock = I2C_PCA_CON_288kHz;
405 break;
406 case 217000:
407 pca_data->i2c_clock = I2C_PCA_CON_217kHz;
408 break;
409 case 146000:
410 pca_data->i2c_clock = I2C_PCA_CON_146kHz;
411 break;
412 case 88000:
413 pca_data->i2c_clock = I2C_PCA_CON_88kHz;
414 break;
415 case 59000:
416 pca_data->i2c_clock = I2C_PCA_CON_59kHz;
417 break;
418 case 44000:
419 pca_data->i2c_clock = I2C_PCA_CON_44kHz;
420 break;
421 case 36000:
422 pca_data->i2c_clock = I2C_PCA_CON_36kHz;
423 break;
424 default:
425 printk(KERN_WARNING
426 "%s: Invalid I2C clock speed selected."
427 " Using default 59kHz.\n", adap->name);
428 pca_data->i2c_clock = I2C_PCA_CON_59kHz;
429 }
430 } else {
431 printk(KERN_WARNING "%s: "
432 "Choosing the clock frequency based on "
433 "index is deprecated."
434 " Use the nominal frequency.\n", adap->name);
435 }
436
437 pca_reset(pca_data);
438
439 clock = pca_clock(pca_data);
440 printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
441 adap->name, freqs[clock]);
442
443 pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
444 } else {
445 int clock;
446 int mode;
447 int tlow, thi;
448 /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
449 int min_tlow, min_thi;
450 /* These values are the maximum raise and fall values allowed
451 * by the I2C operation mode (Standard, Fast or Fast+)
452 * They are used (added) below to calculate the clock dividers
453 * of PCA9665. Note that they are slightly different of the
454 * real maximum, to allow the change on mode exactly on the
455 * maximum clock rate for each mode
456 */
457 int raise_fall_time;
458
459 /* Ignore the reset function from the module,
460 * we can use the parallel bus reset
461 */
462 pca_data->reset_chip = pca9665_reset;
463
464 if (pca_data->i2c_clock > 1265800) {
465 printk(KERN_WARNING "%s: I2C clock speed too high."
466 " Using 1265.8kHz.\n", adap->name);
467 pca_data->i2c_clock = 1265800;
468 }
469
470 if (pca_data->i2c_clock < 60300) {
471 printk(KERN_WARNING "%s: I2C clock speed too low."
472 " Using 60.3kHz.\n", adap->name);
473 pca_data->i2c_clock = 60300;
474 }
475
476 /* To avoid integer overflow, use clock/100 for calculations */
477 clock = pca_clock(pca_data) / 100;
478
479 if (pca_data->i2c_clock > 10000) {
480 mode = I2C_PCA_MODE_TURBO;
481 min_tlow = 14;
482 min_thi = 5;
483 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
484 } else if (pca_data->i2c_clock > 4000) {
485 mode = I2C_PCA_MODE_FASTP;
486 min_tlow = 17;
487 min_thi = 9;
488 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
489 } else if (pca_data->i2c_clock > 1000) {
490 mode = I2C_PCA_MODE_FAST;
491 min_tlow = 44;
492 min_thi = 20;
493 raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
494 } else {
495 mode = I2C_PCA_MODE_STD;
496 min_tlow = 157;
497 min_thi = 134;
498 raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
499 }
500
501 /* The minimum clock that respects the thi/tlow = 134/157 is
502 * 64800 Hz. Below that, we have to fix the tlow to 255 and
503 * calculate the thi factor.
504 */
505 if (clock < 648) {
506 tlow = 255;
507 thi = 1000000 - clock * raise_fall_time;
508 thi /= (I2C_PCA_OSC_PER * clock) - tlow;
509 } else {
510 tlow = (1000000 - clock * raise_fall_time) * min_tlow;
511 tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
512 thi = tlow * min_thi / min_tlow;
513 }
514
515 pca_reset(pca_data);
516
517 printk(KERN_INFO
518 "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
519
520 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
521 pca_outw(pca_data, I2C_PCA_IND, mode);
522 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
523 pca_outw(pca_data, I2C_PCA_IND, tlow);
524 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
525 pca_outw(pca_data, I2C_PCA_IND, thi);
526
527 pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
528 }
529 udelay(500); /* 500 us for oscilator to stabilise */
530
531 return 0;
532 }
533
534 /*
535 * registering functions to load algorithms at runtime
536 */
537 int i2c_pca_add_bus(struct i2c_adapter *adap)
538 {
539 int rval;
540
541 rval = pca_init(adap);
542 if (rval)
543 return rval;
544
545 return i2c_add_adapter(adap);
546 }
547 EXPORT_SYMBOL(i2c_pca_add_bus);
548
549 int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
550 {
551 int rval;
552
553 rval = pca_init(adap);
554 if (rval)
555 return rval;
556
557 return i2c_add_numbered_adapter(adap);
558 }
559 EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
560
561 MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
562 "Wolfram Sang <w.sang@pengutronix.de>");
563 MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
564 MODULE_LICENSE("GPL");
565
566 module_param(i2c_debug, int, 0);
Linux with added FPC-III support