drivers/mmc/host/sdhci-esdhc-imx.c

   1 /*
   2  * Freescale eSDHC i.MX controller driver for the platform bus.
   3  *
   4  * derived from the OF-version.
   5  *
   6  * Copyright (c) 2010 Pengutronix e.K.
   7  *   Author: Wolfram Sang <w.sang@pengutronix.de>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License.
  12  */
  13
  14 #include <linux/io.h>
  15 #include <linux/delay.h>
  16 #include <linux/err.h>
  17 #include <linux/clk.h>
  18 #include <linux/gpio.h>
  19 #include <linux/module.h>
  20 #include <linux/slab.h>
  21 #include <linux/mmc/host.h>
  22 #include <linux/mmc/mmc.h>
  23 #include <linux/mmc/sdio.h>
  24 #include <linux/of.h>
  25 #include <linux/of_device.h>
  26 #include <linux/of_gpio.h>
  27 #include <mach/esdhc.h>
  28 #include "sdhci-pltfm.h"
  29 #include "sdhci-esdhc.h"
  30
  31 #define SDHCI_CTRL_D3CD                 0x08
  32 /* VENDOR SPEC register */
  33 #define SDHCI_VENDOR_SPEC               0xC0
  34 #define  SDHCI_VENDOR_SPEC_SDIO_QUIRK   0x00000002
  35 #define SDHCI_WTMK_LVL                  0x44
  36 #define SDHCI_MIX_CTRL                  0x48
  37
  38 /*
  39  * There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC:
  40  * Bit25 is used in STD SPEC, and is reserved in fsl eSDHC design,
  41  * but bit28 is used as the INT DMA ERR in fsl eSDHC design.
  42  * Define this macro DMA error INT for fsl eSDHC
  43  */
  44 #define SDHCI_INT_VENDOR_SPEC_DMA_ERR   0x10000000
  45
  46 /*
  47  * The CMDTYPE of the CMD register (offset 0xE) should be set to
  48  * "11" when the STOP CMD12 is issued on imx53 to abort one
  49  * open ended multi-blk IO. Otherwise the TC INT wouldn't
  50  * be generated.
  51  * In exact block transfer, the controller doesn't complete the
  52  * operations automatically as required at the end of the
  53  * transfer and remains on hold if the abort command is not sent.
  54  * As a result, the TC flag is not asserted and SW  received timeout
  55  * exeception. Bit1 of Vendor Spec registor is used to fix it.
  56  */
  57 #define ESDHC_FLAG_MULTIBLK_NO_INT      (1 << 1)
  58
  59 enum imx_esdhc_type {
  60         IMX25_ESDHC,
  61         IMX35_ESDHC,
  62         IMX51_ESDHC,
  63         IMX53_ESDHC,
  64         IMX6Q_USDHC,
  65 };
  66
  67 struct pltfm_imx_data {
  68         int flags;
  69         u32 scratchpad;
  70         enum imx_esdhc_type devtype;
  71         struct esdhc_platform_data boarddata;
  72 };
  73
  74 static struct platform_device_id imx_esdhc_devtype[] = {
  75         {
  76                 .name = "sdhci-esdhc-imx25",
  77                 .driver_data = IMX25_ESDHC,
  78         }, {
  79                 .name = "sdhci-esdhc-imx35",
  80                 .driver_data = IMX35_ESDHC,
  81         }, {
  82                 .name = "sdhci-esdhc-imx51",
  83                 .driver_data = IMX51_ESDHC,
  84         }, {
  85                 .name = "sdhci-esdhc-imx53",
  86                 .driver_data = IMX53_ESDHC,
  87         }, {
  88                 .name = "sdhci-usdhc-imx6q",
  89                 .driver_data = IMX6Q_USDHC,
  90         }, {
  91                 /* sentinel */
  92         }
  93 };
  94 MODULE_DEVICE_TABLE(platform, imx_esdhc_devtype);
  95
  96 static const struct of_device_id imx_esdhc_dt_ids[] = {
  97         { .compatible = "fsl,imx25-esdhc", .data = &imx_esdhc_devtype[IMX25_ESDHC], },
  98         { .compatible = "fsl,imx35-esdhc", .data = &imx_esdhc_devtype[IMX35_ESDHC], },
  99         { .compatible = "fsl,imx51-esdhc", .data = &imx_esdhc_devtype[IMX51_ESDHC], },
 100         { .compatible = "fsl,imx53-esdhc", .data = &imx_esdhc_devtype[IMX53_ESDHC], },
 101         { .compatible = "fsl,imx6q-usdhc", .data = &imx_esdhc_devtype[IMX6Q_USDHC], },
 102         { /* sentinel */ }
 103 };
 104 MODULE_DEVICE_TABLE(of, imx_esdhc_dt_ids);
 105
 106 static inline int is_imx25_esdhc(struct pltfm_imx_data *data)
 107 {
 108         return data->devtype == IMX25_ESDHC;
 109 }
 110
 111 static inline int is_imx35_esdhc(struct pltfm_imx_data *data)
 112 {
 113         return data->devtype == IMX35_ESDHC;
 114 }
 115
 116 static inline int is_imx51_esdhc(struct pltfm_imx_data *data)
 117 {
 118         return data->devtype == IMX51_ESDHC;
 119 }
 120
 121 static inline int is_imx53_esdhc(struct pltfm_imx_data *data)
 122 {
 123         return data->devtype == IMX53_ESDHC;
 124 }
 125
 126 static inline int is_imx6q_usdhc(struct pltfm_imx_data *data)
 127 {
 128         return data->devtype == IMX6Q_USDHC;
 129 }
 130
 131 static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)
 132 {
 133         void __iomem *base = host->ioaddr + (reg & ~0x3);
 134         u32 shift = (reg & 0x3) * 8;
 135
 136         writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
 137 }
 138
 139 static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
 140 {
 141         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 142         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 143         struct esdhc_platform_data *boarddata = &imx_data->boarddata;
 144
 145         /* fake CARD_PRESENT flag */
 146         u32 val = readl(host->ioaddr + reg);
 147
 148         if (unlikely((reg == SDHCI_PRESENT_STATE)
 149                         && gpio_is_valid(boarddata->cd_gpio))) {
 150                 if (gpio_get_value(boarddata->cd_gpio))
 151                         /* no card, if a valid gpio says so... */
 152                         val &= ~SDHCI_CARD_PRESENT;
 153                 else
 154                         /* ... in all other cases assume card is present */
 155                         val |= SDHCI_CARD_PRESENT;
 156         }
 157
 158         if (unlikely(reg == SDHCI_CAPABILITIES)) {
 159                 /* In FSL esdhc IC module, only bit20 is used to indicate the
 160                  * ADMA2 capability of esdhc, but this bit is messed up on
 161                  * some SOCs (e.g. on MX25, MX35 this bit is set, but they
 162                  * don't actually support ADMA2). So set the BROKEN_ADMA
 163                  * uirk on MX25/35 platforms.
 164                  */
 165
 166                 if (val & SDHCI_CAN_DO_ADMA1) {
 167                         val &= ~SDHCI_CAN_DO_ADMA1;
 168                         val |= SDHCI_CAN_DO_ADMA2;
 169                 }
 170         }
 171
 172         if (unlikely(reg == SDHCI_INT_STATUS)) {
 173                 if (val & SDHCI_INT_VENDOR_SPEC_DMA_ERR) {
 174                         val &= ~SDHCI_INT_VENDOR_SPEC_DMA_ERR;
 175                         val |= SDHCI_INT_ADMA_ERROR;
 176                 }
 177         }
 178
 179         return val;
 180 }
 181
 182 static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
 183 {
 184         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 185         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 186         struct esdhc_platform_data *boarddata = &imx_data->boarddata;
 187         u32 data;
 188
 189         if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
 190                 if (boarddata->cd_type == ESDHC_CD_GPIO)
 191                         /*
 192                          * These interrupts won't work with a custom
 193                          * card_detect gpio (only applied to mx25/35)
 194                          */
 195                         val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT);
 196
 197                 if (val & SDHCI_INT_CARD_INT) {
 198                         /*
 199                          * Clear and then set D3CD bit to avoid missing the
 200                          * card interrupt.  This is a eSDHC controller problem
 201                          * so we need to apply the following workaround: clear
 202                          * and set D3CD bit will make eSDHC re-sample the card
 203                          * interrupt. In case a card interrupt was lost,
 204                          * re-sample it by the following steps.
 205                          */
 206                         data = readl(host->ioaddr + SDHCI_HOST_CONTROL);
 207                         data &= ~SDHCI_CTRL_D3CD;
 208                         writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
 209                         data |= SDHCI_CTRL_D3CD;
 210                         writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
 211                 }
 212         }
 213
 214         if (unlikely((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
 215                                 && (reg == SDHCI_INT_STATUS)
 216                                 && (val & SDHCI_INT_DATA_END))) {
 217                         u32 v;
 218                         v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
 219                         v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK;
 220                         writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
 221         }
 222
 223         if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
 224                 if (val & SDHCI_INT_ADMA_ERROR) {
 225                         val &= ~SDHCI_INT_ADMA_ERROR;
 226                         val |= SDHCI_INT_VENDOR_SPEC_DMA_ERR;
 227                 }
 228         }
 229
 230         writel(val, host->ioaddr + reg);
 231 }
 232
 233 static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
 234 {
 235         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 236         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 237
 238         if (unlikely(reg == SDHCI_HOST_VERSION)) {
 239                 reg ^= 2;
 240                 if (is_imx6q_usdhc(imx_data)) {
 241                         /*
 242                          * The usdhc register returns a wrong host version.
 243                          * Correct it here.
 244                          */
 245                         return SDHCI_SPEC_300;
 246                 }
 247         }
 248
 249         return readw(host->ioaddr + reg);
 250 }
 251
 252 static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
 253 {
 254         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 255         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 256
 257         switch (reg) {
 258         case SDHCI_TRANSFER_MODE:
 259                 /*
 260                  * Postpone this write, we must do it together with a
 261                  * command write that is down below.
 262                  */
 263                 if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
 264                                 && (host->cmd->opcode == SD_IO_RW_EXTENDED)
 265                                 && (host->cmd->data->blocks > 1)
 266                                 && (host->cmd->data->flags & MMC_DATA_READ)) {
 267                         u32 v;
 268                         v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
 269                         v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK;
 270                         writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
 271                 }
 272                 imx_data->scratchpad = val;
 273                 return;
 274         case SDHCI_COMMAND:
 275                 if ((host->cmd->opcode == MMC_STOP_TRANSMISSION ||
 276                      host->cmd->opcode == MMC_SET_BLOCK_COUNT) &&
 277                     (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
 278                         val |= SDHCI_CMD_ABORTCMD;
 279
 280                 if (is_imx6q_usdhc(imx_data)) {
 281                         u32 m = readl(host->ioaddr + SDHCI_MIX_CTRL);
 282                         m = imx_data->scratchpad | (m & 0xffff0000);
 283                         writel(m, host->ioaddr + SDHCI_MIX_CTRL);
 284                         writel(val << 16,
 285                                host->ioaddr + SDHCI_TRANSFER_MODE);
 286                 } else {
 287                         writel(val << 16 | imx_data->scratchpad,
 288                                host->ioaddr + SDHCI_TRANSFER_MODE);
 289                 }
 290                 return;
 291         case SDHCI_BLOCK_SIZE:
 292                 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
 293                 break;
 294         }
 295         esdhc_clrset_le(host, 0xffff, val, reg);
 296 }
 297
 298 static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
 299 {
 300         u32 new_val;
 301
 302         switch (reg) {
 303         case SDHCI_POWER_CONTROL:
 304                 /*
 305                  * FSL put some DMA bits here
 306                  * If your board has a regulator, code should be here
 307                  */
 308                 return;
 309         case SDHCI_HOST_CONTROL:
 310                 /* FSL messed up here, so we can just keep those three */
 311                 new_val = val & (SDHCI_CTRL_LED | \
 312                                 SDHCI_CTRL_4BITBUS | \
 313                                 SDHCI_CTRL_D3CD);
 314                 /* ensure the endianess */
 315                 new_val |= ESDHC_HOST_CONTROL_LE;
 316                 /* DMA mode bits are shifted */
 317                 new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5;
 318
 319                 esdhc_clrset_le(host, 0xffff, new_val, reg);
 320                 return;
 321         }
 322         esdhc_clrset_le(host, 0xff, val, reg);
 323
 324         /*
 325          * The esdhc has a design violation to SDHC spec which tells
 326          * that software reset should not affect card detection circuit.
 327          * But esdhc clears its SYSCTL register bits [0..2] during the
 328          * software reset.  This will stop those clocks that card detection
 329          * circuit relies on.  To work around it, we turn the clocks on back
 330          * to keep card detection circuit functional.
 331          */
 332         if ((reg == SDHCI_SOFTWARE_RESET) && (val & 1))
 333                 esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL);
 334 }
 335
 336 static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)
 337 {
 338         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 339
 340         return clk_get_rate(pltfm_host->clk);
 341 }
 342
 343 static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)
 344 {
 345         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 346
 347         return clk_get_rate(pltfm_host->clk) / 256 / 16;
 348 }
 349
 350 static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
 351 {
 352         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 353         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 354         struct esdhc_platform_data *boarddata = &imx_data->boarddata;
 355
 356         switch (boarddata->wp_type) {
 357         case ESDHC_WP_GPIO:
 358                 if (gpio_is_valid(boarddata->wp_gpio))
 359                         return gpio_get_value(boarddata->wp_gpio);
 360         case ESDHC_WP_CONTROLLER:
 361                 return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
 362                                SDHCI_WRITE_PROTECT);
 363         case ESDHC_WP_NONE:
 364                 break;
 365         }
 366
 367         return -ENOSYS;
 368 }
 369
 370 static struct sdhci_ops sdhci_esdhc_ops = {
 371         .read_l = esdhc_readl_le,
 372         .read_w = esdhc_readw_le,
 373         .write_l = esdhc_writel_le,
 374         .write_w = esdhc_writew_le,
 375         .write_b = esdhc_writeb_le,
 376         .set_clock = esdhc_set_clock,
 377         .get_max_clock = esdhc_pltfm_get_max_clock,
 378         .get_min_clock = esdhc_pltfm_get_min_clock,
 379         .get_ro = esdhc_pltfm_get_ro,
 380 };
 381
 382 static struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
 383         .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_NO_HISPD_BIT
 384                         | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
 385                         | SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC
 386                         | SDHCI_QUIRK_BROKEN_CARD_DETECTION,
 387         .ops = &sdhci_esdhc_ops,
 388 };
 389
 390 static irqreturn_t cd_irq(int irq, void *data)
 391 {
 392         struct sdhci_host *sdhost = (struct sdhci_host *)data;
 393
 394         tasklet_schedule(&sdhost->card_tasklet);
 395         return IRQ_HANDLED;
 396 };
 397
 398 #ifdef CONFIG_OF
 399 static int __devinit
 400 sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
 401                          struct esdhc_platform_data *boarddata)
 402 {
 403         struct device_node *np = pdev->dev.of_node;
 404
 405         if (!np)
 406                 return -ENODEV;
 407
 408         if (of_get_property(np, "fsl,card-wired", NULL))
 409                 boarddata->cd_type = ESDHC_CD_PERMANENT;
 410
 411         if (of_get_property(np, "fsl,cd-controller", NULL))
 412                 boarddata->cd_type = ESDHC_CD_CONTROLLER;
 413
 414         if (of_get_property(np, "fsl,wp-controller", NULL))
 415                 boarddata->wp_type = ESDHC_WP_CONTROLLER;
 416
 417         boarddata->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
 418         if (gpio_is_valid(boarddata->cd_gpio))
 419                 boarddata->cd_type = ESDHC_CD_GPIO;
 420
 421         boarddata->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
 422         if (gpio_is_valid(boarddata->wp_gpio))
 423                 boarddata->wp_type = ESDHC_WP_GPIO;
 424
 425         return 0;
 426 }
 427 #else
 428 static inline int
 429 sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
 430                          struct esdhc_platform_data *boarddata)
 431 {
 432         return -ENODEV;
 433 }
 434 #endif
 435
 436 static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
 437 {
 438         const struct of_device_id *of_id =
 439                         of_match_device(imx_esdhc_dt_ids, &pdev->dev);
 440         struct sdhci_pltfm_host *pltfm_host;
 441         struct sdhci_host *host;
 442         struct esdhc_platform_data *boarddata;
 443         struct clk *clk;
 444         int err;
 445         struct pltfm_imx_data *imx_data;
 446
 447         host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata);
 448         if (IS_ERR(host))
 449                 return PTR_ERR(host);
 450
 451         pltfm_host = sdhci_priv(host);
 452
 453         imx_data = kzalloc(sizeof(struct pltfm_imx_data), GFP_KERNEL);
 454         if (!imx_data) {
 455                 err = -ENOMEM;
 456                 goto err_imx_data;
 457         }
 458
 459         if (of_id)
 460                 pdev->id_entry = of_id->data;
 461         imx_data->devtype = pdev->id_entry->driver_data;
 462         pltfm_host->priv = imx_data;
 463
 464         clk = clk_get(mmc_dev(host->mmc), NULL);
 465         if (IS_ERR(clk)) {
 466                 dev_err(mmc_dev(host->mmc), "clk err\n");
 467                 err = PTR_ERR(clk);
 468                 goto err_clk_get;
 469         }
 470         clk_prepare_enable(clk);
 471         pltfm_host->clk = clk;
 472
 473         host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
 474
 475         if (is_imx25_esdhc(imx_data) || is_imx35_esdhc(imx_data))
 476                 /* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */
 477                 host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK
 478                         | SDHCI_QUIRK_BROKEN_ADMA;
 479
 480         if (is_imx53_esdhc(imx_data))
 481                 imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT;
 482
 483         /*
 484          * The imx6q ROM code will change the default watermark level setting
 485          * to something insane.  Change it back here.
 486          */
 487         if (is_imx6q_usdhc(imx_data))
 488                 writel(0x08100810, host->ioaddr + SDHCI_WTMK_LVL);
 489
 490         boarddata = &imx_data->boarddata;
 491         if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
 492                 if (!host->mmc->parent->platform_data) {
 493                         dev_err(mmc_dev(host->mmc), "no board data!\n");
 494                         err = -EINVAL;
 495                         goto no_board_data;
 496                 }
 497                 imx_data->boarddata = *((struct esdhc_platform_data *)
 498                                         host->mmc->parent->platform_data);
 499         }
 500
 501         /* write_protect */
 502         if (boarddata->wp_type == ESDHC_WP_GPIO) {
 503                 err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP");
 504                 if (err) {
 505                         dev_warn(mmc_dev(host->mmc),
 506                                  "no write-protect pin available!\n");
 507                         boarddata->wp_gpio = -EINVAL;
 508                 }
 509         } else {
 510                 boarddata->wp_gpio = -EINVAL;
 511         }
 512
 513         /* card_detect */
 514         if (boarddata->cd_type != ESDHC_CD_GPIO)
 515                 boarddata->cd_gpio = -EINVAL;
 516
 517         switch (boarddata->cd_type) {
 518         case ESDHC_CD_GPIO:
 519                 err = gpio_request_one(boarddata->cd_gpio, GPIOF_IN, "ESDHC_CD");
 520                 if (err) {
 521                         dev_err(mmc_dev(host->mmc),
 522                                 "no card-detect pin available!\n");
 523                         goto no_card_detect_pin;
 524                 }
 525
 526                 err = request_irq(gpio_to_irq(boarddata->cd_gpio), cd_irq,
 527                                  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 528                                  mmc_hostname(host->mmc), host);
 529                 if (err) {
 530                         dev_err(mmc_dev(host->mmc), "request irq error\n");
 531                         goto no_card_detect_irq;
 532                 }
 533                 /* fall through */
 534
 535         case ESDHC_CD_CONTROLLER:
 536                 /* we have a working card_detect back */
 537                 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 538                 break;
 539
 540         case ESDHC_CD_PERMANENT:
 541                 host->mmc->caps = MMC_CAP_NONREMOVABLE;
 542                 break;
 543
 544         case ESDHC_CD_NONE:
 545                 break;
 546         }
 547
 548         err = sdhci_add_host(host);
 549         if (err)
 550                 goto err_add_host;
 551
 552         return 0;
 553
 554 err_add_host:
 555         if (gpio_is_valid(boarddata->cd_gpio))
 556                 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
 557 no_card_detect_irq:
 558         if (gpio_is_valid(boarddata->cd_gpio))
 559                 gpio_free(boarddata->cd_gpio);
 560         if (gpio_is_valid(boarddata->wp_gpio))
 561                 gpio_free(boarddata->wp_gpio);
 562 no_card_detect_pin:
 563 no_board_data:
 564         clk_disable_unprepare(pltfm_host->clk);
 565         clk_put(pltfm_host->clk);
 566 err_clk_get:
 567         kfree(imx_data);
 568 err_imx_data:
 569         sdhci_pltfm_free(pdev);
 570         return err;
 571 }
 572
 573 static int __devexit sdhci_esdhc_imx_remove(struct platform_device *pdev)
 574 {
 575         struct sdhci_host *host = platform_get_drvdata(pdev);
 576         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 577         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 578         struct esdhc_platform_data *boarddata = &imx_data->boarddata;
 579         int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
 580
 581         sdhci_remove_host(host, dead);
 582
 583         if (gpio_is_valid(boarddata->wp_gpio))
 584                 gpio_free(boarddata->wp_gpio);
 585
 586         if (gpio_is_valid(boarddata->cd_gpio)) {
 587                 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
 588                 gpio_free(boarddata->cd_gpio);
 589         }
 590
 591         clk_disable_unprepare(pltfm_host->clk);
 592         clk_put(pltfm_host->clk);
 593         kfree(imx_data);
 594
 595         sdhci_pltfm_free(pdev);
 596
 597         return 0;
 598 }
 599
 600 static struct platform_driver sdhci_esdhc_imx_driver = {
 601         .driver         = {
 602                 .name   = "sdhci-esdhc-imx",
 603                 .owner  = THIS_MODULE,
 604                 .of_match_table = imx_esdhc_dt_ids,
 605                 .pm     = SDHCI_PLTFM_PMOPS,
 606         },
 607         .id_table       = imx_esdhc_devtype,
 608         .probe          = sdhci_esdhc_imx_probe,
 609         .remove         = __devexit_p(sdhci_esdhc_imx_remove),
 610 };
 611
 612 module_platform_driver(sdhci_esdhc_imx_driver);
 613
 614 MODULE_DESCRIPTION("SDHCI driver for Freescale i.MX eSDHC");
 615 MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>");
 616 MODULE_LICENSE("GPL v2");