Linux 3.4.102
[linux/fpc-iii.git] / drivers / mmc / host / sdhci-tegra.c
blob53b26502f6e2ec36123351833cc80a9fd35e8fd6
1 /*
2 * Copyright (C) 2010 Google, Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
15 #include <linux/err.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/clk.h>
20 #include <linux/io.h>
21 #include <linux/of.h>
22 #include <linux/of_device.h>
23 #include <linux/of_gpio.h>
24 #include <linux/gpio.h>
25 #include <linux/mmc/card.h>
26 #include <linux/mmc/host.h>
28 #include <asm/gpio.h>
30 #include <mach/gpio-tegra.h>
31 #include <mach/sdhci.h>
33 #include "sdhci-pltfm.h"
35 #define NVQUIRK_FORCE_SDHCI_SPEC_200 BIT(0)
36 #define NVQUIRK_ENABLE_BLOCK_GAP_DET BIT(1)
38 struct sdhci_tegra_soc_data {
39 struct sdhci_pltfm_data *pdata;
40 u32 nvquirks;
43 struct sdhci_tegra {
44 const struct tegra_sdhci_platform_data *plat;
45 const struct sdhci_tegra_soc_data *soc_data;
48 static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg)
50 u32 val;
52 if (unlikely(reg == SDHCI_PRESENT_STATE)) {
53 /* Use wp_gpio here instead? */
54 val = readl(host->ioaddr + reg);
55 return val | SDHCI_WRITE_PROTECT;
58 return readl(host->ioaddr + reg);
61 static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg)
63 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
64 struct sdhci_tegra *tegra_host = pltfm_host->priv;
65 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;
67 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) &&
68 (reg == SDHCI_HOST_VERSION))) {
69 /* Erratum: Version register is invalid in HW. */
70 return SDHCI_SPEC_200;
73 return readw(host->ioaddr + reg);
76 static void tegra_sdhci_writel(struct sdhci_host *host, u32 val, int reg)
78 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
79 struct sdhci_tegra *tegra_host = pltfm_host->priv;
80 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;
82 /* Seems like we're getting spurious timeout and crc errors, so
83 * disable signalling of them. In case of real errors software
84 * timers should take care of eventually detecting them.
86 if (unlikely(reg == SDHCI_SIGNAL_ENABLE))
87 val &= ~(SDHCI_INT_TIMEOUT|SDHCI_INT_CRC);
89 writel(val, host->ioaddr + reg);
91 if (unlikely((soc_data->nvquirks & NVQUIRK_ENABLE_BLOCK_GAP_DET) &&
92 (reg == SDHCI_INT_ENABLE))) {
93 /* Erratum: Must enable block gap interrupt detection */
94 u8 gap_ctrl = readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL);
95 if (val & SDHCI_INT_CARD_INT)
96 gap_ctrl |= 0x8;
97 else
98 gap_ctrl &= ~0x8;
99 writeb(gap_ctrl, host->ioaddr + SDHCI_BLOCK_GAP_CONTROL);
103 static unsigned int tegra_sdhci_get_ro(struct sdhci_host *host)
105 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
106 struct sdhci_tegra *tegra_host = pltfm_host->priv;
107 const struct tegra_sdhci_platform_data *plat = tegra_host->plat;
109 if (!gpio_is_valid(plat->wp_gpio))
110 return -1;
112 return gpio_get_value(plat->wp_gpio);
115 static irqreturn_t carddetect_irq(int irq, void *data)
117 struct sdhci_host *sdhost = (struct sdhci_host *)data;
119 tasklet_schedule(&sdhost->card_tasklet);
120 return IRQ_HANDLED;
123 static int tegra_sdhci_8bit(struct sdhci_host *host, int bus_width)
125 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
126 struct sdhci_tegra *tegra_host = pltfm_host->priv;
127 const struct tegra_sdhci_platform_data *plat = tegra_host->plat;
128 u32 ctrl;
130 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
131 if (plat->is_8bit && bus_width == MMC_BUS_WIDTH_8) {
132 ctrl &= ~SDHCI_CTRL_4BITBUS;
133 ctrl |= SDHCI_CTRL_8BITBUS;
134 } else {
135 ctrl &= ~SDHCI_CTRL_8BITBUS;
136 if (bus_width == MMC_BUS_WIDTH_4)
137 ctrl |= SDHCI_CTRL_4BITBUS;
138 else
139 ctrl &= ~SDHCI_CTRL_4BITBUS;
141 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
142 return 0;
145 static struct sdhci_ops tegra_sdhci_ops = {
146 .get_ro = tegra_sdhci_get_ro,
147 .read_l = tegra_sdhci_readl,
148 .read_w = tegra_sdhci_readw,
149 .write_l = tegra_sdhci_writel,
150 .platform_8bit_width = tegra_sdhci_8bit,
153 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
154 static struct sdhci_pltfm_data sdhci_tegra20_pdata = {
155 .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
156 SDHCI_QUIRK_SINGLE_POWER_WRITE |
157 SDHCI_QUIRK_NO_HISPD_BIT |
158 SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC,
159 .ops = &tegra_sdhci_ops,
162 static struct sdhci_tegra_soc_data soc_data_tegra20 = {
163 .pdata = &sdhci_tegra20_pdata,
164 .nvquirks = NVQUIRK_FORCE_SDHCI_SPEC_200 |
165 NVQUIRK_ENABLE_BLOCK_GAP_DET,
167 #endif
169 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
170 static struct sdhci_pltfm_data sdhci_tegra30_pdata = {
171 .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
172 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
173 SDHCI_QUIRK_SINGLE_POWER_WRITE |
174 SDHCI_QUIRK_NO_HISPD_BIT |
175 SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC,
176 .ops = &tegra_sdhci_ops,
179 static struct sdhci_tegra_soc_data soc_data_tegra30 = {
180 .pdata = &sdhci_tegra30_pdata,
182 #endif
184 static const struct of_device_id sdhci_tegra_dt_match[] __devinitdata = {
185 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
186 { .compatible = "nvidia,tegra30-sdhci", .data = &soc_data_tegra30 },
187 #endif
188 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
189 { .compatible = "nvidia,tegra20-sdhci", .data = &soc_data_tegra20 },
190 #endif
193 MODULE_DEVICE_TABLE(of, sdhci_dt_ids);
195 static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata(
196 struct platform_device *pdev)
198 struct tegra_sdhci_platform_data *plat;
199 struct device_node *np = pdev->dev.of_node;
201 if (!np)
202 return NULL;
204 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
205 if (!plat) {
206 dev_err(&pdev->dev, "Can't allocate platform data\n");
207 return NULL;
210 plat->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
211 plat->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
212 plat->power_gpio = of_get_named_gpio(np, "power-gpios", 0);
213 if (of_find_property(np, "support-8bit", NULL))
214 plat->is_8bit = 1;
216 return plat;
219 static int __devinit sdhci_tegra_probe(struct platform_device *pdev)
221 const struct of_device_id *match;
222 const struct sdhci_tegra_soc_data *soc_data;
223 struct sdhci_host *host;
224 struct sdhci_pltfm_host *pltfm_host;
225 struct tegra_sdhci_platform_data *plat;
226 struct sdhci_tegra *tegra_host;
227 struct clk *clk;
228 int rc;
230 match = of_match_device(sdhci_tegra_dt_match, &pdev->dev);
231 if (match)
232 soc_data = match->data;
233 else
234 soc_data = &soc_data_tegra20;
236 host = sdhci_pltfm_init(pdev, soc_data->pdata);
237 if (IS_ERR(host))
238 return PTR_ERR(host);
240 pltfm_host = sdhci_priv(host);
242 plat = pdev->dev.platform_data;
244 if (plat == NULL)
245 plat = sdhci_tegra_dt_parse_pdata(pdev);
247 if (plat == NULL) {
248 dev_err(mmc_dev(host->mmc), "missing platform data\n");
249 rc = -ENXIO;
250 goto err_no_plat;
253 tegra_host = devm_kzalloc(&pdev->dev, sizeof(*tegra_host), GFP_KERNEL);
254 if (!tegra_host) {
255 dev_err(mmc_dev(host->mmc), "failed to allocate tegra_host\n");
256 rc = -ENOMEM;
257 goto err_no_plat;
260 tegra_host->plat = plat;
261 tegra_host->soc_data = soc_data;
263 pltfm_host->priv = tegra_host;
265 if (gpio_is_valid(plat->power_gpio)) {
266 rc = gpio_request(plat->power_gpio, "sdhci_power");
267 if (rc) {
268 dev_err(mmc_dev(host->mmc),
269 "failed to allocate power gpio\n");
270 goto err_power_req;
272 tegra_gpio_enable(plat->power_gpio);
273 gpio_direction_output(plat->power_gpio, 1);
276 if (gpio_is_valid(plat->cd_gpio)) {
277 rc = gpio_request(plat->cd_gpio, "sdhci_cd");
278 if (rc) {
279 dev_err(mmc_dev(host->mmc),
280 "failed to allocate cd gpio\n");
281 goto err_cd_req;
283 tegra_gpio_enable(plat->cd_gpio);
284 gpio_direction_input(plat->cd_gpio);
286 rc = request_irq(gpio_to_irq(plat->cd_gpio), carddetect_irq,
287 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
288 mmc_hostname(host->mmc), host);
290 if (rc) {
291 dev_err(mmc_dev(host->mmc), "request irq error\n");
292 goto err_cd_irq_req;
297 if (gpio_is_valid(plat->wp_gpio)) {
298 rc = gpio_request(plat->wp_gpio, "sdhci_wp");
299 if (rc) {
300 dev_err(mmc_dev(host->mmc),
301 "failed to allocate wp gpio\n");
302 goto err_wp_req;
304 tegra_gpio_enable(plat->wp_gpio);
305 gpio_direction_input(plat->wp_gpio);
308 clk = clk_get(mmc_dev(host->mmc), NULL);
309 if (IS_ERR(clk)) {
310 dev_err(mmc_dev(host->mmc), "clk err\n");
311 rc = PTR_ERR(clk);
312 goto err_clk_get;
314 clk_enable(clk);
315 pltfm_host->clk = clk;
317 host->mmc->pm_caps = plat->pm_flags;
319 if (plat->is_8bit)
320 host->mmc->caps |= MMC_CAP_8_BIT_DATA;
322 rc = sdhci_add_host(host);
323 if (rc)
324 goto err_add_host;
326 return 0;
328 err_add_host:
329 clk_disable(pltfm_host->clk);
330 clk_put(pltfm_host->clk);
331 err_clk_get:
332 if (gpio_is_valid(plat->wp_gpio)) {
333 tegra_gpio_disable(plat->wp_gpio);
334 gpio_free(plat->wp_gpio);
336 err_wp_req:
337 if (gpio_is_valid(plat->cd_gpio))
338 free_irq(gpio_to_irq(plat->cd_gpio), host);
339 err_cd_irq_req:
340 if (gpio_is_valid(plat->cd_gpio)) {
341 tegra_gpio_disable(plat->cd_gpio);
342 gpio_free(plat->cd_gpio);
344 err_cd_req:
345 if (gpio_is_valid(plat->power_gpio)) {
346 tegra_gpio_disable(plat->power_gpio);
347 gpio_free(plat->power_gpio);
349 err_power_req:
350 err_no_plat:
351 sdhci_pltfm_free(pdev);
352 return rc;
355 static int __devexit sdhci_tegra_remove(struct platform_device *pdev)
357 struct sdhci_host *host = platform_get_drvdata(pdev);
358 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
359 struct sdhci_tegra *tegra_host = pltfm_host->priv;
360 const struct tegra_sdhci_platform_data *plat = tegra_host->plat;
361 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
363 sdhci_remove_host(host, dead);
365 if (gpio_is_valid(plat->wp_gpio)) {
366 tegra_gpio_disable(plat->wp_gpio);
367 gpio_free(plat->wp_gpio);
370 if (gpio_is_valid(plat->cd_gpio)) {
371 free_irq(gpio_to_irq(plat->cd_gpio), host);
372 tegra_gpio_disable(plat->cd_gpio);
373 gpio_free(plat->cd_gpio);
376 if (gpio_is_valid(plat->power_gpio)) {
377 tegra_gpio_disable(plat->power_gpio);
378 gpio_free(plat->power_gpio);
381 clk_disable(pltfm_host->clk);
382 clk_put(pltfm_host->clk);
384 sdhci_pltfm_free(pdev);
386 return 0;
389 static struct platform_driver sdhci_tegra_driver = {
390 .driver = {
391 .name = "sdhci-tegra",
392 .owner = THIS_MODULE,
393 .of_match_table = sdhci_tegra_dt_match,
394 .pm = SDHCI_PLTFM_PMOPS,
396 .probe = sdhci_tegra_probe,
397 .remove = __devexit_p(sdhci_tegra_remove),
400 module_platform_driver(sdhci_tegra_driver);
402 MODULE_DESCRIPTION("SDHCI driver for Tegra");
403 MODULE_AUTHOR("Google, Inc.");
404 MODULE_LICENSE("GPL v2");