2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/cd-gpio.h>
38 #include <linux/mmc/host.h>
39 #include <linux/mmc/tmio.h>
40 #include <linux/module.h>
41 #include <linux/pagemap.h>
42 #include <linux/platform_device.h>
43 #include <linux/pm_qos.h>
44 #include <linux/pm_runtime.h>
45 #include <linux/scatterlist.h>
46 #include <linux/spinlock.h>
47 #include <linux/workqueue.h>
51 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
53 host
->sdcard_irq_mask
&= ~(i
& TMIO_MASK_IRQ
);
54 sd_ctrl_write32(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
57 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
59 host
->sdcard_irq_mask
|= (i
& TMIO_MASK_IRQ
);
60 sd_ctrl_write32(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
63 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
65 sd_ctrl_write32(host
, CTL_STATUS
, ~i
);
68 static void tmio_mmc_init_sg(struct tmio_mmc_host
*host
, struct mmc_data
*data
)
70 host
->sg_len
= data
->sg_len
;
71 host
->sg_ptr
= data
->sg
;
72 host
->sg_orig
= data
->sg
;
76 static int tmio_mmc_next_sg(struct tmio_mmc_host
*host
)
78 host
->sg_ptr
= sg_next(host
->sg_ptr
);
80 return --host
->sg_len
;
83 #ifdef CONFIG_MMC_DEBUG
85 #define STATUS_TO_TEXT(a, status, i) \
87 if (status & TMIO_STAT_##a) { \
94 static void pr_debug_status(u32 status
)
97 pr_debug("status: %08x = ", status
);
98 STATUS_TO_TEXT(CARD_REMOVE
, status
, i
);
99 STATUS_TO_TEXT(CARD_INSERT
, status
, i
);
100 STATUS_TO_TEXT(SIGSTATE
, status
, i
);
101 STATUS_TO_TEXT(WRPROTECT
, status
, i
);
102 STATUS_TO_TEXT(CARD_REMOVE_A
, status
, i
);
103 STATUS_TO_TEXT(CARD_INSERT_A
, status
, i
);
104 STATUS_TO_TEXT(SIGSTATE_A
, status
, i
);
105 STATUS_TO_TEXT(CMD_IDX_ERR
, status
, i
);
106 STATUS_TO_TEXT(STOPBIT_ERR
, status
, i
);
107 STATUS_TO_TEXT(ILL_FUNC
, status
, i
);
108 STATUS_TO_TEXT(CMD_BUSY
, status
, i
);
109 STATUS_TO_TEXT(CMDRESPEND
, status
, i
);
110 STATUS_TO_TEXT(DATAEND
, status
, i
);
111 STATUS_TO_TEXT(CRCFAIL
, status
, i
);
112 STATUS_TO_TEXT(DATATIMEOUT
, status
, i
);
113 STATUS_TO_TEXT(CMDTIMEOUT
, status
, i
);
114 STATUS_TO_TEXT(RXOVERFLOW
, status
, i
);
115 STATUS_TO_TEXT(TXUNDERRUN
, status
, i
);
116 STATUS_TO_TEXT(RXRDY
, status
, i
);
117 STATUS_TO_TEXT(TXRQ
, status
, i
);
118 STATUS_TO_TEXT(ILL_ACCESS
, status
, i
);
123 #define pr_debug_status(s) do { } while (0)
126 static void tmio_mmc_enable_sdio_irq(struct mmc_host
*mmc
, int enable
)
128 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
131 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
&
132 ~TMIO_SDIO_STAT_IOIRQ
;
133 sd_ctrl_write16(host
, CTL_TRANSACTION_CTL
, 0x0001);
134 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
136 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
;
137 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
138 sd_ctrl_write16(host
, CTL_TRANSACTION_CTL
, 0x0000);
142 static void tmio_mmc_set_clock(struct tmio_mmc_host
*host
, int new_clock
)
147 for (clock
= host
->mmc
->f_min
, clk
= 0x80000080;
148 new_clock
>= (clock
<<1); clk
>>= 1)
153 if (host
->set_clk_div
)
154 host
->set_clk_div(host
->pdev
, (clk
>>22) & 1);
156 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, clk
& 0x1ff);
159 static void tmio_mmc_clk_stop(struct tmio_mmc_host
*host
)
161 struct resource
*res
= platform_get_resource(host
->pdev
, IORESOURCE_MEM
, 0);
163 /* implicit BUG_ON(!res) */
164 if (resource_size(res
) > 0x100) {
165 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0000);
169 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, ~0x0100 &
170 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
174 static void tmio_mmc_clk_start(struct tmio_mmc_host
*host
)
176 struct resource
*res
= platform_get_resource(host
->pdev
, IORESOURCE_MEM
, 0);
178 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, 0x0100 |
179 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
182 /* implicit BUG_ON(!res) */
183 if (resource_size(res
) > 0x100) {
184 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0100);
189 static void tmio_mmc_reset(struct tmio_mmc_host
*host
)
191 struct resource
*res
= platform_get_resource(host
->pdev
, IORESOURCE_MEM
, 0);
193 /* FIXME - should we set stop clock reg here */
194 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0000);
195 /* implicit BUG_ON(!res) */
196 if (resource_size(res
) > 0x100)
197 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0000);
199 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0001);
200 if (resource_size(res
) > 0x100)
201 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0001);
205 static void tmio_mmc_reset_work(struct work_struct
*work
)
207 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
208 delayed_reset_work
.work
);
209 struct mmc_request
*mrq
;
212 spin_lock_irqsave(&host
->lock
, flags
);
216 * is request already finished? Since we use a non-blocking
217 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
218 * us, so, have to check for IS_ERR(host->mrq)
220 if (IS_ERR_OR_NULL(mrq
)
221 || time_is_after_jiffies(host
->last_req_ts
+
222 msecs_to_jiffies(2000))) {
223 spin_unlock_irqrestore(&host
->lock
, flags
);
227 dev_warn(&host
->pdev
->dev
,
228 "timeout waiting for hardware interrupt (CMD%u)\n",
232 host
->data
->error
= -ETIMEDOUT
;
234 host
->cmd
->error
= -ETIMEDOUT
;
236 mrq
->cmd
->error
= -ETIMEDOUT
;
240 host
->force_pio
= false;
242 spin_unlock_irqrestore(&host
->lock
, flags
);
244 tmio_mmc_reset(host
);
246 /* Ready for new calls */
249 tmio_mmc_abort_dma(host
);
250 mmc_request_done(host
->mmc
, mrq
);
253 /* called with host->lock held, interrupts disabled */
254 static void tmio_mmc_finish_request(struct tmio_mmc_host
*host
)
256 struct mmc_request
*mrq
;
259 spin_lock_irqsave(&host
->lock
, flags
);
262 if (IS_ERR_OR_NULL(mrq
)) {
263 spin_unlock_irqrestore(&host
->lock
, flags
);
269 host
->force_pio
= false;
271 cancel_delayed_work(&host
->delayed_reset_work
);
274 spin_unlock_irqrestore(&host
->lock
, flags
);
276 if (mrq
->cmd
->error
|| (mrq
->data
&& mrq
->data
->error
))
277 tmio_mmc_abort_dma(host
);
279 mmc_request_done(host
->mmc
, mrq
);
282 static void tmio_mmc_done_work(struct work_struct
*work
)
284 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
286 tmio_mmc_finish_request(host
);
289 /* These are the bitmasks the tmio chip requires to implement the MMC response
290 * types. Note that R1 and R6 are the same in this scheme. */
291 #define APP_CMD 0x0040
292 #define RESP_NONE 0x0300
293 #define RESP_R1 0x0400
294 #define RESP_R1B 0x0500
295 #define RESP_R2 0x0600
296 #define RESP_R3 0x0700
297 #define DATA_PRESENT 0x0800
298 #define TRANSFER_READ 0x1000
299 #define TRANSFER_MULTI 0x2000
300 #define SECURITY_CMD 0x4000
302 static int tmio_mmc_start_command(struct tmio_mmc_host
*host
, struct mmc_command
*cmd
)
304 struct mmc_data
*data
= host
->data
;
306 u32 irq_mask
= TMIO_MASK_CMD
;
308 /* Command 12 is handled by hardware */
309 if (cmd
->opcode
== 12 && !cmd
->arg
) {
310 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x001);
314 switch (mmc_resp_type(cmd
)) {
315 case MMC_RSP_NONE
: c
|= RESP_NONE
; break;
316 case MMC_RSP_R1
: c
|= RESP_R1
; break;
317 case MMC_RSP_R1B
: c
|= RESP_R1B
; break;
318 case MMC_RSP_R2
: c
|= RESP_R2
; break;
319 case MMC_RSP_R3
: c
|= RESP_R3
; break;
321 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd
));
327 /* FIXME - this seems to be ok commented out but the spec suggest this bit
328 * should be set when issuing app commands.
329 * if(cmd->flags & MMC_FLAG_ACMD)
334 if (data
->blocks
> 1) {
335 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x100);
338 if (data
->flags
& MMC_DATA_READ
)
342 if (!host
->native_hotplug
)
343 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
344 tmio_mmc_enable_mmc_irqs(host
, irq_mask
);
346 /* Fire off the command */
347 sd_ctrl_write32(host
, CTL_ARG_REG
, cmd
->arg
);
348 sd_ctrl_write16(host
, CTL_SD_CMD
, c
);
354 * This chip always returns (at least?) as much data as you ask for.
355 * I'm unsure what happens if you ask for less than a block. This should be
356 * looked into to ensure that a funny length read doesn't hose the controller.
358 static void tmio_mmc_pio_irq(struct tmio_mmc_host
*host
)
360 struct mmc_data
*data
= host
->data
;
366 if ((host
->chan_tx
|| host
->chan_rx
) && !host
->force_pio
) {
367 pr_err("PIO IRQ in DMA mode!\n");
370 pr_debug("Spurious PIO IRQ\n");
374 sg_virt
= tmio_mmc_kmap_atomic(host
->sg_ptr
, &flags
);
375 buf
= (unsigned short *)(sg_virt
+ host
->sg_off
);
377 count
= host
->sg_ptr
->length
- host
->sg_off
;
378 if (count
> data
->blksz
)
381 pr_debug("count: %08x offset: %08x flags %08x\n",
382 count
, host
->sg_off
, data
->flags
);
384 /* Transfer the data */
385 if (data
->flags
& MMC_DATA_READ
)
386 sd_ctrl_read16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
388 sd_ctrl_write16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
390 host
->sg_off
+= count
;
392 tmio_mmc_kunmap_atomic(host
->sg_ptr
, &flags
, sg_virt
);
394 if (host
->sg_off
== host
->sg_ptr
->length
)
395 tmio_mmc_next_sg(host
);
400 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host
*host
)
402 if (host
->sg_ptr
== &host
->bounce_sg
) {
404 void *sg_vaddr
= tmio_mmc_kmap_atomic(host
->sg_orig
, &flags
);
405 memcpy(sg_vaddr
, host
->bounce_buf
, host
->bounce_sg
.length
);
406 tmio_mmc_kunmap_atomic(host
->sg_orig
, &flags
, sg_vaddr
);
410 /* needs to be called with host->lock held */
411 void tmio_mmc_do_data_irq(struct tmio_mmc_host
*host
)
413 struct mmc_data
*data
= host
->data
;
414 struct mmc_command
*stop
;
419 dev_warn(&host
->pdev
->dev
, "Spurious data end IRQ\n");
424 /* FIXME - return correct transfer count on errors */
426 data
->bytes_xfered
= data
->blocks
* data
->blksz
;
428 data
->bytes_xfered
= 0;
430 pr_debug("Completed data request\n");
433 * FIXME: other drivers allow an optional stop command of any given type
434 * which we dont do, as the chip can auto generate them.
435 * Perhaps we can be smarter about when to use auto CMD12 and
436 * only issue the auto request when we know this is the desired
437 * stop command, allowing fallback to the stop command the
438 * upper layers expect. For now, we do what works.
441 if (data
->flags
& MMC_DATA_READ
) {
442 if (host
->chan_rx
&& !host
->force_pio
)
443 tmio_mmc_check_bounce_buffer(host
);
444 dev_dbg(&host
->pdev
->dev
, "Complete Rx request %p\n",
447 dev_dbg(&host
->pdev
->dev
, "Complete Tx request %p\n",
452 if (stop
->opcode
== 12 && !stop
->arg
)
453 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x000);
458 schedule_work(&host
->done
);
461 static void tmio_mmc_data_irq(struct tmio_mmc_host
*host
)
463 struct mmc_data
*data
;
464 spin_lock(&host
->lock
);
470 if (host
->chan_tx
&& (data
->flags
& MMC_DATA_WRITE
) && !host
->force_pio
) {
472 * Has all data been written out yet? Testing on SuperH showed,
473 * that in most cases the first interrupt comes already with the
474 * BUSY status bit clear, but on some operations, like mount or
475 * in the beginning of a write / sync / umount, there is one
476 * DATAEND interrupt with the BUSY bit set, in this cases
477 * waiting for one more interrupt fixes the problem.
479 if (!(sd_ctrl_read32(host
, CTL_STATUS
) & TMIO_STAT_CMD_BUSY
)) {
480 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
481 tasklet_schedule(&host
->dma_complete
);
483 } else if (host
->chan_rx
&& (data
->flags
& MMC_DATA_READ
) && !host
->force_pio
) {
484 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
485 tasklet_schedule(&host
->dma_complete
);
487 tmio_mmc_do_data_irq(host
);
488 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_READOP
| TMIO_MASK_WRITEOP
);
491 spin_unlock(&host
->lock
);
494 static void tmio_mmc_cmd_irq(struct tmio_mmc_host
*host
,
497 struct mmc_command
*cmd
= host
->cmd
;
500 spin_lock(&host
->lock
);
503 pr_debug("Spurious CMD irq\n");
509 /* This controller is sicker than the PXA one. Not only do we need to
510 * drop the top 8 bits of the first response word, we also need to
511 * modify the order of the response for short response command types.
514 for (i
= 3, addr
= CTL_RESPONSE
; i
>= 0 ; i
--, addr
+= 4)
515 cmd
->resp
[i
] = sd_ctrl_read32(host
, addr
);
517 if (cmd
->flags
& MMC_RSP_136
) {
518 cmd
->resp
[0] = (cmd
->resp
[0] << 8) | (cmd
->resp
[1] >> 24);
519 cmd
->resp
[1] = (cmd
->resp
[1] << 8) | (cmd
->resp
[2] >> 24);
520 cmd
->resp
[2] = (cmd
->resp
[2] << 8) | (cmd
->resp
[3] >> 24);
522 } else if (cmd
->flags
& MMC_RSP_R3
) {
523 cmd
->resp
[0] = cmd
->resp
[3];
526 if (stat
& TMIO_STAT_CMDTIMEOUT
)
527 cmd
->error
= -ETIMEDOUT
;
528 else if (stat
& TMIO_STAT_CRCFAIL
&& cmd
->flags
& MMC_RSP_CRC
)
529 cmd
->error
= -EILSEQ
;
531 /* If there is data to handle we enable data IRQs here, and
532 * we will ultimatley finish the request in the data_end handler.
533 * If theres no data or we encountered an error, finish now.
535 if (host
->data
&& !cmd
->error
) {
536 if (host
->data
->flags
& MMC_DATA_READ
) {
537 if (host
->force_pio
|| !host
->chan_rx
)
538 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_READOP
);
540 tasklet_schedule(&host
->dma_issue
);
542 if (host
->force_pio
|| !host
->chan_tx
)
543 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_WRITEOP
);
545 tasklet_schedule(&host
->dma_issue
);
548 schedule_work(&host
->done
);
552 spin_unlock(&host
->lock
);
555 static void tmio_mmc_card_irq_status(struct tmio_mmc_host
*host
,
556 int *ireg
, int *status
)
558 *status
= sd_ctrl_read32(host
, CTL_STATUS
);
559 *ireg
= *status
& TMIO_MASK_IRQ
& ~host
->sdcard_irq_mask
;
561 pr_debug_status(*status
);
562 pr_debug_status(*ireg
);
565 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host
*host
,
566 int ireg
, int status
)
568 struct mmc_host
*mmc
= host
->mmc
;
570 /* Card insert / remove attempts */
571 if (ireg
& (TMIO_STAT_CARD_INSERT
| TMIO_STAT_CARD_REMOVE
)) {
572 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_CARD_INSERT
|
573 TMIO_STAT_CARD_REMOVE
);
574 if ((((ireg
& TMIO_STAT_CARD_REMOVE
) && mmc
->card
) ||
575 ((ireg
& TMIO_STAT_CARD_INSERT
) && !mmc
->card
)) &&
576 !work_pending(&mmc
->detect
.work
))
577 mmc_detect_change(host
->mmc
, msecs_to_jiffies(100));
584 irqreturn_t
tmio_mmc_card_detect_irq(int irq
, void *devid
)
586 unsigned int ireg
, status
;
587 struct tmio_mmc_host
*host
= devid
;
589 tmio_mmc_card_irq_status(host
, &ireg
, &status
);
590 __tmio_mmc_card_detect_irq(host
, ireg
, status
);
594 EXPORT_SYMBOL(tmio_mmc_card_detect_irq
);
596 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host
*host
,
597 int ireg
, int status
)
599 /* Command completion */
600 if (ireg
& (TMIO_STAT_CMDRESPEND
| TMIO_STAT_CMDTIMEOUT
)) {
601 tmio_mmc_ack_mmc_irqs(host
,
602 TMIO_STAT_CMDRESPEND
|
603 TMIO_STAT_CMDTIMEOUT
);
604 tmio_mmc_cmd_irq(host
, status
);
609 if (ireg
& (TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
)) {
610 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
);
611 tmio_mmc_pio_irq(host
);
615 /* Data transfer completion */
616 if (ireg
& TMIO_STAT_DATAEND
) {
617 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_DATAEND
);
618 tmio_mmc_data_irq(host
);
625 irqreturn_t
tmio_mmc_sdcard_irq(int irq
, void *devid
)
627 unsigned int ireg
, status
;
628 struct tmio_mmc_host
*host
= devid
;
630 tmio_mmc_card_irq_status(host
, &ireg
, &status
);
631 __tmio_mmc_sdcard_irq(host
, ireg
, status
);
635 EXPORT_SYMBOL(tmio_mmc_sdcard_irq
);
637 irqreturn_t
tmio_mmc_sdio_irq(int irq
, void *devid
)
639 struct tmio_mmc_host
*host
= devid
;
640 struct mmc_host
*mmc
= host
->mmc
;
641 struct tmio_mmc_data
*pdata
= host
->pdata
;
642 unsigned int ireg
, status
;
644 if (!(pdata
->flags
& TMIO_MMC_SDIO_IRQ
))
647 status
= sd_ctrl_read16(host
, CTL_SDIO_STATUS
);
648 ireg
= status
& TMIO_SDIO_MASK_ALL
& ~host
->sdcard_irq_mask
;
650 sd_ctrl_write16(host
, CTL_SDIO_STATUS
, status
& ~TMIO_SDIO_MASK_ALL
);
652 if (mmc
->caps
& MMC_CAP_SDIO_IRQ
&& ireg
& TMIO_SDIO_STAT_IOIRQ
)
653 mmc_signal_sdio_irq(mmc
);
657 EXPORT_SYMBOL(tmio_mmc_sdio_irq
);
659 irqreturn_t
tmio_mmc_irq(int irq
, void *devid
)
661 struct tmio_mmc_host
*host
= devid
;
662 unsigned int ireg
, status
;
664 pr_debug("MMC IRQ begin\n");
666 tmio_mmc_card_irq_status(host
, &ireg
, &status
);
667 if (__tmio_mmc_card_detect_irq(host
, ireg
, status
))
669 if (__tmio_mmc_sdcard_irq(host
, ireg
, status
))
672 tmio_mmc_sdio_irq(irq
, devid
);
676 EXPORT_SYMBOL(tmio_mmc_irq
);
678 static int tmio_mmc_start_data(struct tmio_mmc_host
*host
,
679 struct mmc_data
*data
)
681 struct tmio_mmc_data
*pdata
= host
->pdata
;
683 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
684 data
->blksz
, data
->blocks
);
686 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
687 if (host
->mmc
->ios
.bus_width
== MMC_BUS_WIDTH_4
) {
688 int blksz_2bytes
= pdata
->flags
& TMIO_MMC_BLKSZ_2BYTES
;
690 if (data
->blksz
< 2 || (data
->blksz
< 4 && !blksz_2bytes
)) {
691 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
692 mmc_hostname(host
->mmc
), data
->blksz
);
697 tmio_mmc_init_sg(host
, data
);
700 /* Set transfer length / blocksize */
701 sd_ctrl_write16(host
, CTL_SD_XFER_LEN
, data
->blksz
);
702 sd_ctrl_write16(host
, CTL_XFER_BLK_COUNT
, data
->blocks
);
704 tmio_mmc_start_dma(host
, data
);
709 /* Process requests from the MMC layer */
710 static void tmio_mmc_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
712 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
716 spin_lock_irqsave(&host
->lock
, flags
);
719 pr_debug("request not null\n");
720 if (IS_ERR(host
->mrq
)) {
721 spin_unlock_irqrestore(&host
->lock
, flags
);
722 mrq
->cmd
->error
= -EAGAIN
;
723 mmc_request_done(mmc
, mrq
);
728 host
->last_req_ts
= jiffies
;
732 spin_unlock_irqrestore(&host
->lock
, flags
);
735 ret
= tmio_mmc_start_data(host
, mrq
->data
);
740 ret
= tmio_mmc_start_command(host
, mrq
->cmd
);
742 schedule_delayed_work(&host
->delayed_reset_work
,
743 msecs_to_jiffies(2000));
748 host
->force_pio
= false;
750 mrq
->cmd
->error
= ret
;
751 mmc_request_done(mmc
, mrq
);
754 /* Set MMC clock / power.
755 * Note: This controller uses a simple divider scheme therefore it cannot
756 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
757 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
760 static void tmio_mmc_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
762 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
763 struct device
*dev
= &host
->pdev
->dev
;
766 mutex_lock(&host
->ios_lock
);
768 spin_lock_irqsave(&host
->lock
, flags
);
770 if (IS_ERR(host
->mrq
)) {
772 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
773 current
->comm
, task_pid_nr(current
),
774 ios
->clock
, ios
->power_mode
);
775 host
->mrq
= ERR_PTR(-EINTR
);
778 "%s.%d: CMD%u active since %lu, now %lu!\n",
779 current
->comm
, task_pid_nr(current
),
780 host
->mrq
->cmd
->opcode
, host
->last_req_ts
, jiffies
);
782 spin_unlock_irqrestore(&host
->lock
, flags
);
784 mutex_unlock(&host
->ios_lock
);
788 host
->mrq
= ERR_PTR(-EBUSY
);
790 spin_unlock_irqrestore(&host
->lock
, flags
);
793 * host->power toggles between false and true in both cases - either
794 * or not the controller can be runtime-suspended during inactivity.
795 * But if the controller has to be kept on, the runtime-pm usage_count
796 * is kept positive, so no suspending actually takes place.
798 if (ios
->power_mode
== MMC_POWER_ON
&& ios
->clock
) {
800 pm_runtime_get_sync(dev
);
803 tmio_mmc_set_clock(host
, ios
->clock
);
804 /* power up SD bus */
806 host
->set_pwr(host
->pdev
, 1);
807 /* start bus clock */
808 tmio_mmc_clk_start(host
);
809 } else if (ios
->power_mode
!= MMC_POWER_UP
) {
810 if (host
->set_pwr
&& ios
->power_mode
== MMC_POWER_OFF
)
811 host
->set_pwr(host
->pdev
, 0);
816 tmio_mmc_clk_stop(host
);
819 switch (ios
->bus_width
) {
820 case MMC_BUS_WIDTH_1
:
821 sd_ctrl_write16(host
, CTL_SD_MEM_CARD_OPT
, 0x80e0);
823 case MMC_BUS_WIDTH_4
:
824 sd_ctrl_write16(host
, CTL_SD_MEM_CARD_OPT
, 0x00e0);
828 /* Let things settle. delay taken from winCE driver */
830 if (PTR_ERR(host
->mrq
) == -EINTR
)
831 dev_dbg(&host
->pdev
->dev
,
832 "%s.%d: IOS interrupted: clk %u, mode %u",
833 current
->comm
, task_pid_nr(current
),
834 ios
->clock
, ios
->power_mode
);
837 mutex_unlock(&host
->ios_lock
);
840 static int tmio_mmc_get_ro(struct mmc_host
*mmc
)
842 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
843 struct tmio_mmc_data
*pdata
= host
->pdata
;
845 return !((pdata
->flags
& TMIO_MMC_WRPROTECT_DISABLE
) ||
846 (sd_ctrl_read32(host
, CTL_STATUS
) & TMIO_STAT_WRPROTECT
));
849 static int tmio_mmc_get_cd(struct mmc_host
*mmc
)
851 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
852 struct tmio_mmc_data
*pdata
= host
->pdata
;
857 return pdata
->get_cd(host
->pdev
);
860 static const struct mmc_host_ops tmio_mmc_ops
= {
861 .request
= tmio_mmc_request
,
862 .set_ios
= tmio_mmc_set_ios
,
863 .get_ro
= tmio_mmc_get_ro
,
864 .get_cd
= tmio_mmc_get_cd
,
865 .enable_sdio_irq
= tmio_mmc_enable_sdio_irq
,
868 int __devinit
tmio_mmc_host_probe(struct tmio_mmc_host
**host
,
869 struct platform_device
*pdev
,
870 struct tmio_mmc_data
*pdata
)
872 struct tmio_mmc_host
*_host
;
873 struct mmc_host
*mmc
;
874 struct resource
*res_ctl
;
876 u32 irq_mask
= TMIO_MASK_CMD
;
878 res_ctl
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
882 mmc
= mmc_alloc_host(sizeof(struct tmio_mmc_host
), &pdev
->dev
);
886 pdata
->dev
= &pdev
->dev
;
887 _host
= mmc_priv(mmc
);
888 _host
->pdata
= pdata
;
891 platform_set_drvdata(pdev
, mmc
);
893 _host
->set_pwr
= pdata
->set_pwr
;
894 _host
->set_clk_div
= pdata
->set_clk_div
;
896 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
897 _host
->bus_shift
= resource_size(res_ctl
) >> 10;
899 _host
->ctl
= ioremap(res_ctl
->start
, resource_size(res_ctl
));
905 mmc
->ops
= &tmio_mmc_ops
;
906 mmc
->caps
= MMC_CAP_4_BIT_DATA
| pdata
->capabilities
;
907 mmc
->f_max
= pdata
->hclk
;
908 mmc
->f_min
= mmc
->f_max
/ 512;
910 mmc
->max_blk_size
= 512;
911 mmc
->max_blk_count
= (PAGE_CACHE_SIZE
/ mmc
->max_blk_size
) *
913 mmc
->max_req_size
= mmc
->max_blk_size
* mmc
->max_blk_count
;
914 mmc
->max_seg_size
= mmc
->max_req_size
;
916 mmc
->ocr_avail
= pdata
->ocr_mask
;
918 mmc
->ocr_avail
= MMC_VDD_32_33
| MMC_VDD_33_34
;
920 _host
->native_hotplug
= !(pdata
->flags
& TMIO_MMC_USE_GPIO_CD
||
921 mmc
->caps
& MMC_CAP_NEEDS_POLL
||
922 mmc
->caps
& MMC_CAP_NONREMOVABLE
);
924 _host
->power
= false;
925 pm_runtime_enable(&pdev
->dev
);
926 ret
= pm_runtime_resume(&pdev
->dev
);
931 * There are 4 different scenarios for the card detection:
932 * 1) an external gpio irq handles the cd (best for power savings)
933 * 2) internal sdhi irq handles the cd
934 * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL
935 * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE
937 * While we increment the runtime PM counter for all scenarios when
938 * the mmc core activates us by calling an appropriate set_ios(), we
939 * must additionally ensure that in case 2) the tmio mmc hardware stays
940 * additionally ensure that in case 2) the tmio mmc hardware stays
941 * powered on during runtime for the card detection to work.
943 if (_host
->native_hotplug
)
944 pm_runtime_get_noresume(&pdev
->dev
);
946 tmio_mmc_clk_stop(_host
);
947 tmio_mmc_reset(_host
);
949 _host
->sdcard_irq_mask
= sd_ctrl_read32(_host
, CTL_IRQ_MASK
);
950 tmio_mmc_disable_mmc_irqs(_host
, TMIO_MASK_ALL
);
951 if (pdata
->flags
& TMIO_MMC_SDIO_IRQ
)
952 tmio_mmc_enable_sdio_irq(mmc
, 0);
954 spin_lock_init(&_host
->lock
);
955 mutex_init(&_host
->ios_lock
);
957 /* Init delayed work for request timeouts */
958 INIT_DELAYED_WORK(&_host
->delayed_reset_work
, tmio_mmc_reset_work
);
959 INIT_WORK(&_host
->done
, tmio_mmc_done_work
);
961 /* See if we also get DMA */
962 tmio_mmc_request_dma(_host
, pdata
);
966 dev_pm_qos_expose_latency_limit(&pdev
->dev
, 100);
968 /* Unmask the IRQs we want to know about */
970 irq_mask
|= TMIO_MASK_READOP
;
972 irq_mask
|= TMIO_MASK_WRITEOP
;
973 if (!_host
->native_hotplug
)
974 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
976 tmio_mmc_enable_mmc_irqs(_host
, irq_mask
);
978 if (pdata
->flags
& TMIO_MMC_USE_GPIO_CD
) {
979 ret
= mmc_cd_gpio_request(mmc
, pdata
->cd_gpio
);
981 tmio_mmc_host_remove(_host
);
991 pm_runtime_disable(&pdev
->dev
);
998 EXPORT_SYMBOL(tmio_mmc_host_probe
);
1000 void tmio_mmc_host_remove(struct tmio_mmc_host
*host
)
1002 struct platform_device
*pdev
= host
->pdev
;
1003 struct tmio_mmc_data
*pdata
= host
->pdata
;
1004 struct mmc_host
*mmc
= host
->mmc
;
1006 if (pdata
->flags
& TMIO_MMC_USE_GPIO_CD
)
1008 * This means we can miss a card-eject, but this is anyway
1009 * possible, because of delayed processing of hotplug events.
1011 mmc_cd_gpio_free(mmc
);
1013 if (!host
->native_hotplug
)
1014 pm_runtime_get_sync(&pdev
->dev
);
1016 dev_pm_qos_hide_latency_limit(&pdev
->dev
);
1018 mmc_remove_host(mmc
);
1019 cancel_work_sync(&host
->done
);
1020 cancel_delayed_work_sync(&host
->delayed_reset_work
);
1021 tmio_mmc_release_dma(host
);
1023 pm_runtime_put_sync(&pdev
->dev
);
1024 pm_runtime_disable(&pdev
->dev
);
1029 EXPORT_SYMBOL(tmio_mmc_host_remove
);
1032 int tmio_mmc_host_suspend(struct device
*dev
)
1034 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1035 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1036 int ret
= mmc_suspend_host(mmc
);
1039 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_ALL
);
1043 EXPORT_SYMBOL(tmio_mmc_host_suspend
);
1045 int tmio_mmc_host_resume(struct device
*dev
)
1047 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1048 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1050 tmio_mmc_reset(host
);
1051 tmio_mmc_enable_dma(host
, true);
1053 /* The MMC core will perform the complete set up */
1054 return mmc_resume_host(mmc
);
1056 EXPORT_SYMBOL(tmio_mmc_host_resume
);
1058 #endif /* CONFIG_PM */
1060 int tmio_mmc_host_runtime_suspend(struct device
*dev
)
1064 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend
);
1066 int tmio_mmc_host_runtime_resume(struct device
*dev
)
1068 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1069 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1071 tmio_mmc_reset(host
);
1072 tmio_mmc_enable_dma(host
, true);
1076 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume
);
1078 MODULE_LICENSE("GPL v2");