drivers/net/can/sja1000/plx_pci.c

   1 /*
   2  * Copyright (C) 2008-2010 Pavel Cheblakov <P.B.Cheblakov@inp.nsk.su>
   3  *
   4  * Derived from the ems_pci.c driver:
   5  *      Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
   6  *      Copyright (C) 2008 Markus Plessing <plessing@ems-wuensche.com>
   7  *      Copyright (C) 2008 Sebastian Haas <haas@ems-wuensche.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the version 2 of the GNU General Public License
  11  * as published by the Free Software Foundation
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  21  */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/netdevice.h>
  27 #include <linux/delay.h>
  28 #include <linux/slab.h>
  29 #include <linux/pci.h>
  30 #include <linux/can/dev.h>
  31 #include <linux/io.h>
  32
  33 #include "sja1000.h"
  34
  35 #define DRV_NAME  "sja1000_plx_pci"
  36
  37 MODULE_AUTHOR("Pavel Cheblakov <P.B.Cheblakov@inp.nsk.su>");
  38 MODULE_DESCRIPTION("Socket-CAN driver for PLX90xx PCI-bridge cards with "
  39                    "the SJA1000 chips");
  40 MODULE_SUPPORTED_DEVICE("Adlink PCI-7841/cPCI-7841, "
  41                         "Adlink PCI-7841/cPCI-7841 SE, "
  42                         "Marathon CAN-bus-PCI, "
  43                         "TEWS TECHNOLOGIES TPMC810, "
  44                         "esd CAN-PCI/CPCI/PCI104/200, "
  45                         "esd CAN-PCI/PMC/266, "
  46                         "esd CAN-PCIe/2000, "
  47                         "IXXAT PC-I 04/PCI")
  48 MODULE_LICENSE("GPL v2");
  49
  50 #define PLX_PCI_MAX_CHAN 2
  51
  52 struct plx_pci_card {
  53         int channels;                   /* detected channels count */
  54         struct net_device *net_dev[PLX_PCI_MAX_CHAN];
  55         void __iomem *conf_addr;
  56
  57         /* Pointer to device-dependent reset function */
  58         void (*reset_func)(struct pci_dev *pdev);
  59 };
  60
  61 #define PLX_PCI_CAN_CLOCK (16000000 / 2)
  62
  63 /* PLX9030/9050/9052 registers */
  64 #define PLX_INTCSR      0x4c            /* Interrupt Control/Status */
  65 #define PLX_CNTRL       0x50            /* User I/O, Direct Slave Response,
  66                                          * Serial EEPROM, and Initialization
  67                                          * Control register
  68                                          */
  69
  70 #define PLX_LINT1_EN    0x1             /* Local interrupt 1 enable */
  71 #define PLX_LINT2_EN    (1 << 3)        /* Local interrupt 2 enable */
  72 #define PLX_PCI_INT_EN  (1 << 6)        /* PCI Interrupt Enable */
  73 #define PLX_PCI_RESET   (1 << 30)       /* PCI Adapter Software Reset */
  74
  75 /* PLX9056 registers */
  76 #define PLX9056_INTCSR  0x68            /* Interrupt Control/Status */
  77 #define PLX9056_CNTRL   0x6c            /* Control / Software Reset */
  78
  79 #define PLX9056_LINTI   (1 << 11)
  80 #define PLX9056_PCI_INT_EN (1 << 8)
  81 #define PLX9056_PCI_RCR (1 << 29)       /* Read Configuration Registers */
  82
  83 /*
  84  * The board configuration is probably following:
  85  * RX1 is connected to ground.
  86  * TX1 is not connected.
  87  * CLKO is not connected.
  88  * Setting the OCR register to 0xDA is a good idea.
  89  * This means normal output mode, push-pull and the correct polarity.
  90  */
  91 #define PLX_PCI_OCR     (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)
  92
  93 /*
  94  * In the CDR register, you should set CBP to 1.
  95  * You will probably also want to set the clock divider value to 7
  96  * (meaning direct oscillator output) because the second SJA1000 chip
  97  * is driven by the first one CLKOUT output.
  98  */
  99 #define PLX_PCI_CDR                     (CDR_CBP | CDR_CLKOUT_MASK)
 100
 101 /* SJA1000 Control Register in the BasicCAN Mode */
 102 #define REG_CR                          0x00
 103
 104 /* States of some SJA1000 registers after hardware reset in the BasicCAN mode*/
 105 #define REG_CR_BASICCAN_INITIAL         0x21
 106 #define REG_CR_BASICCAN_INITIAL_MASK    0xa1
 107 #define REG_SR_BASICCAN_INITIAL         0x0c
 108 #define REG_IR_BASICCAN_INITIAL         0xe0
 109
 110 /* States of some SJA1000 registers after hardware reset in the PeliCAN mode*/
 111 #define REG_MOD_PELICAN_INITIAL         0x01
 112 #define REG_SR_PELICAN_INITIAL          0x3c
 113 #define REG_IR_PELICAN_INITIAL          0x00
 114
 115 #define ADLINK_PCI_VENDOR_ID            0x144A
 116 #define ADLINK_PCI_DEVICE_ID            0x7841
 117
 118 #define ESD_PCI_SUB_SYS_ID_PCI200       0x0004
 119 #define ESD_PCI_SUB_SYS_ID_PCI266       0x0009
 120 #define ESD_PCI_SUB_SYS_ID_PMC266       0x000e
 121 #define ESD_PCI_SUB_SYS_ID_CPCI200      0x010b
 122 #define ESD_PCI_SUB_SYS_ID_PCIE2000     0x0200
 123 #define ESD_PCI_SUB_SYS_ID_PCI104200    0x0501
 124
 125 #define IXXAT_PCI_VENDOR_ID             0x10b5
 126 #define IXXAT_PCI_DEVICE_ID             0x9050
 127 #define IXXAT_PCI_SUB_SYS_ID            0x2540
 128
 129 #define MARATHON_PCI_DEVICE_ID          0x2715
 130
 131 #define TEWS_PCI_VENDOR_ID              0x1498
 132 #define TEWS_PCI_DEVICE_ID_TMPC810      0x032A
 133
 134 static void plx_pci_reset_common(struct pci_dev *pdev);
 135 static void plx_pci_reset_marathon(struct pci_dev *pdev);
 136 static void plx9056_pci_reset_common(struct pci_dev *pdev);
 137
 138 struct plx_pci_channel_map {
 139         u32 bar;
 140         u32 offset;
 141         u32 size;               /* 0x00 - auto, e.g. length of entire bar */
 142 };
 143
 144 struct plx_pci_card_info {
 145         const char *name;
 146         int channel_count;
 147         u32 can_clock;
 148         u8 ocr;                 /* output control register */
 149         u8 cdr;                 /* clock divider register */
 150
 151         /* Parameters for mapping local configuration space */
 152         struct plx_pci_channel_map conf_map;
 153
 154         /* Parameters for mapping the SJA1000 chips */
 155         struct plx_pci_channel_map chan_map_tbl[PLX_PCI_MAX_CHAN];
 156
 157         /* Pointer to device-dependent reset function */
 158         void (*reset_func)(struct pci_dev *pdev);
 159 };
 160
 161 static struct plx_pci_card_info plx_pci_card_info_adlink __devinitdata = {
 162         "Adlink PCI-7841/cPCI-7841", 2,
 163         PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,
 164         {1, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x80, 0x80} },
 165         &plx_pci_reset_common
 166         /* based on PLX9052 */
 167 };
 168
 169 static struct plx_pci_card_info plx_pci_card_info_adlink_se __devinitdata = {
 170         "Adlink PCI-7841/cPCI-7841 SE", 2,
 171         PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,
 172         {0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x80, 0x80} },
 173         &plx_pci_reset_common
 174         /* based on PLX9052 */
 175 };
 176
 177 static struct plx_pci_card_info plx_pci_card_info_esd200 __devinitdata = {
 178         "esd CAN-PCI/CPCI/PCI104/200", 2,
 179         PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,
 180         {0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x100, 0x80} },
 181         &plx_pci_reset_common
 182         /* based on PLX9030/9050 */
 183 };
 184
 185 static struct plx_pci_card_info plx_pci_card_info_esd266 __devinitdata = {
 186         "esd CAN-PCI/PMC/266", 2,
 187         PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,
 188         {0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x100, 0x80} },
 189         &plx9056_pci_reset_common
 190         /* based on PLX9056 */
 191 };
 192
 193 static struct plx_pci_card_info plx_pci_card_info_esd2000 __devinitdata = {
 194         "esd CAN-PCIe/2000", 2,
 195         PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,
 196         {0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x100, 0x80} },
 197         &plx9056_pci_reset_common
 198         /* based on PEX8311 */
 199 };
 200
 201 static struct plx_pci_card_info plx_pci_card_info_ixxat __devinitdata = {
 202         "IXXAT PC-I 04/PCI", 2,
 203         PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,
 204         {0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x200, 0x80} },
 205         &plx_pci_reset_common
 206         /* based on PLX9050 */
 207 };
 208
 209 static struct plx_pci_card_info plx_pci_card_info_marathon __devinitdata = {
 210         "Marathon CAN-bus-PCI", 2,
 211         PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,
 212         {0, 0x00, 0x00}, { {2, 0x00, 0x00}, {4, 0x00, 0x00} },
 213         &plx_pci_reset_marathon
 214         /* based on PLX9052 */
 215 };
 216
 217 static struct plx_pci_card_info plx_pci_card_info_tews __devinitdata = {
 218         "TEWS TECHNOLOGIES TPMC810", 2,
 219         PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,
 220         {0, 0x00, 0x00}, { {2, 0x000, 0x80}, {2, 0x100, 0x80} },
 221         &plx_pci_reset_common
 222         /* based on PLX9030 */
 223 };
 224
 225 static DEFINE_PCI_DEVICE_TABLE(plx_pci_tbl) = {
 226         {
 227                 /* Adlink PCI-7841/cPCI-7841 */
 228                 ADLINK_PCI_VENDOR_ID, ADLINK_PCI_DEVICE_ID,
 229                 PCI_ANY_ID, PCI_ANY_ID,
 230                 PCI_CLASS_NETWORK_OTHER << 8, ~0,
 231                 (kernel_ulong_t)&plx_pci_card_info_adlink
 232         },
 233         {
 234                 /* Adlink PCI-7841/cPCI-7841 SE */
 235                 ADLINK_PCI_VENDOR_ID, ADLINK_PCI_DEVICE_ID,
 236                 PCI_ANY_ID, PCI_ANY_ID,
 237                 PCI_CLASS_COMMUNICATION_OTHER << 8, ~0,
 238                 (kernel_ulong_t)&plx_pci_card_info_adlink_se
 239         },
 240         {
 241                 /* esd CAN-PCI/200 */
 242                 PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
 243                 PCI_VENDOR_ID_ESDGMBH, ESD_PCI_SUB_SYS_ID_PCI200,
 244                 0, 0,
 245                 (kernel_ulong_t)&plx_pci_card_info_esd200
 246         },
 247         {
 248                 /* esd CAN-CPCI/200 */
 249                 PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030,
 250                 PCI_VENDOR_ID_ESDGMBH, ESD_PCI_SUB_SYS_ID_CPCI200,
 251                 0, 0,
 252                 (kernel_ulong_t)&plx_pci_card_info_esd200
 253         },
 254         {
 255                 /* esd CAN-PCI104/200 */
 256                 PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030,
 257                 PCI_VENDOR_ID_ESDGMBH, ESD_PCI_SUB_SYS_ID_PCI104200,
 258                 0, 0,
 259                 (kernel_ulong_t)&plx_pci_card_info_esd200
 260         },
 261         {
 262                 /* esd CAN-PCI/266 */
 263                 PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9056,
 264                 PCI_VENDOR_ID_ESDGMBH, ESD_PCI_SUB_SYS_ID_PCI266,
 265                 0, 0,
 266                 (kernel_ulong_t)&plx_pci_card_info_esd266
 267         },
 268         {
 269                 /* esd CAN-PMC/266 */
 270                 PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9056,
 271                 PCI_VENDOR_ID_ESDGMBH, ESD_PCI_SUB_SYS_ID_PMC266,
 272                 0, 0,
 273                 (kernel_ulong_t)&plx_pci_card_info_esd266
 274         },
 275         {
 276                 /* esd CAN-PCIE/2000 */
 277                 PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9056,
 278                 PCI_VENDOR_ID_ESDGMBH, ESD_PCI_SUB_SYS_ID_PCIE2000,
 279                 0, 0,
 280                 (kernel_ulong_t)&plx_pci_card_info_esd2000
 281         },
 282         {
 283                 /* IXXAT PC-I 04/PCI card */
 284                 IXXAT_PCI_VENDOR_ID, IXXAT_PCI_DEVICE_ID,
 285                 PCI_ANY_ID, IXXAT_PCI_SUB_SYS_ID,
 286                 0, 0,
 287                 (kernel_ulong_t)&plx_pci_card_info_ixxat
 288         },
 289         {
 290                 /* Marathon CAN-bus-PCI card */
 291                 PCI_VENDOR_ID_PLX, MARATHON_PCI_DEVICE_ID,
 292                 PCI_ANY_ID, PCI_ANY_ID,
 293                 0, 0,
 294                 (kernel_ulong_t)&plx_pci_card_info_marathon
 295         },
 296         {
 297                 /* TEWS TECHNOLOGIES TPMC810 card */
 298                 TEWS_PCI_VENDOR_ID, TEWS_PCI_DEVICE_ID_TMPC810,
 299                 PCI_ANY_ID, PCI_ANY_ID,
 300                 0, 0,
 301                 (kernel_ulong_t)&plx_pci_card_info_tews
 302         },
 303         { 0,}
 304 };
 305 MODULE_DEVICE_TABLE(pci, plx_pci_tbl);
 306
 307 static u8 plx_pci_read_reg(const struct sja1000_priv *priv, int port)
 308 {
 309         return ioread8(priv->reg_base + port);
 310 }
 311
 312 static void plx_pci_write_reg(const struct sja1000_priv *priv, int port, u8 val)
 313 {
 314         iowrite8(val, priv->reg_base + port);
 315 }
 316
 317 /*
 318  * Check if a CAN controller is present at the specified location
 319  * by trying to switch 'em from the Basic mode into the PeliCAN mode.
 320  * Also check states of some registers in reset mode.
 321  */
 322 static inline int plx_pci_check_sja1000(const struct sja1000_priv *priv)
 323 {
 324         int flag = 0;
 325
 326         /*
 327          * Check registers after hardware reset (the Basic mode)
 328          * See states on p. 10 of the Datasheet.
 329          */
 330         if ((priv->read_reg(priv, REG_CR) & REG_CR_BASICCAN_INITIAL_MASK) ==
 331             REG_CR_BASICCAN_INITIAL &&
 332             (priv->read_reg(priv, SJA1000_REG_SR) == REG_SR_BASICCAN_INITIAL) &&
 333             (priv->read_reg(priv, REG_IR) == REG_IR_BASICCAN_INITIAL))
 334                 flag = 1;
 335
 336         /* Bring the SJA1000 into the PeliCAN mode*/
 337         priv->write_reg(priv, REG_CDR, CDR_PELICAN);
 338
 339         /*
 340          * Check registers after reset in the PeliCAN mode.
 341          * See states on p. 23 of the Datasheet.
 342          */
 343         if (priv->read_reg(priv, REG_MOD) == REG_MOD_PELICAN_INITIAL &&
 344             priv->read_reg(priv, SJA1000_REG_SR) == REG_SR_PELICAN_INITIAL &&
 345             priv->read_reg(priv, REG_IR) == REG_IR_PELICAN_INITIAL)
 346                 return flag;
 347
 348         return 0;
 349 }
 350
 351 /*
 352  * PLX9030/50/52 software reset
 353  * Also LRESET# asserts and brings to reset device on the Local Bus (if wired).
 354  * For most cards it's enough for reset the SJA1000 chips.
 355  */
 356 static void plx_pci_reset_common(struct pci_dev *pdev)
 357 {
 358         struct plx_pci_card *card = pci_get_drvdata(pdev);
 359         u32 cntrl;
 360
 361         cntrl = ioread32(card->conf_addr + PLX_CNTRL);
 362         cntrl |= PLX_PCI_RESET;
 363         iowrite32(cntrl, card->conf_addr + PLX_CNTRL);
 364         udelay(100);
 365         cntrl ^= PLX_PCI_RESET;
 366         iowrite32(cntrl, card->conf_addr + PLX_CNTRL);
 367 };
 368
 369 /*
 370  * PLX9056 software reset
 371  * Assert LRESET# and reset device(s) on the Local Bus (if wired).
 372  */
 373 static void plx9056_pci_reset_common(struct pci_dev *pdev)
 374 {
 375         struct plx_pci_card *card = pci_get_drvdata(pdev);
 376         u32 cntrl;
 377
 378         /* issue a local bus reset */
 379         cntrl = ioread32(card->conf_addr + PLX9056_CNTRL);
 380         cntrl |= PLX_PCI_RESET;
 381         iowrite32(cntrl, card->conf_addr + PLX9056_CNTRL);
 382         udelay(100);
 383         cntrl ^= PLX_PCI_RESET;
 384         iowrite32(cntrl, card->conf_addr + PLX9056_CNTRL);
 385
 386         /* reload local configuration from EEPROM */
 387         cntrl |= PLX9056_PCI_RCR;
 388         iowrite32(cntrl, card->conf_addr + PLX9056_CNTRL);
 389
 390         /*
 391          * There is no safe way to poll for the end
 392          * of reconfiguration process. Waiting for 10ms
 393          * is safe.
 394          */
 395         mdelay(10);
 396
 397         cntrl ^= PLX9056_PCI_RCR;
 398         iowrite32(cntrl, card->conf_addr + PLX9056_CNTRL);
 399 };
 400
 401 /* Special reset function for Marathon card */
 402 static void plx_pci_reset_marathon(struct pci_dev *pdev)
 403 {
 404         void __iomem *reset_addr;
 405         int i;
 406         static const int reset_bar[2] = {3, 5};
 407
 408         plx_pci_reset_common(pdev);
 409
 410         for (i = 0; i < 2; i++) {
 411                 reset_addr = pci_iomap(pdev, reset_bar[i], 0);
 412                 if (!reset_addr) {
 413                         dev_err(&pdev->dev, "Failed to remap reset "
 414                                 "space %d (BAR%d)\n", i, reset_bar[i]);
 415                 } else {
 416                         /* reset the SJA1000 chip */
 417                         iowrite8(0x1, reset_addr);
 418                         udelay(100);
 419                         pci_iounmap(pdev, reset_addr);
 420                 }
 421         }
 422 }
 423
 424 static void plx_pci_del_card(struct pci_dev *pdev)
 425 {
 426         struct plx_pci_card *card = pci_get_drvdata(pdev);
 427         struct net_device *dev;
 428         struct sja1000_priv *priv;
 429         int i = 0;
 430
 431         for (i = 0; i < PLX_PCI_MAX_CHAN; i++) {
 432                 dev = card->net_dev[i];
 433                 if (!dev)
 434                         continue;
 435
 436                 dev_info(&pdev->dev, "Removing %s\n", dev->name);
 437                 unregister_sja1000dev(dev);
 438                 priv = netdev_priv(dev);
 439                 if (priv->reg_base)
 440                         pci_iounmap(pdev, priv->reg_base);
 441                 free_sja1000dev(dev);
 442         }
 443
 444         card->reset_func(pdev);
 445
 446         /*
 447          * Disable interrupts from PCI-card and disable local
 448          * interrupts
 449          */
 450         if (pdev->device != PCI_DEVICE_ID_PLX_9056)
 451                 iowrite32(0x0, card->conf_addr + PLX_INTCSR);
 452         else
 453                 iowrite32(0x0, card->conf_addr + PLX9056_INTCSR);
 454
 455         if (card->conf_addr)
 456                 pci_iounmap(pdev, card->conf_addr);
 457
 458         kfree(card);
 459
 460         pci_disable_device(pdev);
 461         pci_set_drvdata(pdev, NULL);
 462 }
 463
 464 /*
 465  * Probe PLX90xx based device for the SJA1000 chips and register each
 466  * available CAN channel to SJA1000 Socket-CAN subsystem.
 467  */
 468 static int __devinit plx_pci_add_card(struct pci_dev *pdev,
 469                                       const struct pci_device_id *ent)
 470 {
 471         struct sja1000_priv *priv;
 472         struct net_device *dev;
 473         struct plx_pci_card *card;
 474         struct plx_pci_card_info *ci;
 475         int err, i;
 476         u32 val;
 477         void __iomem *addr;
 478
 479         ci = (struct plx_pci_card_info *)ent->driver_data;
 480
 481         if (pci_enable_device(pdev) < 0) {
 482                 dev_err(&pdev->dev, "Failed to enable PCI device\n");
 483                 return -ENODEV;
 484         }
 485
 486         dev_info(&pdev->dev, "Detected \"%s\" card at slot #%i\n",
 487                  ci->name, PCI_SLOT(pdev->devfn));
 488
 489         /* Allocate card structures to hold addresses, ... */
 490         card = kzalloc(sizeof(*card), GFP_KERNEL);
 491         if (!card) {
 492                 dev_err(&pdev->dev, "Unable to allocate memory\n");
 493                 pci_disable_device(pdev);
 494                 return -ENOMEM;
 495         }
 496
 497         pci_set_drvdata(pdev, card);
 498
 499         card->channels = 0;
 500
 501         /* Remap PLX90xx configuration space */
 502         addr = pci_iomap(pdev, ci->conf_map.bar, ci->conf_map.size);
 503         if (!addr) {
 504                 err = -ENOMEM;
 505                 dev_err(&pdev->dev, "Failed to remap configuration space "
 506                         "(BAR%d)\n", ci->conf_map.bar);
 507                 goto failure_cleanup;
 508         }
 509         card->conf_addr = addr + ci->conf_map.offset;
 510
 511         ci->reset_func(pdev);
 512         card->reset_func = ci->reset_func;
 513
 514         /* Detect available channels */
 515         for (i = 0; i < ci->channel_count; i++) {
 516                 struct plx_pci_channel_map *cm = &ci->chan_map_tbl[i];
 517
 518                 dev = alloc_sja1000dev(0);
 519                 if (!dev) {
 520                         err = -ENOMEM;
 521                         goto failure_cleanup;
 522                 }
 523
 524                 card->net_dev[i] = dev;
 525                 priv = netdev_priv(dev);
 526                 priv->priv = card;
 527                 priv->irq_flags = IRQF_SHARED;
 528
 529                 dev->irq = pdev->irq;
 530
 531                 /*
 532                  * Remap IO space of the SJA1000 chips
 533                  * This is device-dependent mapping
 534                  */
 535                 addr = pci_iomap(pdev, cm->bar, cm->size);
 536                 if (!addr) {
 537                         err = -ENOMEM;
 538                         dev_err(&pdev->dev, "Failed to remap BAR%d\n", cm->bar);
 539                         goto failure_cleanup;
 540                 }
 541
 542                 priv->reg_base = addr + cm->offset;
 543                 priv->read_reg = plx_pci_read_reg;
 544                 priv->write_reg = plx_pci_write_reg;
 545
 546                 /* Check if channel is present */
 547                 if (plx_pci_check_sja1000(priv)) {
 548                         priv->can.clock.freq = ci->can_clock;
 549                         priv->ocr = ci->ocr;
 550                         priv->cdr = ci->cdr;
 551
 552                         SET_NETDEV_DEV(dev, &pdev->dev);
 553
 554                         /* Register SJA1000 device */
 555                         err = register_sja1000dev(dev);
 556                         if (err) {
 557                                 dev_err(&pdev->dev, "Registering device failed "
 558                                         "(err=%d)\n", err);
 559                                 goto failure_cleanup;
 560                         }
 561
 562                         card->channels++;
 563
 564                         dev_info(&pdev->dev, "Channel #%d at 0x%p, irq %d "
 565                                  "registered as %s\n", i + 1, priv->reg_base,
 566                                  dev->irq, dev->name);
 567                 } else {
 568                         dev_err(&pdev->dev, "Channel #%d not detected\n",
 569                                 i + 1);
 570                         free_sja1000dev(dev);
 571                         card->net_dev[i] = NULL;
 572                 }
 573         }
 574
 575         if (!card->channels) {
 576                 err = -ENODEV;
 577                 goto failure_cleanup;
 578         }
 579
 580         /*
 581          * Enable interrupts from PCI-card (PLX90xx) and enable Local_1,
 582          * Local_2 interrupts from the SJA1000 chips
 583          */
 584         if (pdev->device != PCI_DEVICE_ID_PLX_9056) {
 585                 val = ioread32(card->conf_addr + PLX_INTCSR);
 586                 if (pdev->subsystem_vendor == PCI_VENDOR_ID_ESDGMBH)
 587                         val |= PLX_LINT1_EN | PLX_PCI_INT_EN;
 588                 else
 589                         val |= PLX_LINT1_EN | PLX_LINT2_EN | PLX_PCI_INT_EN;
 590                 iowrite32(val, card->conf_addr + PLX_INTCSR);
 591         } else {
 592                 iowrite32(PLX9056_LINTI | PLX9056_PCI_INT_EN,
 593                           card->conf_addr + PLX9056_INTCSR);
 594         }
 595         return 0;
 596
 597 failure_cleanup:
 598         dev_err(&pdev->dev, "Error: %d. Cleaning Up.\n", err);
 599
 600         plx_pci_del_card(pdev);
 601
 602         return err;
 603 }
 604
 605 static struct pci_driver plx_pci_driver = {
 606         .name = DRV_NAME,
 607         .id_table = plx_pci_tbl,
 608         .probe = plx_pci_add_card,
 609         .remove = plx_pci_del_card,
 610 };
 611
 612 static int __init plx_pci_init(void)
 613 {
 614         return pci_register_driver(&plx_pci_driver);
 615 }
 616
 617 static void __exit plx_pci_exit(void)
 618 {
 619         pci_unregister_driver(&plx_pci_driver);
 620 }
 621
 622 module_init(plx_pci_init);
 623 module_exit(plx_pci_exit);