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Linux 3.4.102
[linux/fpc-iii.git] / drivers / net / ethernet / amd / am79c961a.c
blobe10ffad525a788e06bae64c8581f47280be9c4fc
1 /*
2 * linux/drivers/net/ethernet/amd/am79c961a.c
3 *
4 * by Russell King <rmk@arm.linux.org.uk> 1995-2001.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Derived from various things including skeleton.c
11 *
12 * This is a special driver for the am79c961A Lance chip used in the
13 * Intel (formally Digital Equipment Corp) EBSA110 platform. Please
14 * note that this can not be built as a module (it doesn't make sense).
15 */
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/interrupt.h>
19 #include <linux/ioport.h>
20 #include <linux/slab.h>
21 #include <linux/string.h>
22 #include <linux/errno.h>
23 #include <linux/netdevice.h>
24 #include <linux/etherdevice.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/crc32.h>
28 #include <linux/bitops.h>
29 #include <linux/platform_device.h>
30 #include <linux/io.h>
31
32 #include <mach/hardware.h>
33
34 #define TX_BUFFERS 15
35 #define RX_BUFFERS 25
36
37 #include "am79c961a.h"
38
39 static irqreturn_t
40 am79c961_interrupt (int irq, void *dev_id);
41
42 static unsigned int net_debug = NET_DEBUG;
43
44 static const char version[] =
45 "am79c961 ethernet driver (C) 1995-2001 Russell King v0.04\n";
46
47 /* --------------------------------------------------------------------------- */
48
49 #ifdef __arm__
50 static void write_rreg(u_long base, u_int reg, u_int val)
51 {
52 asm volatile(
53 "str%?h %1, [%2] @ NET_RAP\n\t"
54 "str%?h %0, [%2, #-4] @ NET_RDP"
55 :
56 : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
57 }
58
59 static inline unsigned short read_rreg(u_long base_addr, u_int reg)
60 {
61 unsigned short v;
62 asm volatile(
63 "str%?h %1, [%2] @ NET_RAP\n\t"
64 "ldr%?h %0, [%2, #-4] @ NET_RDP"
65 : "=r" (v)
66 : "r" (reg), "r" (ISAIO_BASE + 0x0464));
67 return v;
68 }
69
70 static inline void write_ireg(u_long base, u_int reg, u_int val)
71 {
72 asm volatile(
73 "str%?h %1, [%2] @ NET_RAP\n\t"
74 "str%?h %0, [%2, #8] @ NET_IDP"
75 :
76 : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
77 }
78
79 static inline unsigned short read_ireg(u_long base_addr, u_int reg)
80 {
81 u_short v;
82 asm volatile(
83 "str%?h %1, [%2] @ NAT_RAP\n\t"
84 "ldr%?h %0, [%2, #8] @ NET_IDP\n\t"
85 : "=r" (v)
86 : "r" (reg), "r" (ISAIO_BASE + 0x0464));
87 return v;
88 }
89
90 #define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) << 1))
91 #define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1))
92
93 static void
94 am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
95 {
96 offset = ISAMEM_BASE + (offset << 1);
97 length = (length + 1) & ~1;
98 if ((int)buf & 2) {
99 asm volatile("str%?h %2, [%0], #4"
100 : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
101 buf += 2;
102 length -= 2;
103 }
104 while (length > 8) {
105 register unsigned int tmp asm("r2"), tmp2 asm("r3");
106 asm volatile(
107 "ldm%?ia %0!, {%1, %2}"
108 : "+r" (buf), "=&r" (tmp), "=&r" (tmp2));
109 length -= 8;
110 asm volatile(
111 "str%?h %1, [%0], #4\n\t"
112 "mov%? %1, %1, lsr #16\n\t"
113 "str%?h %1, [%0], #4\n\t"
114 "str%?h %2, [%0], #4\n\t"
115 "mov%? %2, %2, lsr #16\n\t"
116 "str%?h %2, [%0], #4"
117 : "+r" (offset), "=&r" (tmp), "=&r" (tmp2));
118 }
119 while (length > 0) {
120 asm volatile("str%?h %2, [%0], #4"
121 : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
122 buf += 2;
123 length -= 2;
124 }
125 }
126
127 static void
128 am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
129 {
130 offset = ISAMEM_BASE + (offset << 1);
131 length = (length + 1) & ~1;
132 if ((int)buf & 2) {
133 unsigned int tmp;
134 asm volatile(
135 "ldr%?h %2, [%0], #4\n\t"
136 "str%?b %2, [%1], #1\n\t"
137 "mov%? %2, %2, lsr #8\n\t"
138 "str%?b %2, [%1], #1"
139 : "=&r" (offset), "=&r" (buf), "=r" (tmp): "0" (offset), "1" (buf));
140 length -= 2;
141 }
142 while (length > 8) {
143 register unsigned int tmp asm("r2"), tmp2 asm("r3"), tmp3;
144 asm volatile(
145 "ldr%?h %2, [%0], #4\n\t"
146 "ldr%?h %4, [%0], #4\n\t"
147 "ldr%?h %3, [%0], #4\n\t"
148 "orr%? %2, %2, %4, lsl #16\n\t"
149 "ldr%?h %4, [%0], #4\n\t"
150 "orr%? %3, %3, %4, lsl #16\n\t"
151 "stm%?ia %1!, {%2, %3}"
152 : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3)
153 : "0" (offset), "1" (buf));
154 length -= 8;
155 }
156 while (length > 0) {
157 unsigned int tmp;
158 asm volatile(
159 "ldr%?h %2, [%0], #4\n\t"
160 "str%?b %2, [%1], #1\n\t"
161 "mov%? %2, %2, lsr #8\n\t"
162 "str%?b %2, [%1], #1"
163 : "=&r" (offset), "=&r" (buf), "=r" (tmp) : "0" (offset), "1" (buf));
164 length -= 2;
165 }
166 }
167 #else
168 #error Not compatible
169 #endif
170
171 static int
172 am79c961_ramtest(struct net_device *dev, unsigned int val)
173 {
174 unsigned char *buffer = kmalloc (65536, GFP_KERNEL);
175 int i, error = 0, errorcount = 0;
176
177 if (!buffer)
178 return 0;
179 memset (buffer, val, 65536);
180 am_writebuffer(dev, 0, buffer, 65536);
181 memset (buffer, val ^ 255, 65536);
182 am_readbuffer(dev, 0, buffer, 65536);
183 for (i = 0; i < 65536; i++) {
184 if (buffer[i] != val && !error) {
185 printk ("%s: buffer error (%02X %02X) %05X - ", dev->name, val, buffer[i], i);
186 error = 1;
187 errorcount ++;
188 } else if (error && buffer[i] == val) {
189 printk ("%05X\n", i);
190 error = 0;
191 }
192 }
193 if (error)
194 printk ("10000\n");
195 kfree (buffer);
196 return errorcount;
197 }
198
199 static void am79c961_mc_hash(char *addr, u16 *hash)
200 {
201 int idx, bit;
202 u32 crc;
203
204 crc = ether_crc_le(ETH_ALEN, addr);
205
206 idx = crc >> 30;
207 bit = (crc >> 26) & 15;
208
209 hash[idx] |= 1 << bit;
210 }
211
212 static unsigned int am79c961_get_rx_mode(struct net_device *dev, u16 *hash)
213 {
214 unsigned int mode = MODE_PORT_10BT;
215
216 if (dev->flags & IFF_PROMISC) {
217 mode |= MODE_PROMISC;
218 memset(hash, 0xff, 4 * sizeof(*hash));
219 } else if (dev->flags & IFF_ALLMULTI) {
220 memset(hash, 0xff, 4 * sizeof(*hash));
221 } else {
222 struct netdev_hw_addr *ha;
223
224 memset(hash, 0, 4 * sizeof(*hash));
225
226 netdev_for_each_mc_addr(ha, dev)
227 am79c961_mc_hash(ha->addr, hash);
228 }
229
230 return mode;
231 }
232
233 static void
234 am79c961_init_for_open(struct net_device *dev)
235 {
236 struct dev_priv *priv = netdev_priv(dev);
237 unsigned long flags;
238 unsigned char *p;
239 u_int hdr_addr, first_free_addr;
240 u16 multi_hash[4], mode = am79c961_get_rx_mode(dev, multi_hash);
241 int i;
242
243 /*
244 * Stop the chip.
245 */
246 spin_lock_irqsave(&priv->chip_lock, flags);
247 write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);
248 spin_unlock_irqrestore(&priv->chip_lock, flags);
249
250 write_ireg (dev->base_addr, 5, 0x00a0); /* Receive address LED */
251 write_ireg (dev->base_addr, 6, 0x0081); /* Collision LED */
252 write_ireg (dev->base_addr, 7, 0x0090); /* XMIT LED */
253 write_ireg (dev->base_addr, 2, 0x0000); /* MODE register selects media */
254
255 for (i = LADRL; i <= LADRH; i++)
256 write_rreg (dev->base_addr, i, multi_hash[i - LADRL]);
257
258 for (i = PADRL, p = dev->dev_addr; i <= PADRH; i++, p += 2)
259 write_rreg (dev->base_addr, i, p[0] | (p[1] << 8));
260
261 write_rreg (dev->base_addr, MODE, mode);
262 write_rreg (dev->base_addr, POLLINT, 0);
263 write_rreg (dev->base_addr, SIZERXR, -RX_BUFFERS);
264 write_rreg (dev->base_addr, SIZETXR, -TX_BUFFERS);
265
266 first_free_addr = RX_BUFFERS * 8 + TX_BUFFERS * 8 + 16;
267 hdr_addr = 0;
268
269 priv->rxhead = 0;
270 priv->rxtail = 0;
271 priv->rxhdr = hdr_addr;
272
273 for (i = 0; i < RX_BUFFERS; i++) {
274 priv->rxbuffer[i] = first_free_addr;
275 am_writeword (dev, hdr_addr, first_free_addr);
276 am_writeword (dev, hdr_addr + 2, RMD_OWN);
277 am_writeword (dev, hdr_addr + 4, (-1600));
278 am_writeword (dev, hdr_addr + 6, 0);
279 first_free_addr += 1600;
280 hdr_addr += 8;
281 }
282 priv->txhead = 0;
283 priv->txtail = 0;
284 priv->txhdr = hdr_addr;
285 for (i = 0; i < TX_BUFFERS; i++) {
286 priv->txbuffer[i] = first_free_addr;
287 am_writeword (dev, hdr_addr, first_free_addr);
288 am_writeword (dev, hdr_addr + 2, TMD_STP|TMD_ENP);
289 am_writeword (dev, hdr_addr + 4, 0xf000);
290 am_writeword (dev, hdr_addr + 6, 0);
291 first_free_addr += 1600;
292 hdr_addr += 8;
293 }
294
295 write_rreg (dev->base_addr, BASERXL, priv->rxhdr);
296 write_rreg (dev->base_addr, BASERXH, 0);
297 write_rreg (dev->base_addr, BASETXL, priv->txhdr);
298 write_rreg (dev->base_addr, BASERXH, 0);
299 write_rreg (dev->base_addr, CSR0, CSR0_STOP);
300 write_rreg (dev->base_addr, CSR3, CSR3_IDONM|CSR3_BABLM|CSR3_DXSUFLO);
301 write_rreg (dev->base_addr, CSR4, CSR4_APAD_XMIT|CSR4_MFCOM|CSR4_RCVCCOM|CSR4_TXSTRTM|CSR4_JABM);
302 write_rreg (dev->base_addr, CSR0, CSR0_IENA|CSR0_STRT);
303 }
304
305 static void am79c961_timer(unsigned long data)
306 {
307 struct net_device *dev = (struct net_device *)data;
308 struct dev_priv *priv = netdev_priv(dev);
309 unsigned int lnkstat, carrier;
310 unsigned long flags;
311
312 spin_lock_irqsave(&priv->chip_lock, flags);
313 lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST;
314 spin_unlock_irqrestore(&priv->chip_lock, flags);
315 carrier = netif_carrier_ok(dev);
316
317 if (lnkstat && !carrier) {
318 netif_carrier_on(dev);
319 printk("%s: link up\n", dev->name);
320 } else if (!lnkstat && carrier) {
321 netif_carrier_off(dev);
322 printk("%s: link down\n", dev->name);
323 }
324
325 mod_timer(&priv->timer, jiffies + msecs_to_jiffies(500));
326 }
327
328 /*
329 * Open/initialize the board.
330 */
331 static int
332 am79c961_open(struct net_device *dev)
333 {
334 struct dev_priv *priv = netdev_priv(dev);
335 int ret;
336
337 ret = request_irq(dev->irq, am79c961_interrupt, 0, dev->name, dev);
338 if (ret)
339 return ret;
340
341 am79c961_init_for_open(dev);
342
343 netif_carrier_off(dev);
344
345 priv->timer.expires = jiffies;
346 add_timer(&priv->timer);
347
348 netif_start_queue(dev);
349
350 return 0;
351 }
352
353 /*
354 * The inverse routine to am79c961_open().
355 */
356 static int
357 am79c961_close(struct net_device *dev)
358 {
359 struct dev_priv *priv = netdev_priv(dev);
360 unsigned long flags;
361
362 del_timer_sync(&priv->timer);
363
364 netif_stop_queue(dev);
365 netif_carrier_off(dev);
366
367 spin_lock_irqsave(&priv->chip_lock, flags);
368 write_rreg (dev->base_addr, CSR0, CSR0_STOP);
369 write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
370 spin_unlock_irqrestore(&priv->chip_lock, flags);
371
372 free_irq (dev->irq, dev);
373
374 return 0;
375 }
376
377 /*
378 * Set or clear promiscuous/multicast mode filter for this adapter.
379 */
380 static void am79c961_setmulticastlist (struct net_device *dev)
381 {
382 struct dev_priv *priv = netdev_priv(dev);
383 unsigned long flags;
384 u16 multi_hash[4], mode = am79c961_get_rx_mode(dev, multi_hash);
385 int i, stopped;
386
387 spin_lock_irqsave(&priv->chip_lock, flags);
388
389 stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP;
390
391 if (!stopped) {
392 /*
393 * Put the chip into suspend mode
394 */
395 write_rreg(dev->base_addr, CTRL1, CTRL1_SPND);
396
397 /*
398 * Spin waiting for chip to report suspend mode
399 */
400 while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) {
401 spin_unlock_irqrestore(&priv->chip_lock, flags);
402 nop();
403 spin_lock_irqsave(&priv->chip_lock, flags);
404 }
405 }
406
407 /*
408 * Update the multicast hash table
409 */
410 for (i = 0; i < ARRAY_SIZE(multi_hash); i++)
411 write_rreg(dev->base_addr, i + LADRL, multi_hash[i]);
412
413 /*
414 * Write the mode register
415 */
416 write_rreg(dev->base_addr, MODE, mode);
417
418 if (!stopped) {
419 /*
420 * Put the chip back into running mode
421 */
422 write_rreg(dev->base_addr, CTRL1, 0);
423 }
424
425 spin_unlock_irqrestore(&priv->chip_lock, flags);
426 }
427
428 static void am79c961_timeout(struct net_device *dev)
429 {
430 printk(KERN_WARNING "%s: transmit timed out, network cable problem?\n",
431 dev->name);
432
433 /*
434 * ought to do some setup of the tx side here
435 */
436
437 netif_wake_queue(dev);
438 }
439
440 /*
441 * Transmit a packet
442 */
443 static int
444 am79c961_sendpacket(struct sk_buff *skb, struct net_device *dev)
445 {
446 struct dev_priv *priv = netdev_priv(dev);
447 unsigned int hdraddr, bufaddr;
448 unsigned int head;
449 unsigned long flags;
450
451 head = priv->txhead;
452 hdraddr = priv->txhdr + (head << 3);
453 bufaddr = priv->txbuffer[head];
454 head += 1;
455 if (head >= TX_BUFFERS)
456 head = 0;
457
458 am_writebuffer (dev, bufaddr, skb->data, skb->len);
459 am_writeword (dev, hdraddr + 4, -skb->len);
460 am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP);
461 priv->txhead = head;
462
463 spin_lock_irqsave(&priv->chip_lock, flags);
464 write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA);
465 spin_unlock_irqrestore(&priv->chip_lock, flags);
466
467 /*
468 * If the next packet is owned by the ethernet device,
469 * then the tx ring is full and we can't add another
470 * packet.
471 */
472 if (am_readword(dev, priv->txhdr + (priv->txhead << 3) + 2) & TMD_OWN)
473 netif_stop_queue(dev);
474
475 dev_kfree_skb(skb);
476
477 return NETDEV_TX_OK;
478 }
479
480 /*
481 * If we have a good packet(s), get it/them out of the buffers.
482 */
483 static void
484 am79c961_rx(struct net_device *dev, struct dev_priv *priv)
485 {
486 do {
487 struct sk_buff *skb;
488 u_int hdraddr;
489 u_int pktaddr;
490 u_int status;
491 int len;
492
493 hdraddr = priv->rxhdr + (priv->rxtail << 3);
494 pktaddr = priv->rxbuffer[priv->rxtail];
495
496 status = am_readword (dev, hdraddr + 2);
497 if (status & RMD_OWN) /* do we own it? */
498 break;
499
500 priv->rxtail ++;
501 if (priv->rxtail >= RX_BUFFERS)
502 priv->rxtail = 0;
503
504 if ((status & (RMD_ERR|RMD_STP|RMD_ENP)) != (RMD_STP|RMD_ENP)) {
505 am_writeword (dev, hdraddr + 2, RMD_OWN);
506 dev->stats.rx_errors++;
507 if (status & RMD_ERR) {
508 if (status & RMD_FRAM)
509 dev->stats.rx_frame_errors++;
510 if (status & RMD_CRC)
511 dev->stats.rx_crc_errors++;
512 } else if (status & RMD_STP)
513 dev->stats.rx_length_errors++;
514 continue;
515 }
516
517 len = am_readword(dev, hdraddr + 6);
518 skb = netdev_alloc_skb(dev, len + 2);
519
520 if (skb) {
521 skb_reserve(skb, 2);
522
523 am_readbuffer(dev, pktaddr, skb_put(skb, len), len);
524 am_writeword(dev, hdraddr + 2, RMD_OWN);
525 skb->protocol = eth_type_trans(skb, dev);
526 netif_rx(skb);
527 dev->stats.rx_bytes += len;
528 dev->stats.rx_packets++;
529 } else {
530 am_writeword (dev, hdraddr + 2, RMD_OWN);
531 printk (KERN_WARNING "%s: memory squeeze, dropping packet.\n", dev->name);
532 dev->stats.rx_dropped++;
533 break;
534 }
535 } while (1);
536 }
537
538 /*
539 * Update stats for the transmitted packet
540 */
541 static void
542 am79c961_tx(struct net_device *dev, struct dev_priv *priv)
543 {
544 do {
545 short len;
546 u_int hdraddr;
547 u_int status;
548
549 hdraddr = priv->txhdr + (priv->txtail << 3);
550 status = am_readword (dev, hdraddr + 2);
551 if (status & TMD_OWN)
552 break;
553
554 priv->txtail ++;
555 if (priv->txtail >= TX_BUFFERS)
556 priv->txtail = 0;
557
558 if (status & TMD_ERR) {
559 u_int status2;
560
561 dev->stats.tx_errors++;
562
563 status2 = am_readword (dev, hdraddr + 6);
564
565 /*
566 * Clear the error byte
567 */
568 am_writeword (dev, hdraddr + 6, 0);
569
570 if (status2 & TST_RTRY)
571 dev->stats.collisions += 16;
572 if (status2 & TST_LCOL)
573 dev->stats.tx_window_errors++;
574 if (status2 & TST_LCAR)
575 dev->stats.tx_carrier_errors++;
576 if (status2 & TST_UFLO)
577 dev->stats.tx_fifo_errors++;
578 continue;
579 }
580 dev->stats.tx_packets++;
581 len = am_readword (dev, hdraddr + 4);
582 dev->stats.tx_bytes += -len;
583 } while (priv->txtail != priv->txhead);
584
585 netif_wake_queue(dev);
586 }
587
588 static irqreturn_t
589 am79c961_interrupt(int irq, void *dev_id)
590 {
591 struct net_device *dev = (struct net_device *)dev_id;
592 struct dev_priv *priv = netdev_priv(dev);
593 u_int status, n = 100;
594 int handled = 0;
595
596 do {
597 status = read_rreg(dev->base_addr, CSR0);
598 write_rreg(dev->base_addr, CSR0, status &
599 (CSR0_IENA|CSR0_TINT|CSR0_RINT|
600 CSR0_MERR|CSR0_MISS|CSR0_CERR|CSR0_BABL));
601
602 if (status & CSR0_RINT) {
603 handled = 1;
604 am79c961_rx(dev, priv);
605 }
606 if (status & CSR0_TINT) {
607 handled = 1;
608 am79c961_tx(dev, priv);
609 }
610 if (status & CSR0_MISS) {
611 handled = 1;
612 dev->stats.rx_dropped++;
613 }
614 if (status & CSR0_CERR) {
615 handled = 1;
616 mod_timer(&priv->timer, jiffies);
617 }
618 } while (--n && status & (CSR0_RINT | CSR0_TINT));
619
620 return IRQ_RETVAL(handled);
621 }
622
623 #ifdef CONFIG_NET_POLL_CONTROLLER
624 static void am79c961_poll_controller(struct net_device *dev)
625 {
626 unsigned long flags;
627 local_irq_save(flags);
628 am79c961_interrupt(dev->irq, dev);
629 local_irq_restore(flags);
630 }
631 #endif
632
633 /*
634 * Initialise the chip. Note that we always expect
635 * to be entered with interrupts enabled.
636 */
637 static int
638 am79c961_hw_init(struct net_device *dev)
639 {
640 struct dev_priv *priv = netdev_priv(dev);
641
642 spin_lock_irq(&priv->chip_lock);
643 write_rreg (dev->base_addr, CSR0, CSR0_STOP);
644 write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
645 spin_unlock_irq(&priv->chip_lock);
646
647 am79c961_ramtest(dev, 0x66);
648 am79c961_ramtest(dev, 0x99);
649
650 return 0;
651 }
652
653 static void __init am79c961_banner(void)
654 {
655 static unsigned version_printed;
656
657 if (net_debug && version_printed++ == 0)
658 printk(KERN_INFO "%s", version);
659 }
660 static const struct net_device_ops am79c961_netdev_ops = {
661 .ndo_open = am79c961_open,
662 .ndo_stop = am79c961_close,
663 .ndo_start_xmit = am79c961_sendpacket,
664 .ndo_set_rx_mode = am79c961_setmulticastlist,
665 .ndo_tx_timeout = am79c961_timeout,
666 .ndo_validate_addr = eth_validate_addr,
667 .ndo_change_mtu = eth_change_mtu,
668 .ndo_set_mac_address = eth_mac_addr,
669 #ifdef CONFIG_NET_POLL_CONTROLLER
670 .ndo_poll_controller = am79c961_poll_controller,
671 #endif
672 };
673
674 static int __devinit am79c961_probe(struct platform_device *pdev)
675 {
676 struct resource *res;
677 struct net_device *dev;
678 struct dev_priv *priv;
679 int i, ret;
680
681 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
682 if (!res)
683 return -ENODEV;
684
685 dev = alloc_etherdev(sizeof(struct dev_priv));
686 ret = -ENOMEM;
687 if (!dev)
688 goto out;
689
690 SET_NETDEV_DEV(dev, &pdev->dev);
691
692 priv = netdev_priv(dev);
693
694 /*
695 * Fixed address and IRQ lines here.
696 * The PNP initialisation should have been
697 * done by the ether bootp loader.
698 */
699 dev->base_addr = res->start;
700 ret = platform_get_irq(pdev, 0);
701
702 if (ret < 0) {
703 ret = -ENODEV;
704 goto nodev;
705 }
706 dev->irq = ret;
707
708 ret = -ENODEV;
709 if (!request_region(dev->base_addr, 0x18, dev->name))
710 goto nodev;
711
712 /*
713 * Reset the device.
714 */
715 inb(dev->base_addr + NET_RESET);
716 udelay(5);
717
718 /*
719 * Check the manufacturer part of the
720 * ether address.
721 */
722 if (inb(dev->base_addr) != 0x08 ||
723 inb(dev->base_addr + 2) != 0x00 ||
724 inb(dev->base_addr + 4) != 0x2b)
725 goto release;
726
727 for (i = 0; i < 6; i++)
728 dev->dev_addr[i] = inb(dev->base_addr + i * 2) & 0xff;
729
730 am79c961_banner();
731
732 spin_lock_init(&priv->chip_lock);
733 init_timer(&priv->timer);
734 priv->timer.data = (unsigned long)dev;
735 priv->timer.function = am79c961_timer;
736
737 if (am79c961_hw_init(dev))
738 goto release;
739
740 dev->netdev_ops = &am79c961_netdev_ops;
741
742 ret = register_netdev(dev);
743 if (ret == 0) {
744 printk(KERN_INFO "%s: ether address %pM\n",
745 dev->name, dev->dev_addr);
746 return 0;
747 }
748
749 release:
750 release_region(dev->base_addr, 0x18);
751 nodev:
752 free_netdev(dev);
753 out:
754 return ret;
755 }
756
757 static struct platform_driver am79c961_driver = {
758 .probe = am79c961_probe,
759 .driver = {
760 .name = "am79c961",
761 },
762 };
763
764 static int __init am79c961_init(void)
765 {
766 return platform_driver_register(&am79c961_driver);
767 }
768
769 __initcall(am79c961_init);
Linux with added FPC-III support