?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Linux 3.4.102
[linux/fpc-iii.git] / drivers / net / ethernet / atheros / atl1e / atl1e_main.c
blobd4a747a12037fc651a5259ac806464e44bfc14f8
1 /*
2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1e.h"
23
24 #define DRV_VERSION "1.0.0.7-NAPI"
25
26 char atl1e_driver_name[] = "ATL1E";
27 char atl1e_driver_version[] = DRV_VERSION;
28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
29 /*
30 * atl1e_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
38 static DEFINE_PCI_DEVICE_TABLE(atl1e_pci_tbl) = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
41 /* required last entry */
42 { 0 }
43 };
44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
45
46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(DRV_VERSION);
50
51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
52
53 static const u16
54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55 {
56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
60 };
61
62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
63 {
64 REG_RXF0_BASE_ADDR_HI,
65 REG_RXF1_BASE_ADDR_HI,
66 REG_RXF2_BASE_ADDR_HI,
67 REG_RXF3_BASE_ADDR_HI
68 };
69
70 static const u16
71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
72 {
73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
77 };
78
79 static const u16
80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
81 {
82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
86 };
87
88 static const u16 atl1e_pay_load_size[] = {
89 128, 256, 512, 1024, 2048, 4096,
90 };
91
92 /*
93 * atl1e_irq_enable - Enable default interrupt generation settings
94 * @adapter: board private structure
95 */
96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
97 {
98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
101 AT_WRITE_FLUSH(&adapter->hw);
102 }
103 }
104
105 /*
106 * atl1e_irq_disable - Mask off interrupt generation on the NIC
107 * @adapter: board private structure
108 */
109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
110 {
111 atomic_inc(&adapter->irq_sem);
112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
113 AT_WRITE_FLUSH(&adapter->hw);
114 synchronize_irq(adapter->pdev->irq);
115 }
116
117 /*
118 * atl1e_irq_reset - reset interrupt confiure on the NIC
119 * @adapter: board private structure
120 */
121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
122 {
123 atomic_set(&adapter->irq_sem, 0);
124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
126 AT_WRITE_FLUSH(&adapter->hw);
127 }
128
129 /*
130 * atl1e_phy_config - Timer Call-back
131 * @data: pointer to netdev cast into an unsigned long
132 */
133 static void atl1e_phy_config(unsigned long data)
134 {
135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
136 struct atl1e_hw *hw = &adapter->hw;
137 unsigned long flags;
138
139 spin_lock_irqsave(&adapter->mdio_lock, flags);
140 atl1e_restart_autoneg(hw);
141 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
142 }
143
144 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
145 {
146
147 WARN_ON(in_interrupt());
148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
149 msleep(1);
150 atl1e_down(adapter);
151 atl1e_up(adapter);
152 clear_bit(__AT_RESETTING, &adapter->flags);
153 }
154
155 static void atl1e_reset_task(struct work_struct *work)
156 {
157 struct atl1e_adapter *adapter;
158 adapter = container_of(work, struct atl1e_adapter, reset_task);
159
160 atl1e_reinit_locked(adapter);
161 }
162
163 static int atl1e_check_link(struct atl1e_adapter *adapter)
164 {
165 struct atl1e_hw *hw = &adapter->hw;
166 struct net_device *netdev = adapter->netdev;
167 int err = 0;
168 u16 speed, duplex, phy_data;
169
170 /* MII_BMSR must read twice */
171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
174 /* link down */
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
176 u32 value;
177 /* disable rx */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
184 }
185 } else {
186 /* Link Up */
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
188 if (unlikely(err))
189 return err;
190
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
197 netdev_info(netdev,
198 "NIC Link is Up <%d Mbps %s Duplex>\n",
199 adapter->link_speed,
200 adapter->link_duplex == FULL_DUPLEX ?
201 "Full" : "Half");
202 }
203
204 if (!netif_carrier_ok(netdev)) {
205 /* Link down -> Up */
206 netif_carrier_on(netdev);
207 netif_wake_queue(netdev);
208 }
209 }
210 return 0;
211 }
212
213 /*
214 * atl1e_link_chg_task - deal with link change event Out of interrupt context
215 * @netdev: network interface device structure
216 */
217 static void atl1e_link_chg_task(struct work_struct *work)
218 {
219 struct atl1e_adapter *adapter;
220 unsigned long flags;
221
222 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
223 spin_lock_irqsave(&adapter->mdio_lock, flags);
224 atl1e_check_link(adapter);
225 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
226 }
227
228 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
229 {
230 struct net_device *netdev = adapter->netdev;
231 u16 phy_data = 0;
232 u16 link_up = 0;
233
234 spin_lock(&adapter->mdio_lock);
235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
237 spin_unlock(&adapter->mdio_lock);
238 link_up = phy_data & BMSR_LSTATUS;
239 /* notify upper layer link down ASAP */
240 if (!link_up) {
241 if (netif_carrier_ok(netdev)) {
242 /* old link state: Up */
243 netdev_info(netdev, "NIC Link is Down\n");
244 adapter->link_speed = SPEED_0;
245 netif_stop_queue(netdev);
246 }
247 }
248 schedule_work(&adapter->link_chg_task);
249 }
250
251 static void atl1e_del_timer(struct atl1e_adapter *adapter)
252 {
253 del_timer_sync(&adapter->phy_config_timer);
254 }
255
256 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
257 {
258 cancel_work_sync(&adapter->reset_task);
259 cancel_work_sync(&adapter->link_chg_task);
260 }
261
262 /*
263 * atl1e_tx_timeout - Respond to a Tx Hang
264 * @netdev: network interface device structure
265 */
266 static void atl1e_tx_timeout(struct net_device *netdev)
267 {
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
269
270 /* Do the reset outside of interrupt context */
271 schedule_work(&adapter->reset_task);
272 }
273
274 /*
275 * atl1e_set_multi - Multicast and Promiscuous mode set
276 * @netdev: network interface device structure
277 *
278 * The set_multi entry point is called whenever the multicast address
279 * list or the network interface flags are updated. This routine is
280 * responsible for configuring the hardware for proper multicast,
281 * promiscuous mode, and all-multi behavior.
282 */
283 static void atl1e_set_multi(struct net_device *netdev)
284 {
285 struct atl1e_adapter *adapter = netdev_priv(netdev);
286 struct atl1e_hw *hw = &adapter->hw;
287 struct netdev_hw_addr *ha;
288 u32 mac_ctrl_data = 0;
289 u32 hash_value;
290
291 /* Check for Promiscuous and All Multicast modes */
292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
293
294 if (netdev->flags & IFF_PROMISC) {
295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
296 } else if (netdev->flags & IFF_ALLMULTI) {
297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
299 } else {
300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
301 }
302
303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
304
305 /* clear the old settings from the multicast hash table */
306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
308
309 /* comoute mc addresses' hash value ,and put it into hash table */
310 netdev_for_each_mc_addr(ha, netdev) {
311 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
312 atl1e_hash_set(hw, hash_value);
313 }
314 }
315
316 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
317 {
318 if (features & NETIF_F_HW_VLAN_RX) {
319 /* enable VLAN tag insert/strip */
320 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
321 } else {
322 /* disable VLAN tag insert/strip */
323 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
324 }
325 }
326
327 static void atl1e_vlan_mode(struct net_device *netdev,
328 netdev_features_t features)
329 {
330 struct atl1e_adapter *adapter = netdev_priv(netdev);
331 u32 mac_ctrl_data = 0;
332
333 netdev_dbg(adapter->netdev, "%s\n", __func__);
334
335 atl1e_irq_disable(adapter);
336 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
337 __atl1e_vlan_mode(features, &mac_ctrl_data);
338 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
339 atl1e_irq_enable(adapter);
340 }
341
342 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
343 {
344 netdev_dbg(adapter->netdev, "%s\n", __func__);
345 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features);
346 }
347
348 /*
349 * atl1e_set_mac - Change the Ethernet Address of the NIC
350 * @netdev: network interface device structure
351 * @p: pointer to an address structure
352 *
353 * Returns 0 on success, negative on failure
354 */
355 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
356 {
357 struct atl1e_adapter *adapter = netdev_priv(netdev);
358 struct sockaddr *addr = p;
359
360 if (!is_valid_ether_addr(addr->sa_data))
361 return -EADDRNOTAVAIL;
362
363 if (netif_running(netdev))
364 return -EBUSY;
365
366 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
367 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
368
369 atl1e_hw_set_mac_addr(&adapter->hw);
370
371 return 0;
372 }
373
374 static netdev_features_t atl1e_fix_features(struct net_device *netdev,
375 netdev_features_t features)
376 {
377 /*
378 * Since there is no support for separate rx/tx vlan accel
379 * enable/disable make sure tx flag is always in same state as rx.
380 */
381 if (features & NETIF_F_HW_VLAN_RX)
382 features |= NETIF_F_HW_VLAN_TX;
383 else
384 features &= ~NETIF_F_HW_VLAN_TX;
385
386 return features;
387 }
388
389 static int atl1e_set_features(struct net_device *netdev,
390 netdev_features_t features)
391 {
392 netdev_features_t changed = netdev->features ^ features;
393
394 if (changed & NETIF_F_HW_VLAN_RX)
395 atl1e_vlan_mode(netdev, features);
396
397 return 0;
398 }
399
400 /*
401 * atl1e_change_mtu - Change the Maximum Transfer Unit
402 * @netdev: network interface device structure
403 * @new_mtu: new value for maximum frame size
404 *
405 * Returns 0 on success, negative on failure
406 */
407 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
408 {
409 struct atl1e_adapter *adapter = netdev_priv(netdev);
410 int old_mtu = netdev->mtu;
411 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
412
413 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
414 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
415 netdev_warn(adapter->netdev, "invalid MTU setting\n");
416 return -EINVAL;
417 }
418 /* set MTU */
419 if (old_mtu != new_mtu && netif_running(netdev)) {
420 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
421 msleep(1);
422 netdev->mtu = new_mtu;
423 adapter->hw.max_frame_size = new_mtu;
424 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
425 atl1e_down(adapter);
426 atl1e_up(adapter);
427 clear_bit(__AT_RESETTING, &adapter->flags);
428 }
429 return 0;
430 }
431
432 /*
433 * caller should hold mdio_lock
434 */
435 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
436 {
437 struct atl1e_adapter *adapter = netdev_priv(netdev);
438 u16 result;
439
440 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
441 return result;
442 }
443
444 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
445 int reg_num, int val)
446 {
447 struct atl1e_adapter *adapter = netdev_priv(netdev);
448
449 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
450 }
451
452 /*
453 * atl1e_mii_ioctl -
454 * @netdev:
455 * @ifreq:
456 * @cmd:
457 */
458 static int atl1e_mii_ioctl(struct net_device *netdev,
459 struct ifreq *ifr, int cmd)
460 {
461 struct atl1e_adapter *adapter = netdev_priv(netdev);
462 struct mii_ioctl_data *data = if_mii(ifr);
463 unsigned long flags;
464 int retval = 0;
465
466 if (!netif_running(netdev))
467 return -EINVAL;
468
469 spin_lock_irqsave(&adapter->mdio_lock, flags);
470 switch (cmd) {
471 case SIOCGMIIPHY:
472 data->phy_id = 0;
473 break;
474
475 case SIOCGMIIREG:
476 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
477 &data->val_out)) {
478 retval = -EIO;
479 goto out;
480 }
481 break;
482
483 case SIOCSMIIREG:
484 if (data->reg_num & ~(0x1F)) {
485 retval = -EFAULT;
486 goto out;
487 }
488
489 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
490 data->reg_num, data->val_in);
491 if (atl1e_write_phy_reg(&adapter->hw,
492 data->reg_num, data->val_in)) {
493 retval = -EIO;
494 goto out;
495 }
496 break;
497
498 default:
499 retval = -EOPNOTSUPP;
500 break;
501 }
502 out:
503 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
504 return retval;
505
506 }
507
508 /*
509 * atl1e_ioctl -
510 * @netdev:
511 * @ifreq:
512 * @cmd:
513 */
514 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
515 {
516 switch (cmd) {
517 case SIOCGMIIPHY:
518 case SIOCGMIIREG:
519 case SIOCSMIIREG:
520 return atl1e_mii_ioctl(netdev, ifr, cmd);
521 default:
522 return -EOPNOTSUPP;
523 }
524 }
525
526 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
527 {
528 u16 cmd;
529
530 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
531 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
532 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
533 pci_write_config_word(pdev, PCI_COMMAND, cmd);
534
535 /*
536 * some motherboards BIOS(PXE/EFI) driver may set PME
537 * while they transfer control to OS (Windows/Linux)
538 * so we should clear this bit before NIC work normally
539 */
540 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
541 msleep(1);
542 }
543
544 /*
545 * atl1e_alloc_queues - Allocate memory for all rings
546 * @adapter: board private structure to initialize
547 *
548 */
549 static int __devinit atl1e_alloc_queues(struct atl1e_adapter *adapter)
550 {
551 return 0;
552 }
553
554 /*
555 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
556 * @adapter: board private structure to initialize
557 *
558 * atl1e_sw_init initializes the Adapter private data structure.
559 * Fields are initialized based on PCI device information and
560 * OS network device settings (MTU size).
561 */
562 static int __devinit atl1e_sw_init(struct atl1e_adapter *adapter)
563 {
564 struct atl1e_hw *hw = &adapter->hw;
565 struct pci_dev *pdev = adapter->pdev;
566 u32 phy_status_data = 0;
567
568 adapter->wol = 0;
569 adapter->link_speed = SPEED_0; /* hardware init */
570 adapter->link_duplex = FULL_DUPLEX;
571 adapter->num_rx_queues = 1;
572
573 /* PCI config space info */
574 hw->vendor_id = pdev->vendor;
575 hw->device_id = pdev->device;
576 hw->subsystem_vendor_id = pdev->subsystem_vendor;
577 hw->subsystem_id = pdev->subsystem_device;
578 hw->revision_id = pdev->revision;
579
580 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
581
582 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
583 /* nic type */
584 if (hw->revision_id >= 0xF0) {
585 hw->nic_type = athr_l2e_revB;
586 } else {
587 if (phy_status_data & PHY_STATUS_100M)
588 hw->nic_type = athr_l1e;
589 else
590 hw->nic_type = athr_l2e_revA;
591 }
592
593 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
594
595 if (phy_status_data & PHY_STATUS_EMI_CA)
596 hw->emi_ca = true;
597 else
598 hw->emi_ca = false;
599
600 hw->phy_configured = false;
601 hw->preamble_len = 7;
602 hw->max_frame_size = adapter->netdev->mtu;
603 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
604 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
605
606 hw->rrs_type = atl1e_rrs_disable;
607 hw->indirect_tab = 0;
608 hw->base_cpu = 0;
609
610 /* need confirm */
611
612 hw->ict = 50000; /* 100ms */
613 hw->smb_timer = 200000; /* 200ms */
614 hw->tpd_burst = 5;
615 hw->rrd_thresh = 1;
616 hw->tpd_thresh = adapter->tx_ring.count / 2;
617 hw->rx_count_down = 4; /* 2us resolution */
618 hw->tx_count_down = hw->imt * 4 / 3;
619 hw->dmar_block = atl1e_dma_req_1024;
620 hw->dmaw_block = atl1e_dma_req_1024;
621 hw->dmar_dly_cnt = 15;
622 hw->dmaw_dly_cnt = 4;
623
624 if (atl1e_alloc_queues(adapter)) {
625 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
626 return -ENOMEM;
627 }
628
629 atomic_set(&adapter->irq_sem, 1);
630 spin_lock_init(&adapter->mdio_lock);
631 spin_lock_init(&adapter->tx_lock);
632
633 set_bit(__AT_DOWN, &adapter->flags);
634
635 return 0;
636 }
637
638 /*
639 * atl1e_clean_tx_ring - Free Tx-skb
640 * @adapter: board private structure
641 */
642 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
643 {
644 struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
645 &adapter->tx_ring;
646 struct atl1e_tx_buffer *tx_buffer = NULL;
647 struct pci_dev *pdev = adapter->pdev;
648 u16 index, ring_count;
649
650 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
651 return;
652
653 ring_count = tx_ring->count;
654 /* first unmmap dma */
655 for (index = 0; index < ring_count; index++) {
656 tx_buffer = &tx_ring->tx_buffer[index];
657 if (tx_buffer->dma) {
658 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
659 pci_unmap_single(pdev, tx_buffer->dma,
660 tx_buffer->length, PCI_DMA_TODEVICE);
661 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
662 pci_unmap_page(pdev, tx_buffer->dma,
663 tx_buffer->length, PCI_DMA_TODEVICE);
664 tx_buffer->dma = 0;
665 }
666 }
667 /* second free skb */
668 for (index = 0; index < ring_count; index++) {
669 tx_buffer = &tx_ring->tx_buffer[index];
670 if (tx_buffer->skb) {
671 dev_kfree_skb_any(tx_buffer->skb);
672 tx_buffer->skb = NULL;
673 }
674 }
675 /* Zero out Tx-buffers */
676 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
677 ring_count);
678 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
679 ring_count);
680 }
681
682 /*
683 * atl1e_clean_rx_ring - Free rx-reservation skbs
684 * @adapter: board private structure
685 */
686 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
687 {
688 struct atl1e_rx_ring *rx_ring =
689 (struct atl1e_rx_ring *)&adapter->rx_ring;
690 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
691 u16 i, j;
692
693
694 if (adapter->ring_vir_addr == NULL)
695 return;
696 /* Zero out the descriptor ring */
697 for (i = 0; i < adapter->num_rx_queues; i++) {
698 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
699 if (rx_page_desc[i].rx_page[j].addr != NULL) {
700 memset(rx_page_desc[i].rx_page[j].addr, 0,
701 rx_ring->real_page_size);
702 }
703 }
704 }
705 }
706
707 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
708 {
709 *ring_size = ((u32)(adapter->tx_ring.count *
710 sizeof(struct atl1e_tpd_desc) + 7
711 /* tx ring, qword align */
712 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
713 adapter->num_rx_queues + 31
714 /* rx ring, 32 bytes align */
715 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
716 sizeof(u32) + 3));
717 /* tx, rx cmd, dword align */
718 }
719
720 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
721 {
722 struct atl1e_rx_ring *rx_ring = NULL;
723
724 rx_ring = &adapter->rx_ring;
725
726 rx_ring->real_page_size = adapter->rx_ring.page_size
727 + adapter->hw.max_frame_size
728 + ETH_HLEN + VLAN_HLEN
729 + ETH_FCS_LEN;
730 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
731 atl1e_cal_ring_size(adapter, &adapter->ring_size);
732
733 adapter->ring_vir_addr = NULL;
734 adapter->rx_ring.desc = NULL;
735 rwlock_init(&adapter->tx_ring.tx_lock);
736 }
737
738 /*
739 * Read / Write Ptr Initialize:
740 */
741 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
742 {
743 struct atl1e_tx_ring *tx_ring = NULL;
744 struct atl1e_rx_ring *rx_ring = NULL;
745 struct atl1e_rx_page_desc *rx_page_desc = NULL;
746 int i, j;
747
748 tx_ring = &adapter->tx_ring;
749 rx_ring = &adapter->rx_ring;
750 rx_page_desc = rx_ring->rx_page_desc;
751
752 tx_ring->next_to_use = 0;
753 atomic_set(&tx_ring->next_to_clean, 0);
754
755 for (i = 0; i < adapter->num_rx_queues; i++) {
756 rx_page_desc[i].rx_using = 0;
757 rx_page_desc[i].rx_nxseq = 0;
758 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
759 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
760 rx_page_desc[i].rx_page[j].read_offset = 0;
761 }
762 }
763 }
764
765 /*
766 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
767 * @adapter: board private structure
768 *
769 * Free all transmit software resources
770 */
771 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
772 {
773 struct pci_dev *pdev = adapter->pdev;
774
775 atl1e_clean_tx_ring(adapter);
776 atl1e_clean_rx_ring(adapter);
777
778 if (adapter->ring_vir_addr) {
779 pci_free_consistent(pdev, adapter->ring_size,
780 adapter->ring_vir_addr, adapter->ring_dma);
781 adapter->ring_vir_addr = NULL;
782 }
783
784 if (adapter->tx_ring.tx_buffer) {
785 kfree(adapter->tx_ring.tx_buffer);
786 adapter->tx_ring.tx_buffer = NULL;
787 }
788 }
789
790 /*
791 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
792 * @adapter: board private structure
793 *
794 * Return 0 on success, negative on failure
795 */
796 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
797 {
798 struct pci_dev *pdev = adapter->pdev;
799 struct atl1e_tx_ring *tx_ring;
800 struct atl1e_rx_ring *rx_ring;
801 struct atl1e_rx_page_desc *rx_page_desc;
802 int size, i, j;
803 u32 offset = 0;
804 int err = 0;
805
806 if (adapter->ring_vir_addr != NULL)
807 return 0; /* alloced already */
808
809 tx_ring = &adapter->tx_ring;
810 rx_ring = &adapter->rx_ring;
811
812 /* real ring DMA buffer */
813
814 size = adapter->ring_size;
815 adapter->ring_vir_addr = pci_alloc_consistent(pdev,
816 adapter->ring_size, &adapter->ring_dma);
817
818 if (adapter->ring_vir_addr == NULL) {
819 netdev_err(adapter->netdev,
820 "pci_alloc_consistent failed, size = D%d\n", size);
821 return -ENOMEM;
822 }
823
824 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
825
826 rx_page_desc = rx_ring->rx_page_desc;
827
828 /* Init TPD Ring */
829 tx_ring->dma = roundup(adapter->ring_dma, 8);
830 offset = tx_ring->dma - adapter->ring_dma;
831 tx_ring->desc = adapter->ring_vir_addr + offset;
832 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
833 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
834 if (tx_ring->tx_buffer == NULL) {
835 netdev_err(adapter->netdev, "kzalloc failed, size = D%d\n",
836 size);
837 err = -ENOMEM;
838 goto failed;
839 }
840
841 /* Init RXF-Pages */
842 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
843 offset = roundup(offset, 32);
844
845 for (i = 0; i < adapter->num_rx_queues; i++) {
846 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
847 rx_page_desc[i].rx_page[j].dma =
848 adapter->ring_dma + offset;
849 rx_page_desc[i].rx_page[j].addr =
850 adapter->ring_vir_addr + offset;
851 offset += rx_ring->real_page_size;
852 }
853 }
854
855 /* Init CMB dma address */
856 tx_ring->cmb_dma = adapter->ring_dma + offset;
857 tx_ring->cmb = adapter->ring_vir_addr + offset;
858 offset += sizeof(u32);
859
860 for (i = 0; i < adapter->num_rx_queues; i++) {
861 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
862 rx_page_desc[i].rx_page[j].write_offset_dma =
863 adapter->ring_dma + offset;
864 rx_page_desc[i].rx_page[j].write_offset_addr =
865 adapter->ring_vir_addr + offset;
866 offset += sizeof(u32);
867 }
868 }
869
870 if (unlikely(offset > adapter->ring_size)) {
871 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
872 offset, adapter->ring_size);
873 err = -1;
874 goto failed;
875 }
876
877 return 0;
878 failed:
879 if (adapter->ring_vir_addr != NULL) {
880 pci_free_consistent(pdev, adapter->ring_size,
881 adapter->ring_vir_addr, adapter->ring_dma);
882 adapter->ring_vir_addr = NULL;
883 }
884 return err;
885 }
886
887 static inline void atl1e_configure_des_ring(const struct atl1e_adapter *adapter)
888 {
889
890 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
891 struct atl1e_rx_ring *rx_ring =
892 (struct atl1e_rx_ring *)&adapter->rx_ring;
893 struct atl1e_tx_ring *tx_ring =
894 (struct atl1e_tx_ring *)&adapter->tx_ring;
895 struct atl1e_rx_page_desc *rx_page_desc = NULL;
896 int i, j;
897
898 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
899 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
900 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
901 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
902 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
903 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
904 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
905
906 rx_page_desc = rx_ring->rx_page_desc;
907 /* RXF Page Physical address / Page Length */
908 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
909 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
910 (u32)((adapter->ring_dma &
911 AT_DMA_HI_ADDR_MASK) >> 32));
912 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
913 u32 page_phy_addr;
914 u32 offset_phy_addr;
915
916 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
917 offset_phy_addr =
918 rx_page_desc[i].rx_page[j].write_offset_dma;
919
920 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
921 page_phy_addr & AT_DMA_LO_ADDR_MASK);
922 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
923 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
924 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
925 }
926 }
927 /* Page Length */
928 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
929 /* Load all of base address above */
930 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
931 }
932
933 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
934 {
935 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
936 u32 dev_ctrl_data = 0;
937 u32 max_pay_load = 0;
938 u32 jumbo_thresh = 0;
939 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
940
941 /* configure TXQ param */
942 if (hw->nic_type != athr_l2e_revB) {
943 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
944 if (hw->max_frame_size <= 1500) {
945 jumbo_thresh = hw->max_frame_size + extra_size;
946 } else if (hw->max_frame_size < 6*1024) {
947 jumbo_thresh =
948 (hw->max_frame_size + extra_size) * 2 / 3;
949 } else {
950 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
951 }
952 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
953 }
954
955 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
956
957 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
958 DEVICE_CTRL_MAX_PAYLOAD_MASK;
959
960 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
961
962 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
963 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
964 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
965
966 if (hw->nic_type != athr_l2e_revB)
967 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
968 atl1e_pay_load_size[hw->dmar_block]);
969 /* enable TXQ */
970 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
971 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
972 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
973 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
974 }
975
976 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
977 {
978 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
979 u32 rxf_len = 0;
980 u32 rxf_low = 0;
981 u32 rxf_high = 0;
982 u32 rxf_thresh_data = 0;
983 u32 rxq_ctrl_data = 0;
984
985 if (hw->nic_type != athr_l2e_revB) {
986 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
987 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
988 RXQ_JMBOSZ_TH_SHIFT |
989 (1 & RXQ_JMBO_LKAH_MASK) <<
990 RXQ_JMBO_LKAH_SHIFT));
991
992 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
993 rxf_high = rxf_len * 4 / 5;
994 rxf_low = rxf_len / 5;
995 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
996 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
997 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
998 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
999
1000 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
1001 }
1002
1003 /* RRS */
1004 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1005 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1006
1007 if (hw->rrs_type & atl1e_rrs_ipv4)
1008 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
1009
1010 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
1011 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
1012
1013 if (hw->rrs_type & atl1e_rrs_ipv6)
1014 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
1015
1016 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1017 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1018
1019 if (hw->rrs_type != atl1e_rrs_disable)
1020 rxq_ctrl_data |=
1021 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1022
1023 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1024 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1025
1026 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1027 }
1028
1029 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1030 {
1031 struct atl1e_hw *hw = &adapter->hw;
1032 u32 dma_ctrl_data = 0;
1033
1034 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1035 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1036 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1037 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1038 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1039 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1040 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1041 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1042 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1043 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1044
1045 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1046 }
1047
1048 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1049 {
1050 u32 value;
1051 struct atl1e_hw *hw = &adapter->hw;
1052 struct net_device *netdev = adapter->netdev;
1053
1054 /* Config MAC CTRL Register */
1055 value = MAC_CTRL_TX_EN |
1056 MAC_CTRL_RX_EN ;
1057
1058 if (FULL_DUPLEX == adapter->link_duplex)
1059 value |= MAC_CTRL_DUPLX;
1060
1061 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1062 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1063 MAC_CTRL_SPEED_SHIFT);
1064 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1065
1066 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1067 value |= (((u32)adapter->hw.preamble_len &
1068 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1069
1070 __atl1e_vlan_mode(netdev->features, &value);
1071
1072 value |= MAC_CTRL_BC_EN;
1073 if (netdev->flags & IFF_PROMISC)
1074 value |= MAC_CTRL_PROMIS_EN;
1075 if (netdev->flags & IFF_ALLMULTI)
1076 value |= MAC_CTRL_MC_ALL_EN;
1077
1078 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1079 }
1080
1081 /*
1082 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1083 * @adapter: board private structure
1084 *
1085 * Configure the Tx /Rx unit of the MAC after a reset.
1086 */
1087 static int atl1e_configure(struct atl1e_adapter *adapter)
1088 {
1089 struct atl1e_hw *hw = &adapter->hw;
1090
1091 u32 intr_status_data = 0;
1092
1093 /* clear interrupt status */
1094 AT_WRITE_REG(hw, REG_ISR, ~0);
1095
1096 /* 1. set MAC Address */
1097 atl1e_hw_set_mac_addr(hw);
1098
1099 /* 2. Init the Multicast HASH table done by set_muti */
1100
1101 /* 3. Clear any WOL status */
1102 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1103
1104 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1105 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1106 * High 32bits memory */
1107 atl1e_configure_des_ring(adapter);
1108
1109 /* 5. set Interrupt Moderator Timer */
1110 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1111 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1112 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1113 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1114
1115 /* 6. rx/tx threshold to trig interrupt */
1116 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1117 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1118 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1119 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1120
1121 /* 7. set Interrupt Clear Timer */
1122 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1123
1124 /* 8. set MTU */
1125 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1126 VLAN_HLEN + ETH_FCS_LEN);
1127
1128 /* 9. config TXQ early tx threshold */
1129 atl1e_configure_tx(adapter);
1130
1131 /* 10. config RXQ */
1132 atl1e_configure_rx(adapter);
1133
1134 /* 11. config DMA Engine */
1135 atl1e_configure_dma(adapter);
1136
1137 /* 12. smb timer to trig interrupt */
1138 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1139
1140 intr_status_data = AT_READ_REG(hw, REG_ISR);
1141 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1142 netdev_err(adapter->netdev,
1143 "atl1e_configure failed, PCIE phy link down\n");
1144 return -1;
1145 }
1146
1147 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1148 return 0;
1149 }
1150
1151 /*
1152 * atl1e_get_stats - Get System Network Statistics
1153 * @netdev: network interface device structure
1154 *
1155 * Returns the address of the device statistics structure.
1156 * The statistics are actually updated from the timer callback.
1157 */
1158 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1159 {
1160 struct atl1e_adapter *adapter = netdev_priv(netdev);
1161 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1162 struct net_device_stats *net_stats = &netdev->stats;
1163
1164 net_stats->rx_packets = hw_stats->rx_ok;
1165 net_stats->tx_packets = hw_stats->tx_ok;
1166 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1167 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1168 net_stats->multicast = hw_stats->rx_mcast;
1169 net_stats->collisions = hw_stats->tx_1_col +
1170 hw_stats->tx_2_col * 2 +
1171 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1172
1173 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1174 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1175 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1176 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1177 net_stats->rx_length_errors = hw_stats->rx_len_err;
1178 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1179 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1180 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1181
1182 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1183
1184 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1185 hw_stats->tx_underrun + hw_stats->tx_trunc;
1186 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1187 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1188 net_stats->tx_window_errors = hw_stats->tx_late_col;
1189
1190 return net_stats;
1191 }
1192
1193 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1194 {
1195 u16 hw_reg_addr = 0;
1196 unsigned long *stats_item = NULL;
1197
1198 /* update rx status */
1199 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1200 stats_item = &adapter->hw_stats.rx_ok;
1201 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1202 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1203 stats_item++;
1204 hw_reg_addr += 4;
1205 }
1206 /* update tx status */
1207 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1208 stats_item = &adapter->hw_stats.tx_ok;
1209 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1210 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1211 stats_item++;
1212 hw_reg_addr += 4;
1213 }
1214 }
1215
1216 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1217 {
1218 u16 phy_data;
1219
1220 spin_lock(&adapter->mdio_lock);
1221 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1222 spin_unlock(&adapter->mdio_lock);
1223 }
1224
1225 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1226 {
1227 struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
1228 &adapter->tx_ring;
1229 struct atl1e_tx_buffer *tx_buffer = NULL;
1230 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1231 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1232
1233 while (next_to_clean != hw_next_to_clean) {
1234 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1235 if (tx_buffer->dma) {
1236 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1237 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1238 tx_buffer->length, PCI_DMA_TODEVICE);
1239 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1240 pci_unmap_page(adapter->pdev, tx_buffer->dma,
1241 tx_buffer->length, PCI_DMA_TODEVICE);
1242 tx_buffer->dma = 0;
1243 }
1244
1245 if (tx_buffer->skb) {
1246 dev_kfree_skb_irq(tx_buffer->skb);
1247 tx_buffer->skb = NULL;
1248 }
1249
1250 if (++next_to_clean == tx_ring->count)
1251 next_to_clean = 0;
1252 }
1253
1254 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1255
1256 if (netif_queue_stopped(adapter->netdev) &&
1257 netif_carrier_ok(adapter->netdev)) {
1258 netif_wake_queue(adapter->netdev);
1259 }
1260
1261 return true;
1262 }
1263
1264 /*
1265 * atl1e_intr - Interrupt Handler
1266 * @irq: interrupt number
1267 * @data: pointer to a network interface device structure
1268 * @pt_regs: CPU registers structure
1269 */
1270 static irqreturn_t atl1e_intr(int irq, void *data)
1271 {
1272 struct net_device *netdev = data;
1273 struct atl1e_adapter *adapter = netdev_priv(netdev);
1274 struct atl1e_hw *hw = &adapter->hw;
1275 int max_ints = AT_MAX_INT_WORK;
1276 int handled = IRQ_NONE;
1277 u32 status;
1278
1279 do {
1280 status = AT_READ_REG(hw, REG_ISR);
1281 if ((status & IMR_NORMAL_MASK) == 0 ||
1282 (status & ISR_DIS_INT) != 0) {
1283 if (max_ints != AT_MAX_INT_WORK)
1284 handled = IRQ_HANDLED;
1285 break;
1286 }
1287 /* link event */
1288 if (status & ISR_GPHY)
1289 atl1e_clear_phy_int(adapter);
1290 /* Ack ISR */
1291 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1292
1293 handled = IRQ_HANDLED;
1294 /* check if PCIE PHY Link down */
1295 if (status & ISR_PHY_LINKDOWN) {
1296 netdev_err(adapter->netdev,
1297 "pcie phy linkdown %x\n", status);
1298 if (netif_running(adapter->netdev)) {
1299 /* reset MAC */
1300 atl1e_irq_reset(adapter);
1301 schedule_work(&adapter->reset_task);
1302 break;
1303 }
1304 }
1305
1306 /* check if DMA read/write error */
1307 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1308 netdev_err(adapter->netdev,
1309 "PCIE DMA RW error (status = 0x%x)\n",
1310 status);
1311 atl1e_irq_reset(adapter);
1312 schedule_work(&adapter->reset_task);
1313 break;
1314 }
1315
1316 if (status & ISR_SMB)
1317 atl1e_update_hw_stats(adapter);
1318
1319 /* link event */
1320 if (status & (ISR_GPHY | ISR_MANUAL)) {
1321 netdev->stats.tx_carrier_errors++;
1322 atl1e_link_chg_event(adapter);
1323 break;
1324 }
1325
1326 /* transmit event */
1327 if (status & ISR_TX_EVENT)
1328 atl1e_clean_tx_irq(adapter);
1329
1330 if (status & ISR_RX_EVENT) {
1331 /*
1332 * disable rx interrupts, without
1333 * the synchronize_irq bit
1334 */
1335 AT_WRITE_REG(hw, REG_IMR,
1336 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1337 AT_WRITE_FLUSH(hw);
1338 if (likely(napi_schedule_prep(
1339 &adapter->napi)))
1340 __napi_schedule(&adapter->napi);
1341 }
1342 } while (--max_ints > 0);
1343 /* re-enable Interrupt*/
1344 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1345
1346 return handled;
1347 }
1348
1349 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1350 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1351 {
1352 u8 *packet = (u8 *)(prrs + 1);
1353 struct iphdr *iph;
1354 u16 head_len = ETH_HLEN;
1355 u16 pkt_flags;
1356 u16 err_flags;
1357
1358 skb_checksum_none_assert(skb);
1359 pkt_flags = prrs->pkt_flag;
1360 err_flags = prrs->err_flag;
1361 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1362 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1363 if (pkt_flags & RRS_IS_IPV4) {
1364 if (pkt_flags & RRS_IS_802_3)
1365 head_len += 8;
1366 iph = (struct iphdr *) (packet + head_len);
1367 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1368 goto hw_xsum;
1369 }
1370 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1371 skb->ip_summed = CHECKSUM_UNNECESSARY;
1372 return;
1373 }
1374 }
1375
1376 hw_xsum :
1377 return;
1378 }
1379
1380 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1381 u8 que)
1382 {
1383 struct atl1e_rx_page_desc *rx_page_desc =
1384 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1385 u8 rx_using = rx_page_desc[que].rx_using;
1386
1387 return (struct atl1e_rx_page *)&(rx_page_desc[que].rx_page[rx_using]);
1388 }
1389
1390 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1391 int *work_done, int work_to_do)
1392 {
1393 struct net_device *netdev = adapter->netdev;
1394 struct atl1e_rx_ring *rx_ring = (struct atl1e_rx_ring *)
1395 &adapter->rx_ring;
1396 struct atl1e_rx_page_desc *rx_page_desc =
1397 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1398 struct sk_buff *skb = NULL;
1399 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1400 u32 packet_size, write_offset;
1401 struct atl1e_recv_ret_status *prrs;
1402
1403 write_offset = *(rx_page->write_offset_addr);
1404 if (likely(rx_page->read_offset < write_offset)) {
1405 do {
1406 if (*work_done >= work_to_do)
1407 break;
1408 (*work_done)++;
1409 /* get new packet's rrs */
1410 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1411 rx_page->read_offset);
1412 /* check sequence number */
1413 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1414 netdev_err(netdev,
1415 "rx sequence number error (rx=%d) (expect=%d)\n",
1416 prrs->seq_num,
1417 rx_page_desc[que].rx_nxseq);
1418 rx_page_desc[que].rx_nxseq++;
1419 /* just for debug use */
1420 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1421 (((u32)prrs->seq_num) << 16) |
1422 rx_page_desc[que].rx_nxseq);
1423 goto fatal_err;
1424 }
1425 rx_page_desc[que].rx_nxseq++;
1426
1427 /* error packet */
1428 if (prrs->pkt_flag & RRS_IS_ERR_FRAME) {
1429 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1430 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1431 RRS_ERR_TRUNC)) {
1432 /* hardware error, discard this packet*/
1433 netdev_err(netdev,
1434 "rx packet desc error %x\n",
1435 *((u32 *)prrs + 1));
1436 goto skip_pkt;
1437 }
1438 }
1439
1440 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1441 RRS_PKT_SIZE_MASK) - 4; /* CRC */
1442 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
1443 if (skb == NULL) {
1444 netdev_warn(netdev,
1445 "Memory squeeze, deferring packet\n");
1446 goto skip_pkt;
1447 }
1448 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1449 skb_put(skb, packet_size);
1450 skb->protocol = eth_type_trans(skb, netdev);
1451 atl1e_rx_checksum(adapter, skb, prrs);
1452
1453 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) {
1454 u16 vlan_tag = (prrs->vtag >> 4) |
1455 ((prrs->vtag & 7) << 13) |
1456 ((prrs->vtag & 8) << 9);
1457 netdev_dbg(netdev,
1458 "RXD VLAN TAG<RRD>=0x%04x\n",
1459 prrs->vtag);
1460 __vlan_hwaccel_put_tag(skb, vlan_tag);
1461 }
1462 netif_receive_skb(skb);
1463
1464 skip_pkt:
1465 /* skip current packet whether it's ok or not. */
1466 rx_page->read_offset +=
1467 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1468 RRS_PKT_SIZE_MASK) +
1469 sizeof(struct atl1e_recv_ret_status) + 31) &
1470 0xFFFFFFE0);
1471
1472 if (rx_page->read_offset >= rx_ring->page_size) {
1473 /* mark this page clean */
1474 u16 reg_addr;
1475 u8 rx_using;
1476
1477 rx_page->read_offset =
1478 *(rx_page->write_offset_addr) = 0;
1479 rx_using = rx_page_desc[que].rx_using;
1480 reg_addr =
1481 atl1e_rx_page_vld_regs[que][rx_using];
1482 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1483 rx_page_desc[que].rx_using ^= 1;
1484 rx_page = atl1e_get_rx_page(adapter, que);
1485 }
1486 write_offset = *(rx_page->write_offset_addr);
1487 } while (rx_page->read_offset < write_offset);
1488 }
1489
1490 return;
1491
1492 fatal_err:
1493 if (!test_bit(__AT_DOWN, &adapter->flags))
1494 schedule_work(&adapter->reset_task);
1495 }
1496
1497 /*
1498 * atl1e_clean - NAPI Rx polling callback
1499 * @adapter: board private structure
1500 */
1501 static int atl1e_clean(struct napi_struct *napi, int budget)
1502 {
1503 struct atl1e_adapter *adapter =
1504 container_of(napi, struct atl1e_adapter, napi);
1505 u32 imr_data;
1506 int work_done = 0;
1507
1508 /* Keep link state information with original netdev */
1509 if (!netif_carrier_ok(adapter->netdev))
1510 goto quit_polling;
1511
1512 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1513
1514 /* If no Tx and not enough Rx work done, exit the polling mode */
1515 if (work_done < budget) {
1516 quit_polling:
1517 napi_complete(napi);
1518 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1519 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1520 /* test debug */
1521 if (test_bit(__AT_DOWN, &adapter->flags)) {
1522 atomic_dec(&adapter->irq_sem);
1523 netdev_err(adapter->netdev,
1524 "atl1e_clean is called when AT_DOWN\n");
1525 }
1526 /* reenable RX intr */
1527 /*atl1e_irq_enable(adapter); */
1528
1529 }
1530 return work_done;
1531 }
1532
1533 #ifdef CONFIG_NET_POLL_CONTROLLER
1534
1535 /*
1536 * Polling 'interrupt' - used by things like netconsole to send skbs
1537 * without having to re-enable interrupts. It's not called while
1538 * the interrupt routine is executing.
1539 */
1540 static void atl1e_netpoll(struct net_device *netdev)
1541 {
1542 struct atl1e_adapter *adapter = netdev_priv(netdev);
1543
1544 disable_irq(adapter->pdev->irq);
1545 atl1e_intr(adapter->pdev->irq, netdev);
1546 enable_irq(adapter->pdev->irq);
1547 }
1548 #endif
1549
1550 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1551 {
1552 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1553 u16 next_to_use = 0;
1554 u16 next_to_clean = 0;
1555
1556 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1557 next_to_use = tx_ring->next_to_use;
1558
1559 return (u16)(next_to_clean > next_to_use) ?
1560 (next_to_clean - next_to_use - 1) :
1561 (tx_ring->count + next_to_clean - next_to_use - 1);
1562 }
1563
1564 /*
1565 * get next usable tpd
1566 * Note: should call atl1e_tdp_avail to make sure
1567 * there is enough tpd to use
1568 */
1569 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1570 {
1571 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1572 u16 next_to_use = 0;
1573
1574 next_to_use = tx_ring->next_to_use;
1575 if (++tx_ring->next_to_use == tx_ring->count)
1576 tx_ring->next_to_use = 0;
1577
1578 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1579 return (struct atl1e_tpd_desc *)&tx_ring->desc[next_to_use];
1580 }
1581
1582 static struct atl1e_tx_buffer *
1583 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1584 {
1585 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1586
1587 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1588 }
1589
1590 /* Calculate the transmit packet descript needed*/
1591 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1592 {
1593 int i = 0;
1594 u16 tpd_req = 1;
1595 u16 fg_size = 0;
1596 u16 proto_hdr_len = 0;
1597
1598 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1599 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]);
1600 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1601 }
1602
1603 if (skb_is_gso(skb)) {
1604 if (skb->protocol == htons(ETH_P_IP) ||
1605 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1606 proto_hdr_len = skb_transport_offset(skb) +
1607 tcp_hdrlen(skb);
1608 if (proto_hdr_len < skb_headlen(skb)) {
1609 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1610 MAX_TX_BUF_LEN - 1) >>
1611 MAX_TX_BUF_SHIFT);
1612 }
1613 }
1614
1615 }
1616 return tpd_req;
1617 }
1618
1619 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1620 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1621 {
1622 u8 hdr_len;
1623 u32 real_len;
1624 unsigned short offload_type;
1625 int err;
1626
1627 if (skb_is_gso(skb)) {
1628 if (skb_header_cloned(skb)) {
1629 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1630 if (unlikely(err))
1631 return -1;
1632 }
1633 offload_type = skb_shinfo(skb)->gso_type;
1634
1635 if (offload_type & SKB_GSO_TCPV4) {
1636 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1637 + ntohs(ip_hdr(skb)->tot_len));
1638
1639 if (real_len < skb->len)
1640 pskb_trim(skb, real_len);
1641
1642 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1643 if (unlikely(skb->len == hdr_len)) {
1644 /* only xsum need */
1645 netdev_warn(adapter->netdev,
1646 "IPV4 tso with zero data??\n");
1647 goto check_sum;
1648 } else {
1649 ip_hdr(skb)->check = 0;
1650 ip_hdr(skb)->tot_len = 0;
1651 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1652 ip_hdr(skb)->saddr,
1653 ip_hdr(skb)->daddr,
1654 0, IPPROTO_TCP, 0);
1655 tpd->word3 |= (ip_hdr(skb)->ihl &
1656 TDP_V4_IPHL_MASK) <<
1657 TPD_V4_IPHL_SHIFT;
1658 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1659 TPD_TCPHDRLEN_MASK) <<
1660 TPD_TCPHDRLEN_SHIFT;
1661 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1662 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1663 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1664 }
1665 return 0;
1666 }
1667 }
1668
1669 check_sum:
1670 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1671 u8 css, cso;
1672
1673 cso = skb_checksum_start_offset(skb);
1674 if (unlikely(cso & 0x1)) {
1675 netdev_err(adapter->netdev,
1676 "payload offset should not ant event number\n");
1677 return -1;
1678 } else {
1679 css = cso + skb->csum_offset;
1680 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1681 TPD_PLOADOFFSET_SHIFT;
1682 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1683 TPD_CCSUMOFFSET_SHIFT;
1684 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1685 }
1686 }
1687
1688 return 0;
1689 }
1690
1691 static int atl1e_tx_map(struct atl1e_adapter *adapter,
1692 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1693 {
1694 struct atl1e_tpd_desc *use_tpd = NULL;
1695 struct atl1e_tx_buffer *tx_buffer = NULL;
1696 u16 buf_len = skb_headlen(skb);
1697 u16 map_len = 0;
1698 u16 mapped_len = 0;
1699 u16 hdr_len = 0;
1700 u16 nr_frags;
1701 u16 f;
1702 int segment;
1703 int ring_start = adapter->tx_ring.next_to_use;
1704 int ring_end;
1705
1706 nr_frags = skb_shinfo(skb)->nr_frags;
1707 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1708 if (segment) {
1709 /* TSO */
1710 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1711 use_tpd = tpd;
1712
1713 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1714 tx_buffer->length = map_len;
1715 tx_buffer->dma = pci_map_single(adapter->pdev,
1716 skb->data, hdr_len, PCI_DMA_TODEVICE);
1717 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma))
1718 return -ENOSPC;
1719
1720 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1721 mapped_len += map_len;
1722 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1723 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1724 ((cpu_to_le32(tx_buffer->length) &
1725 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1726 }
1727
1728 while (mapped_len < buf_len) {
1729 /* mapped_len == 0, means we should use the first tpd,
1730 which is given by caller */
1731 if (mapped_len == 0) {
1732 use_tpd = tpd;
1733 } else {
1734 use_tpd = atl1e_get_tpd(adapter);
1735 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1736 }
1737 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1738 tx_buffer->skb = NULL;
1739
1740 tx_buffer->length = map_len =
1741 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1742 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1743 tx_buffer->dma =
1744 pci_map_single(adapter->pdev, skb->data + mapped_len,
1745 map_len, PCI_DMA_TODEVICE);
1746
1747 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
1748 /* We need to unwind the mappings we've done */
1749 ring_end = adapter->tx_ring.next_to_use;
1750 adapter->tx_ring.next_to_use = ring_start;
1751 while (adapter->tx_ring.next_to_use != ring_end) {
1752 tpd = atl1e_get_tpd(adapter);
1753 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1754 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1755 tx_buffer->length, PCI_DMA_TODEVICE);
1756 }
1757 /* Reset the tx rings next pointer */
1758 adapter->tx_ring.next_to_use = ring_start;
1759 return -ENOSPC;
1760 }
1761
1762 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1763 mapped_len += map_len;
1764 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1765 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1766 ((cpu_to_le32(tx_buffer->length) &
1767 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1768 }
1769
1770 for (f = 0; f < nr_frags; f++) {
1771 const struct skb_frag_struct *frag;
1772 u16 i;
1773 u16 seg_num;
1774
1775 frag = &skb_shinfo(skb)->frags[f];
1776 buf_len = skb_frag_size(frag);
1777
1778 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1779 for (i = 0; i < seg_num; i++) {
1780 use_tpd = atl1e_get_tpd(adapter);
1781 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1782
1783 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1784 BUG_ON(tx_buffer->skb);
1785
1786 tx_buffer->skb = NULL;
1787 tx_buffer->length =
1788 (buf_len > MAX_TX_BUF_LEN) ?
1789 MAX_TX_BUF_LEN : buf_len;
1790 buf_len -= tx_buffer->length;
1791
1792 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev,
1793 frag,
1794 (i * MAX_TX_BUF_LEN),
1795 tx_buffer->length,
1796 DMA_TO_DEVICE);
1797
1798 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
1799 /* We need to unwind the mappings we've done */
1800 ring_end = adapter->tx_ring.next_to_use;
1801 adapter->tx_ring.next_to_use = ring_start;
1802 while (adapter->tx_ring.next_to_use != ring_end) {
1803 tpd = atl1e_get_tpd(adapter);
1804 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1805 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma,
1806 tx_buffer->length, DMA_TO_DEVICE);
1807 }
1808
1809 /* Reset the ring next to use pointer */
1810 adapter->tx_ring.next_to_use = ring_start;
1811 return -ENOSPC;
1812 }
1813
1814 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1815 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1816 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1817 ((cpu_to_le32(tx_buffer->length) &
1818 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1819 }
1820 }
1821
1822 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1823 /* note this one is a tcp header */
1824 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1825 /* The last tpd */
1826
1827 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1828 /* The last buffer info contain the skb address,
1829 so it will be free after unmap */
1830 tx_buffer->skb = skb;
1831 return 0;
1832 }
1833
1834 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1835 struct atl1e_tpd_desc *tpd)
1836 {
1837 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1838 /* Force memory writes to complete before letting h/w
1839 * know there are new descriptors to fetch. (Only
1840 * applicable for weak-ordered memory model archs,
1841 * such as IA-64). */
1842 wmb();
1843 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1844 }
1845
1846 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1847 struct net_device *netdev)
1848 {
1849 struct atl1e_adapter *adapter = netdev_priv(netdev);
1850 unsigned long flags;
1851 u16 tpd_req = 1;
1852 struct atl1e_tpd_desc *tpd;
1853
1854 if (test_bit(__AT_DOWN, &adapter->flags)) {
1855 dev_kfree_skb_any(skb);
1856 return NETDEV_TX_OK;
1857 }
1858
1859 if (unlikely(skb->len <= 0)) {
1860 dev_kfree_skb_any(skb);
1861 return NETDEV_TX_OK;
1862 }
1863 tpd_req = atl1e_cal_tdp_req(skb);
1864 if (!spin_trylock_irqsave(&adapter->tx_lock, flags))
1865 return NETDEV_TX_LOCKED;
1866
1867 if (atl1e_tpd_avail(adapter) < tpd_req) {
1868 /* no enough descriptor, just stop queue */
1869 netif_stop_queue(netdev);
1870 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1871 return NETDEV_TX_BUSY;
1872 }
1873
1874 tpd = atl1e_get_tpd(adapter);
1875
1876 if (vlan_tx_tag_present(skb)) {
1877 u16 vlan_tag = vlan_tx_tag_get(skb);
1878 u16 atl1e_vlan_tag;
1879
1880 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1881 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1882 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1883 TPD_VLAN_SHIFT;
1884 }
1885
1886 if (skb->protocol == htons(ETH_P_8021Q))
1887 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1888
1889 if (skb_network_offset(skb) != ETH_HLEN)
1890 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1891
1892 /* do TSO and check sum */
1893 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1894 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1895 dev_kfree_skb_any(skb);
1896 return NETDEV_TX_OK;
1897 }
1898
1899 if (atl1e_tx_map(adapter, skb, tpd)) {
1900 dev_kfree_skb_any(skb);
1901 goto out;
1902 }
1903
1904 atl1e_tx_queue(adapter, tpd_req, tpd);
1905
1906 netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1907 out:
1908 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1909 return NETDEV_TX_OK;
1910 }
1911
1912 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1913 {
1914 struct net_device *netdev = adapter->netdev;
1915
1916 free_irq(adapter->pdev->irq, netdev);
1917 }
1918
1919 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1920 {
1921 struct pci_dev *pdev = adapter->pdev;
1922 struct net_device *netdev = adapter->netdev;
1923 int err = 0;
1924
1925 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED,
1926 netdev->name, netdev);
1927 if (err) {
1928 netdev_dbg(adapter->netdev,
1929 "Unable to allocate interrupt Error: %d\n", err);
1930 return err;
1931 }
1932 netdev_dbg(adapter->netdev, "atl1e_request_irq OK\n");
1933 return err;
1934 }
1935
1936 int atl1e_up(struct atl1e_adapter *adapter)
1937 {
1938 struct net_device *netdev = adapter->netdev;
1939 int err = 0;
1940 u32 val;
1941
1942 /* hardware has been reset, we need to reload some things */
1943 err = atl1e_init_hw(&adapter->hw);
1944 if (err) {
1945 err = -EIO;
1946 return err;
1947 }
1948 atl1e_init_ring_ptrs(adapter);
1949 atl1e_set_multi(netdev);
1950 atl1e_restore_vlan(adapter);
1951
1952 if (atl1e_configure(adapter)) {
1953 err = -EIO;
1954 goto err_up;
1955 }
1956
1957 clear_bit(__AT_DOWN, &adapter->flags);
1958 napi_enable(&adapter->napi);
1959 atl1e_irq_enable(adapter);
1960 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1961 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1962 val | MASTER_CTRL_MANUAL_INT);
1963
1964 err_up:
1965 return err;
1966 }
1967
1968 void atl1e_down(struct atl1e_adapter *adapter)
1969 {
1970 struct net_device *netdev = adapter->netdev;
1971
1972 /* signal that we're down so the interrupt handler does not
1973 * reschedule our watchdog timer */
1974 set_bit(__AT_DOWN, &adapter->flags);
1975
1976 netif_stop_queue(netdev);
1977
1978 /* reset MAC to disable all RX/TX */
1979 atl1e_reset_hw(&adapter->hw);
1980 msleep(1);
1981
1982 napi_disable(&adapter->napi);
1983 atl1e_del_timer(adapter);
1984 atl1e_irq_disable(adapter);
1985
1986 netif_carrier_off(netdev);
1987 adapter->link_speed = SPEED_0;
1988 adapter->link_duplex = -1;
1989 atl1e_clean_tx_ring(adapter);
1990 atl1e_clean_rx_ring(adapter);
1991 }
1992
1993 /*
1994 * atl1e_open - Called when a network interface is made active
1995 * @netdev: network interface device structure
1996 *
1997 * Returns 0 on success, negative value on failure
1998 *
1999 * The open entry point is called when a network interface is made
2000 * active by the system (IFF_UP). At this point all resources needed
2001 * for transmit and receive operations are allocated, the interrupt
2002 * handler is registered with the OS, the watchdog timer is started,
2003 * and the stack is notified that the interface is ready.
2004 */
2005 static int atl1e_open(struct net_device *netdev)
2006 {
2007 struct atl1e_adapter *adapter = netdev_priv(netdev);
2008 int err;
2009
2010 /* disallow open during test */
2011 if (test_bit(__AT_TESTING, &adapter->flags))
2012 return -EBUSY;
2013
2014 /* allocate rx/tx dma buffer & descriptors */
2015 atl1e_init_ring_resources(adapter);
2016 err = atl1e_setup_ring_resources(adapter);
2017 if (unlikely(err))
2018 return err;
2019
2020 err = atl1e_request_irq(adapter);
2021 if (unlikely(err))
2022 goto err_req_irq;
2023
2024 err = atl1e_up(adapter);
2025 if (unlikely(err))
2026 goto err_up;
2027
2028 return 0;
2029
2030 err_up:
2031 atl1e_free_irq(adapter);
2032 err_req_irq:
2033 atl1e_free_ring_resources(adapter);
2034 atl1e_reset_hw(&adapter->hw);
2035
2036 return err;
2037 }
2038
2039 /*
2040 * atl1e_close - Disables a network interface
2041 * @netdev: network interface device structure
2042 *
2043 * Returns 0, this is not allowed to fail
2044 *
2045 * The close entry point is called when an interface is de-activated
2046 * by the OS. The hardware is still under the drivers control, but
2047 * needs to be disabled. A global MAC reset is issued to stop the
2048 * hardware, and all transmit and receive resources are freed.
2049 */
2050 static int atl1e_close(struct net_device *netdev)
2051 {
2052 struct atl1e_adapter *adapter = netdev_priv(netdev);
2053
2054 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2055 atl1e_down(adapter);
2056 atl1e_free_irq(adapter);
2057 atl1e_free_ring_resources(adapter);
2058
2059 return 0;
2060 }
2061
2062 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2063 {
2064 struct net_device *netdev = pci_get_drvdata(pdev);
2065 struct atl1e_adapter *adapter = netdev_priv(netdev);
2066 struct atl1e_hw *hw = &adapter->hw;
2067 u32 ctrl = 0;
2068 u32 mac_ctrl_data = 0;
2069 u32 wol_ctrl_data = 0;
2070 u16 mii_advertise_data = 0;
2071 u16 mii_bmsr_data = 0;
2072 u16 mii_intr_status_data = 0;
2073 u32 wufc = adapter->wol;
2074 u32 i;
2075 #ifdef CONFIG_PM
2076 int retval = 0;
2077 #endif
2078
2079 if (netif_running(netdev)) {
2080 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2081 atl1e_down(adapter);
2082 }
2083 netif_device_detach(netdev);
2084
2085 #ifdef CONFIG_PM
2086 retval = pci_save_state(pdev);
2087 if (retval)
2088 return retval;
2089 #endif
2090
2091 if (wufc) {
2092 /* get link status */
2093 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2094 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2095
2096 mii_advertise_data = ADVERTISE_10HALF;
2097
2098 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
2099 (atl1e_write_phy_reg(hw,
2100 MII_ADVERTISE, mii_advertise_data) != 0) ||
2101 (atl1e_phy_commit(hw)) != 0) {
2102 netdev_dbg(adapter->netdev, "set phy register failed\n");
2103 goto wol_dis;
2104 }
2105
2106 hw->phy_configured = false; /* re-init PHY when resume */
2107
2108 /* turn on magic packet wol */
2109 if (wufc & AT_WUFC_MAG)
2110 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2111
2112 if (wufc & AT_WUFC_LNKC) {
2113 /* if orignal link status is link, just wait for retrive link */
2114 if (mii_bmsr_data & BMSR_LSTATUS) {
2115 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2116 msleep(100);
2117 atl1e_read_phy_reg(hw, MII_BMSR,
2118 (u16 *)&mii_bmsr_data);
2119 if (mii_bmsr_data & BMSR_LSTATUS)
2120 break;
2121 }
2122
2123 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2124 netdev_dbg(adapter->netdev,
2125 "Link may change when suspend\n");
2126 }
2127 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2128 /* only link up can wake up */
2129 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2130 netdev_dbg(adapter->netdev,
2131 "read write phy register failed\n");
2132 goto wol_dis;
2133 }
2134 }
2135 /* clear phy interrupt */
2136 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2137 /* Config MAC Ctrl register */
2138 mac_ctrl_data = MAC_CTRL_RX_EN;
2139 /* set to 10/100M halt duplex */
2140 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2141 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2142 MAC_CTRL_PRMLEN_MASK) <<
2143 MAC_CTRL_PRMLEN_SHIFT);
2144
2145 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data);
2146
2147 /* magic packet maybe Broadcast&multicast&Unicast frame */
2148 if (wufc & AT_WUFC_MAG)
2149 mac_ctrl_data |= MAC_CTRL_BC_EN;
2150
2151 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2152 mac_ctrl_data);
2153
2154 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2155 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2156 /* pcie patch */
2157 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2158 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2159 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2160 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2161 goto suspend_exit;
2162 }
2163 wol_dis:
2164
2165 /* WOL disabled */
2166 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2167
2168 /* pcie patch */
2169 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2170 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2171 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2172
2173 atl1e_force_ps(hw);
2174 hw->phy_configured = false; /* re-init PHY when resume */
2175
2176 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2177
2178 suspend_exit:
2179
2180 if (netif_running(netdev))
2181 atl1e_free_irq(adapter);
2182
2183 pci_disable_device(pdev);
2184
2185 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2186
2187 return 0;
2188 }
2189
2190 #ifdef CONFIG_PM
2191 static int atl1e_resume(struct pci_dev *pdev)
2192 {
2193 struct net_device *netdev = pci_get_drvdata(pdev);
2194 struct atl1e_adapter *adapter = netdev_priv(netdev);
2195 u32 err;
2196
2197 pci_set_power_state(pdev, PCI_D0);
2198 pci_restore_state(pdev);
2199
2200 err = pci_enable_device(pdev);
2201 if (err) {
2202 netdev_err(adapter->netdev,
2203 "Cannot enable PCI device from suspend\n");
2204 return err;
2205 }
2206
2207 pci_set_master(pdev);
2208
2209 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2210
2211 pci_enable_wake(pdev, PCI_D3hot, 0);
2212 pci_enable_wake(pdev, PCI_D3cold, 0);
2213
2214 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2215
2216 if (netif_running(netdev)) {
2217 err = atl1e_request_irq(adapter);
2218 if (err)
2219 return err;
2220 }
2221
2222 atl1e_reset_hw(&adapter->hw);
2223
2224 if (netif_running(netdev))
2225 atl1e_up(adapter);
2226
2227 netif_device_attach(netdev);
2228
2229 return 0;
2230 }
2231 #endif
2232
2233 static void atl1e_shutdown(struct pci_dev *pdev)
2234 {
2235 atl1e_suspend(pdev, PMSG_SUSPEND);
2236 }
2237
2238 static const struct net_device_ops atl1e_netdev_ops = {
2239 .ndo_open = atl1e_open,
2240 .ndo_stop = atl1e_close,
2241 .ndo_start_xmit = atl1e_xmit_frame,
2242 .ndo_get_stats = atl1e_get_stats,
2243 .ndo_set_rx_mode = atl1e_set_multi,
2244 .ndo_validate_addr = eth_validate_addr,
2245 .ndo_set_mac_address = atl1e_set_mac_addr,
2246 .ndo_fix_features = atl1e_fix_features,
2247 .ndo_set_features = atl1e_set_features,
2248 .ndo_change_mtu = atl1e_change_mtu,
2249 .ndo_do_ioctl = atl1e_ioctl,
2250 .ndo_tx_timeout = atl1e_tx_timeout,
2251 #ifdef CONFIG_NET_POLL_CONTROLLER
2252 .ndo_poll_controller = atl1e_netpoll,
2253 #endif
2254
2255 };
2256
2257 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2258 {
2259 SET_NETDEV_DEV(netdev, &pdev->dev);
2260 pci_set_drvdata(pdev, netdev);
2261
2262 netdev->irq = pdev->irq;
2263 netdev->netdev_ops = &atl1e_netdev_ops;
2264
2265 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2266 atl1e_set_ethtool_ops(netdev);
2267
2268 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
2269 NETIF_F_HW_VLAN_RX;
2270 netdev->features = netdev->hw_features | NETIF_F_LLTX |
2271 NETIF_F_HW_VLAN_TX;
2272
2273 return 0;
2274 }
2275
2276 /*
2277 * atl1e_probe - Device Initialization Routine
2278 * @pdev: PCI device information struct
2279 * @ent: entry in atl1e_pci_tbl
2280 *
2281 * Returns 0 on success, negative on failure
2282 *
2283 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2284 * The OS initialization, configuring of the adapter private structure,
2285 * and a hardware reset occur.
2286 */
2287 static int __devinit atl1e_probe(struct pci_dev *pdev,
2288 const struct pci_device_id *ent)
2289 {
2290 struct net_device *netdev;
2291 struct atl1e_adapter *adapter = NULL;
2292 static int cards_found;
2293
2294 int err = 0;
2295
2296 err = pci_enable_device(pdev);
2297 if (err) {
2298 dev_err(&pdev->dev, "cannot enable PCI device\n");
2299 return err;
2300 }
2301
2302 /*
2303 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2304 * shared register for the high 32 bits, so only a single, aligned,
2305 * 4 GB physical address range can be used at a time.
2306 *
2307 * Supporting 64-bit DMA on this hardware is more trouble than it's
2308 * worth. It is far easier to limit to 32-bit DMA than update
2309 * various kernel subsystems to support the mechanics required by a
2310 * fixed-high-32-bit system.
2311 */
2312 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2313 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2314 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2315 goto err_dma;
2316 }
2317
2318 err = pci_request_regions(pdev, atl1e_driver_name);
2319 if (err) {
2320 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2321 goto err_pci_reg;
2322 }
2323
2324 pci_set_master(pdev);
2325
2326 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2327 if (netdev == NULL) {
2328 err = -ENOMEM;
2329 goto err_alloc_etherdev;
2330 }
2331
2332 err = atl1e_init_netdev(netdev, pdev);
2333 if (err) {
2334 netdev_err(netdev, "init netdevice failed\n");
2335 goto err_init_netdev;
2336 }
2337 adapter = netdev_priv(netdev);
2338 adapter->bd_number = cards_found;
2339 adapter->netdev = netdev;
2340 adapter->pdev = pdev;
2341 adapter->hw.adapter = adapter;
2342 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2343 if (!adapter->hw.hw_addr) {
2344 err = -EIO;
2345 netdev_err(netdev, "cannot map device registers\n");
2346 goto err_ioremap;
2347 }
2348 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2349
2350 /* init mii data */
2351 adapter->mii.dev = netdev;
2352 adapter->mii.mdio_read = atl1e_mdio_read;
2353 adapter->mii.mdio_write = atl1e_mdio_write;
2354 adapter->mii.phy_id_mask = 0x1f;
2355 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2356
2357 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2358
2359 init_timer(&adapter->phy_config_timer);
2360 adapter->phy_config_timer.function = atl1e_phy_config;
2361 adapter->phy_config_timer.data = (unsigned long) adapter;
2362
2363 /* get user settings */
2364 atl1e_check_options(adapter);
2365 /*
2366 * Mark all PCI regions associated with PCI device
2367 * pdev as being reserved by owner atl1e_driver_name
2368 * Enables bus-mastering on the device and calls
2369 * pcibios_set_master to do the needed arch specific settings
2370 */
2371 atl1e_setup_pcicmd(pdev);
2372 /* setup the private structure */
2373 err = atl1e_sw_init(adapter);
2374 if (err) {
2375 netdev_err(netdev, "net device private data init failed\n");
2376 goto err_sw_init;
2377 }
2378
2379 /* Init GPHY as early as possible due to power saving issue */
2380 atl1e_phy_init(&adapter->hw);
2381 /* reset the controller to
2382 * put the device in a known good starting state */
2383 err = atl1e_reset_hw(&adapter->hw);
2384 if (err) {
2385 err = -EIO;
2386 goto err_reset;
2387 }
2388
2389 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2390 err = -EIO;
2391 netdev_err(netdev, "get mac address failed\n");
2392 goto err_eeprom;
2393 }
2394
2395 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2396 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2397 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2398
2399 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2400 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2401 netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE);
2402 err = register_netdev(netdev);
2403 if (err) {
2404 netdev_err(netdev, "register netdevice failed\n");
2405 goto err_register;
2406 }
2407
2408 /* assume we have no link for now */
2409 netif_stop_queue(netdev);
2410 netif_carrier_off(netdev);
2411
2412 cards_found++;
2413
2414 return 0;
2415
2416 err_reset:
2417 err_register:
2418 err_sw_init:
2419 err_eeprom:
2420 iounmap(adapter->hw.hw_addr);
2421 err_init_netdev:
2422 err_ioremap:
2423 free_netdev(netdev);
2424 err_alloc_etherdev:
2425 pci_release_regions(pdev);
2426 err_pci_reg:
2427 err_dma:
2428 pci_disable_device(pdev);
2429 return err;
2430 }
2431
2432 /*
2433 * atl1e_remove - Device Removal Routine
2434 * @pdev: PCI device information struct
2435 *
2436 * atl1e_remove is called by the PCI subsystem to alert the driver
2437 * that it should release a PCI device. The could be caused by a
2438 * Hot-Plug event, or because the driver is going to be removed from
2439 * memory.
2440 */
2441 static void __devexit atl1e_remove(struct pci_dev *pdev)
2442 {
2443 struct net_device *netdev = pci_get_drvdata(pdev);
2444 struct atl1e_adapter *adapter = netdev_priv(netdev);
2445
2446 /*
2447 * flush_scheduled work may reschedule our watchdog task, so
2448 * explicitly disable watchdog tasks from being rescheduled
2449 */
2450 set_bit(__AT_DOWN, &adapter->flags);
2451
2452 atl1e_del_timer(adapter);
2453 atl1e_cancel_work(adapter);
2454
2455 unregister_netdev(netdev);
2456 atl1e_free_ring_resources(adapter);
2457 atl1e_force_ps(&adapter->hw);
2458 iounmap(adapter->hw.hw_addr);
2459 pci_release_regions(pdev);
2460 free_netdev(netdev);
2461 pci_disable_device(pdev);
2462 }
2463
2464 /*
2465 * atl1e_io_error_detected - called when PCI error is detected
2466 * @pdev: Pointer to PCI device
2467 * @state: The current pci connection state
2468 *
2469 * This function is called after a PCI bus error affecting
2470 * this device has been detected.
2471 */
2472 static pci_ers_result_t
2473 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2474 {
2475 struct net_device *netdev = pci_get_drvdata(pdev);
2476 struct atl1e_adapter *adapter = netdev_priv(netdev);
2477
2478 netif_device_detach(netdev);
2479
2480 if (state == pci_channel_io_perm_failure)
2481 return PCI_ERS_RESULT_DISCONNECT;
2482
2483 if (netif_running(netdev))
2484 atl1e_down(adapter);
2485
2486 pci_disable_device(pdev);
2487
2488 /* Request a slot slot reset. */
2489 return PCI_ERS_RESULT_NEED_RESET;
2490 }
2491
2492 /*
2493 * atl1e_io_slot_reset - called after the pci bus has been reset.
2494 * @pdev: Pointer to PCI device
2495 *
2496 * Restart the card from scratch, as if from a cold-boot. Implementation
2497 * resembles the first-half of the e1000_resume routine.
2498 */
2499 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2500 {
2501 struct net_device *netdev = pci_get_drvdata(pdev);
2502 struct atl1e_adapter *adapter = netdev_priv(netdev);
2503
2504 if (pci_enable_device(pdev)) {
2505 netdev_err(adapter->netdev,
2506 "Cannot re-enable PCI device after reset\n");
2507 return PCI_ERS_RESULT_DISCONNECT;
2508 }
2509 pci_set_master(pdev);
2510
2511 pci_enable_wake(pdev, PCI_D3hot, 0);
2512 pci_enable_wake(pdev, PCI_D3cold, 0);
2513
2514 atl1e_reset_hw(&adapter->hw);
2515
2516 return PCI_ERS_RESULT_RECOVERED;
2517 }
2518
2519 /*
2520 * atl1e_io_resume - called when traffic can start flowing again.
2521 * @pdev: Pointer to PCI device
2522 *
2523 * This callback is called when the error recovery driver tells us that
2524 * its OK to resume normal operation. Implementation resembles the
2525 * second-half of the atl1e_resume routine.
2526 */
2527 static void atl1e_io_resume(struct pci_dev *pdev)
2528 {
2529 struct net_device *netdev = pci_get_drvdata(pdev);
2530 struct atl1e_adapter *adapter = netdev_priv(netdev);
2531
2532 if (netif_running(netdev)) {
2533 if (atl1e_up(adapter)) {
2534 netdev_err(adapter->netdev,
2535 "can't bring device back up after reset\n");
2536 return;
2537 }
2538 }
2539
2540 netif_device_attach(netdev);
2541 }
2542
2543 static struct pci_error_handlers atl1e_err_handler = {
2544 .error_detected = atl1e_io_error_detected,
2545 .slot_reset = atl1e_io_slot_reset,
2546 .resume = atl1e_io_resume,
2547 };
2548
2549 static struct pci_driver atl1e_driver = {
2550 .name = atl1e_driver_name,
2551 .id_table = atl1e_pci_tbl,
2552 .probe = atl1e_probe,
2553 .remove = __devexit_p(atl1e_remove),
2554 /* Power Management Hooks */
2555 #ifdef CONFIG_PM
2556 .suspend = atl1e_suspend,
2557 .resume = atl1e_resume,
2558 #endif
2559 .shutdown = atl1e_shutdown,
2560 .err_handler = &atl1e_err_handler
2561 };
2562
2563 /*
2564 * atl1e_init_module - Driver Registration Routine
2565 *
2566 * atl1e_init_module is the first routine called when the driver is
2567 * loaded. All it does is register with the PCI subsystem.
2568 */
2569 static int __init atl1e_init_module(void)
2570 {
2571 return pci_register_driver(&atl1e_driver);
2572 }
2573
2574 /*
2575 * atl1e_exit_module - Driver Exit Cleanup Routine
2576 *
2577 * atl1e_exit_module is called just before the driver is removed
2578 * from memory.
2579 */
2580 static void __exit atl1e_exit_module(void)
2581 {
2582 pci_unregister_driver(&atl1e_driver);
2583 }
2584
2585 module_init(atl1e_init_module);
2586 module_exit(atl1e_exit_module);
Linux with added FPC-III support