1 /* bnx2x_sp.h: Broadcom Everest network driver.
3 * Copyright (c) 2011-2012 Broadcom Corporation
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Vladislav Zolotarov
19 #ifndef BNX2X_SP_VERBS
20 #define BNX2X_SP_VERBS
25 /* Bits representing general command's configuration */
29 /* Wait until all pending commands complete */
31 /* Don't send a ramrod, only update a registry */
33 /* Configure HW according to the current object state */
35 /* Execute the next command now */
38 * Don't add a new command and continue execution of posponed
39 * commands. If not set a new command will be added to the
40 * pending commands list.
51 /* Filtering states */
53 BNX2X_FILTER_MAC_PENDING
,
54 BNX2X_FILTER_VLAN_PENDING
,
55 BNX2X_FILTER_VLAN_MAC_PENDING
,
56 BNX2X_FILTER_RX_MODE_PENDING
,
57 BNX2X_FILTER_RX_MODE_SCHED
,
58 BNX2X_FILTER_ISCSI_ETH_START_SCHED
,
59 BNX2X_FILTER_ISCSI_ETH_STOP_SCHED
,
60 BNX2X_FILTER_FCOE_ETH_START_SCHED
,
61 BNX2X_FILTER_FCOE_ETH_STOP_SCHED
,
62 BNX2X_FILTER_MCAST_PENDING
,
63 BNX2X_FILTER_MCAST_SCHED
,
64 BNX2X_FILTER_RSS_CONF_PENDING
,
67 struct bnx2x_raw_obj
{
74 /* Ramrod data buffer params */
76 dma_addr_t rdata_mapping
;
78 /* Ramrod state params */
79 int state
; /* "ramrod is pending" state bit */
80 unsigned long *pstate
; /* pointer to state buffer */
82 bnx2x_obj_type obj_type
;
84 int (*wait_comp
)(struct bnx2x
*bp
,
85 struct bnx2x_raw_obj
*o
);
87 bool (*check_pending
)(struct bnx2x_raw_obj
*o
);
88 void (*clear_pending
)(struct bnx2x_raw_obj
*o
);
89 void (*set_pending
)(struct bnx2x_raw_obj
*o
);
92 /************************* VLAN-MAC commands related parameters ***************/
93 struct bnx2x_mac_ramrod_data
{
97 struct bnx2x_vlan_ramrod_data
{
101 struct bnx2x_vlan_mac_ramrod_data
{
106 union bnx2x_classification_ramrod_data
{
107 struct bnx2x_mac_ramrod_data mac
;
108 struct bnx2x_vlan_ramrod_data vlan
;
109 struct bnx2x_vlan_mac_ramrod_data vlan_mac
;
112 /* VLAN_MAC commands */
113 enum bnx2x_vlan_mac_cmd
{
119 struct bnx2x_vlan_mac_data
{
120 /* Requested command: BNX2X_VLAN_MAC_XX */
121 enum bnx2x_vlan_mac_cmd cmd
;
123 * used to contain the data related vlan_mac_flags bits from
126 unsigned long vlan_mac_flags
;
128 /* Needed for MOVE command */
129 struct bnx2x_vlan_mac_obj
*target_obj
;
131 union bnx2x_classification_ramrod_data u
;
134 /*************************** Exe Queue obj ************************************/
135 union bnx2x_exe_queue_cmd_data
{
136 struct bnx2x_vlan_mac_data vlan_mac
;
143 struct bnx2x_exeq_elem
{
144 struct list_head link
;
146 /* Length of this element in the exe_chunk. */
149 union bnx2x_exe_queue_cmd_data cmd_data
;
152 union bnx2x_qable_obj
;
154 union bnx2x_exeq_comp_elem
{
155 union event_ring_elem
*elem
;
158 struct bnx2x_exe_queue_obj
;
160 typedef int (*exe_q_validate
)(struct bnx2x
*bp
,
161 union bnx2x_qable_obj
*o
,
162 struct bnx2x_exeq_elem
*elem
);
164 typedef int (*exe_q_remove
)(struct bnx2x
*bp
,
165 union bnx2x_qable_obj
*o
,
166 struct bnx2x_exeq_elem
*elem
);
169 * @return positive is entry was optimized, 0 - if not, negative
170 * in case of an error.
172 typedef int (*exe_q_optimize
)(struct bnx2x
*bp
,
173 union bnx2x_qable_obj
*o
,
174 struct bnx2x_exeq_elem
*elem
);
175 typedef int (*exe_q_execute
)(struct bnx2x
*bp
,
176 union bnx2x_qable_obj
*o
,
177 struct list_head
*exe_chunk
,
178 unsigned long *ramrod_flags
);
179 typedef struct bnx2x_exeq_elem
*
180 (*exe_q_get
)(struct bnx2x_exe_queue_obj
*o
,
181 struct bnx2x_exeq_elem
*elem
);
183 struct bnx2x_exe_queue_obj
{
185 * Commands pending for an execution.
187 struct list_head exe_queue
;
190 * Commands pending for an completion.
192 struct list_head pending_comp
;
196 /* Maximum length of commands' list for one execution */
199 union bnx2x_qable_obj
*owner
;
201 /****** Virtual functions ******/
203 * Called before commands execution for commands that are really
204 * going to be executed (after 'optimize').
206 * Must run under exe_queue->lock
208 exe_q_validate validate
;
211 * Called before removing pending commands, cleaning allocated
212 * resources (e.g., credits from validate)
217 * This will try to cancel the current pending commands list
218 * considering the new command.
220 * Returns the number of optimized commands or a negative error code
222 * Must run under exe_queue->lock
224 exe_q_optimize optimize
;
227 * Run the next commands chunk (owner specific).
229 exe_q_execute execute
;
232 * Return the exe_queue element containing the specific command
233 * if any. Otherwise return NULL.
237 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
239 * Element in the VLAN_MAC registry list having all currenty configured
242 struct bnx2x_vlan_mac_registry_elem
{
243 struct list_head link
;
246 * Used to store the cam offset used for the mac/vlan/vlan-mac.
247 * Relevant for 57710 and 57711 only. VLANs and MACs share the
248 * same CAM for these chips.
252 /* Needed for DEL and RESTORE flows */
253 unsigned long vlan_mac_flags
;
255 union bnx2x_classification_ramrod_data u
;
258 /* Bits representing VLAN_MAC commands specific flags */
264 BNX2X_DONT_CONSUME_CAM_CREDIT
,
265 BNX2X_DONT_CONSUME_CAM_CREDIT_DEST
,
268 struct bnx2x_vlan_mac_ramrod_params
{
269 /* Object to run the command from */
270 struct bnx2x_vlan_mac_obj
*vlan_mac_obj
;
272 /* General command flags: COMP_WAIT, etc. */
273 unsigned long ramrod_flags
;
275 /* Command specific configuration request */
276 struct bnx2x_vlan_mac_data user_req
;
279 struct bnx2x_vlan_mac_obj
{
280 struct bnx2x_raw_obj raw
;
282 /* Bookkeeping list: will prevent the addition of already existing
285 struct list_head head
;
287 /* TODO: Add it's initialization in the init functions */
288 struct bnx2x_exe_queue_obj exe_queue
;
290 /* MACs credit pool */
291 struct bnx2x_credit_pool_obj
*macs_pool
;
293 /* VLANs credit pool */
294 struct bnx2x_credit_pool_obj
*vlans_pool
;
296 /* RAMROD command to be used */
299 /* copy first n elements onto preallocated buffer
301 * @param n number of elements to get
302 * @param buf buffer preallocated by caller into which elements
303 * will be copied. Note elements are 4-byte aligned
304 * so buffer size must be able to accomodate the
307 * @return number of copied bytes
309 int (*get_n_elements
)(struct bnx2x
*bp
, struct bnx2x_vlan_mac_obj
*o
,
313 * Checks if ADD-ramrod with the given params may be performed.
315 * @return zero if the element may be added
318 int (*check_add
)(struct bnx2x
*bp
,
319 struct bnx2x_vlan_mac_obj
*o
,
320 union bnx2x_classification_ramrod_data
*data
);
323 * Checks if DEL-ramrod with the given params may be performed.
325 * @return true if the element may be deleted
327 struct bnx2x_vlan_mac_registry_elem
*
328 (*check_del
)(struct bnx2x
*bp
,
329 struct bnx2x_vlan_mac_obj
*o
,
330 union bnx2x_classification_ramrod_data
*data
);
333 * Checks if DEL-ramrod with the given params may be performed.
335 * @return true if the element may be deleted
337 bool (*check_move
)(struct bnx2x
*bp
,
338 struct bnx2x_vlan_mac_obj
*src_o
,
339 struct bnx2x_vlan_mac_obj
*dst_o
,
340 union bnx2x_classification_ramrod_data
*data
);
343 * Update the relevant credit object(s) (consume/return
346 bool (*get_credit
)(struct bnx2x_vlan_mac_obj
*o
);
347 bool (*put_credit
)(struct bnx2x_vlan_mac_obj
*o
);
348 bool (*get_cam_offset
)(struct bnx2x_vlan_mac_obj
*o
, int *offset
);
349 bool (*put_cam_offset
)(struct bnx2x_vlan_mac_obj
*o
, int offset
);
352 * Configures one rule in the ramrod data buffer.
354 void (*set_one_rule
)(struct bnx2x
*bp
,
355 struct bnx2x_vlan_mac_obj
*o
,
356 struct bnx2x_exeq_elem
*elem
, int rule_idx
,
360 * Delete all configured elements having the given
361 * vlan_mac_flags specification. Assumes no pending for
362 * execution commands. Will schedule all all currently
363 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
364 * specification for deletion and will use the given
365 * ramrod_flags for the last DEL operation.
369 * @param ramrod_flags RAMROD_XX flags
371 * @return 0 if the last operation has completed successfully
372 * and there are no more elements left, positive value
373 * if there are pending for completion commands,
374 * negative value in case of failure.
376 int (*delete_all
)(struct bnx2x
*bp
,
377 struct bnx2x_vlan_mac_obj
*o
,
378 unsigned long *vlan_mac_flags
,
379 unsigned long *ramrod_flags
);
382 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
383 * configured elements list.
386 * @param p Command parameters (RAMROD_COMP_WAIT bit in
387 * ramrod_flags is only taken into an account)
388 * @param ppos a pointer to the cooky that should be given back in the
389 * next call to make function handle the next element. If
390 * *ppos is set to NULL it will restart the iterator.
391 * If returned *ppos == NULL this means that the last
392 * element has been handled.
396 int (*restore
)(struct bnx2x
*bp
,
397 struct bnx2x_vlan_mac_ramrod_params
*p
,
398 struct bnx2x_vlan_mac_registry_elem
**ppos
);
401 * Should be called on a completion arival.
405 * @param cqe Completion element we are handling
406 * @param ramrod_flags if RAMROD_CONT is set the next bulk of
407 * pending commands will be executed.
408 * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
409 * may also be set if needed.
411 * @return 0 if there are neither pending nor waiting for
412 * completion commands. Positive value if there are
413 * pending for execution or for completion commands.
414 * Negative value in case of an error (including an
417 int (*complete
)(struct bnx2x
*bp
, struct bnx2x_vlan_mac_obj
*o
,
418 union event_ring_elem
*cqe
,
419 unsigned long *ramrod_flags
);
422 * Wait for completion of all commands. Don't schedule new ones,
423 * just wait. It assumes that the completion code will schedule
426 int (*wait
)(struct bnx2x
*bp
, struct bnx2x_vlan_mac_obj
*o
);
430 BNX2X_LLH_CAM_ISCSI_ETH_LINE
= 0,
431 BNX2X_LLH_CAM_ETH_LINE
,
432 BNX2X_LLH_CAM_MAX_PF_LINE
= NIG_REG_LLH1_FUNC_MEM_SIZE
/ 2
436 /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
438 /* RX_MODE ramrod spesial flags: set in rx_mode_flags field in
439 * a bnx2x_rx_mode_ramrod_params.
442 BNX2X_RX_MODE_FCOE_ETH
,
443 BNX2X_RX_MODE_ISCSI_ETH
,
447 BNX2X_ACCEPT_UNICAST
,
448 BNX2X_ACCEPT_MULTICAST
,
449 BNX2X_ACCEPT_ALL_UNICAST
,
450 BNX2X_ACCEPT_ALL_MULTICAST
,
451 BNX2X_ACCEPT_BROADCAST
,
452 BNX2X_ACCEPT_UNMATCHED
,
453 BNX2X_ACCEPT_ANY_VLAN
456 struct bnx2x_rx_mode_ramrod_params
{
457 struct bnx2x_rx_mode_obj
*rx_mode_obj
;
458 unsigned long *pstate
;
463 unsigned long ramrod_flags
;
464 unsigned long rx_mode_flags
;
467 * rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
468 * a tstorm_eth_mac_filter_config (e1x).
471 dma_addr_t rdata_mapping
;
473 /* Rx mode settings */
474 unsigned long rx_accept_flags
;
476 /* internal switching settings */
477 unsigned long tx_accept_flags
;
480 struct bnx2x_rx_mode_obj
{
481 int (*config_rx_mode
)(struct bnx2x
*bp
,
482 struct bnx2x_rx_mode_ramrod_params
*p
);
484 int (*wait_comp
)(struct bnx2x
*bp
,
485 struct bnx2x_rx_mode_ramrod_params
*p
);
488 /********************** Set multicast group ***********************************/
490 struct bnx2x_mcast_list_elem
{
491 struct list_head link
;
495 union bnx2x_mcast_config_data
{
497 u8 bin
; /* used in a RESTORE flow */
500 struct bnx2x_mcast_ramrod_params
{
501 struct bnx2x_mcast_obj
*mcast_obj
;
503 /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
504 unsigned long ramrod_flags
;
506 struct list_head mcast_list
; /* list of struct bnx2x_mcast_list_elem */
508 * - rename it to macs_num.
509 * - Add a new command type for handling pending commands
510 * (remove "zero semantics").
512 * Length of mcast_list. If zero and ADD_CONT command - post
520 BNX2X_MCAST_CMD_CONT
,
522 BNX2X_MCAST_CMD_RESTORE
,
525 struct bnx2x_mcast_obj
{
526 struct bnx2x_raw_obj raw
;
530 #define BNX2X_MCAST_BINS_NUM 256
531 #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64)
532 u64 vec
[BNX2X_MCAST_VEC_SZ
];
534 /** Number of BINs to clear. Should be updated
535 * immediately when a command arrives in order to
536 * properly create DEL commands.
542 struct list_head macs
;
547 /* Pending commands */
548 struct list_head pending_cmds_head
;
550 /* A state that is set in raw.pstate, when there are pending commands */
553 /* Maximal number of mcast MACs configured in one command */
556 /* Total number of currently pending MACs to configure: both
557 * in the pending commands list and in the current command.
559 int total_pending_num
;
564 * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above)
566 int (*config_mcast
)(struct bnx2x
*bp
,
567 struct bnx2x_mcast_ramrod_params
*p
, int cmd
);
570 * Fills the ramrod data during the RESTORE flow.
574 * @param start_idx Registry index to start from
575 * @param rdata_idx Index in the ramrod data to start from
577 * @return -1 if we handled the whole registry or index of the last
578 * handled registry element.
580 int (*hdl_restore
)(struct bnx2x
*bp
, struct bnx2x_mcast_obj
*o
,
581 int start_bin
, int *rdata_idx
);
583 int (*enqueue_cmd
)(struct bnx2x
*bp
, struct bnx2x_mcast_obj
*o
,
584 struct bnx2x_mcast_ramrod_params
*p
, int cmd
);
586 void (*set_one_rule
)(struct bnx2x
*bp
,
587 struct bnx2x_mcast_obj
*o
, int idx
,
588 union bnx2x_mcast_config_data
*cfg_data
, int cmd
);
590 /** Checks if there are more mcast MACs to be set or a previous
591 * command is still pending.
593 bool (*check_pending
)(struct bnx2x_mcast_obj
*o
);
596 * Set/Clear/Check SCHEDULED state of the object
598 void (*set_sched
)(struct bnx2x_mcast_obj
*o
);
599 void (*clear_sched
)(struct bnx2x_mcast_obj
*o
);
600 bool (*check_sched
)(struct bnx2x_mcast_obj
*o
);
602 /* Wait until all pending commands complete */
603 int (*wait_comp
)(struct bnx2x
*bp
, struct bnx2x_mcast_obj
*o
);
606 * Handle the internal object counters needed for proper
607 * commands handling. Checks that the provided parameters are
610 int (*validate
)(struct bnx2x
*bp
,
611 struct bnx2x_mcast_ramrod_params
*p
, int cmd
);
614 * Restore the values of internal counters in case of a failure.
616 void (*revert
)(struct bnx2x
*bp
,
617 struct bnx2x_mcast_ramrod_params
*p
,
620 int (*get_registry_size
)(struct bnx2x_mcast_obj
*o
);
621 void (*set_registry_size
)(struct bnx2x_mcast_obj
*o
, int n
);
624 /*************************** Credit handling **********************************/
625 struct bnx2x_credit_pool_obj
{
627 /* Current amount of credit in the pool */
630 /* Maximum allowed credit. put() will check against it. */
634 * Allocate a pool table statically.
636 * Currently the mamimum allowed size is MAX_MAC_CREDIT_E2(272)
638 * The set bit in the table will mean that the entry is available.
640 #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
641 u64 pool_mirror
[BNX2X_POOL_VEC_SIZE
];
643 /* Base pool offset (initialized differently */
644 int base_pool_offset
;
647 * Get the next free pool entry.
649 * @return true if there was a free entry in the pool
651 bool (*get_entry
)(struct bnx2x_credit_pool_obj
*o
, int *entry
);
654 * Return the entry back to the pool.
656 * @return true if entry is legal and has been successfully
657 * returned to the pool.
659 bool (*put_entry
)(struct bnx2x_credit_pool_obj
*o
, int entry
);
662 * Get the requested amount of credit from the pool.
664 * @param cnt Amount of requested credit
665 * @return true if the operation is successful
667 bool (*get
)(struct bnx2x_credit_pool_obj
*o
, int cnt
);
670 * Returns the credit to the pool.
672 * @param cnt Amount of credit to return
673 * @return true if the operation is successful
675 bool (*put
)(struct bnx2x_credit_pool_obj
*o
, int cnt
);
678 * Reads the current amount of credit.
680 int (*check
)(struct bnx2x_credit_pool_obj
*o
);
683 /*************************** RSS configuration ********************************/
685 /* RSS_MODE bits are mutually exclusive */
686 BNX2X_RSS_MODE_DISABLED
,
687 BNX2X_RSS_MODE_REGULAR
,
688 BNX2X_RSS_MODE_VLAN_PRI
,
689 BNX2X_RSS_MODE_E1HOV_PRI
,
690 BNX2X_RSS_MODE_IP_DSCP
,
692 BNX2X_RSS_SET_SRCH
, /* Setup searcher, E1x specific flag */
700 struct bnx2x_config_rss_params
{
701 struct bnx2x_rss_config_obj
*rss_obj
;
703 /* may have RAMROD_COMP_WAIT set only */
704 unsigned long ramrod_flags
;
706 /* BNX2X_RSS_X bits */
707 unsigned long rss_flags
;
709 /* Number hash bits to take into an account */
712 /* Indirection table */
713 u8 ind_table
[T_ETH_INDIRECTION_TABLE_SIZE
];
715 /* RSS hash values */
718 /* valid only iff BNX2X_RSS_UPDATE_TOE is set */
722 struct bnx2x_rss_config_obj
{
723 struct bnx2x_raw_obj raw
;
725 /* RSS engine to use */
728 /* Last configured indirection table */
729 u8 ind_table
[T_ETH_INDIRECTION_TABLE_SIZE
];
731 int (*config_rss
)(struct bnx2x
*bp
,
732 struct bnx2x_config_rss_params
*p
);
735 /*********************** Queue state update ***********************************/
737 /* UPDATE command options */
739 BNX2X_Q_UPDATE_IN_VLAN_REM
,
740 BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG
,
741 BNX2X_Q_UPDATE_OUT_VLAN_REM
,
742 BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG
,
743 BNX2X_Q_UPDATE_ANTI_SPOOF
,
744 BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG
,
745 BNX2X_Q_UPDATE_ACTIVATE
,
746 BNX2X_Q_UPDATE_ACTIVATE_CHNG
,
747 BNX2X_Q_UPDATE_DEF_VLAN_EN
,
748 BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG
,
749 BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG
,
750 BNX2X_Q_UPDATE_SILENT_VLAN_REM
753 /* Allowed Queue states */
756 BNX2X_Q_STATE_INITIALIZED
,
757 BNX2X_Q_STATE_ACTIVE
,
758 BNX2X_Q_STATE_MULTI_COS
,
759 BNX2X_Q_STATE_MCOS_TERMINATED
,
760 BNX2X_Q_STATE_INACTIVE
,
761 BNX2X_Q_STATE_STOPPED
,
762 BNX2X_Q_STATE_TERMINATED
,
767 /* Allowed commands */
768 enum bnx2x_queue_cmd
{
771 BNX2X_Q_CMD_SETUP_TX_ONLY
,
772 BNX2X_Q_CMD_DEACTIVATE
,
773 BNX2X_Q_CMD_ACTIVATE
,
775 BNX2X_Q_CMD_UPDATE_TPA
,
778 BNX2X_Q_CMD_TERMINATE
,
783 /* queue SETUP + INIT flags */
786 BNX2X_Q_FLG_TPA_IPV6
,
789 BNX2X_Q_FLG_ZERO_STATS
,
798 BNX2X_Q_FLG_LEADING_RSS
,
800 BNX2X_Q_FLG_DEF_VLAN
,
801 BNX2X_Q_FLG_TX_SWITCH
,
803 BNX2X_Q_FLG_ANTI_SPOOF
,
804 BNX2X_Q_FLG_SILENT_VLAN_REM
807 /* Queue type options: queue type may be a compination of below. */
809 /** TODO: Consider moving both these flags into the init()
816 #define BNX2X_PRIMARY_CID_INDEX 0
817 #define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */
818 #define BNX2X_MULTI_TX_COS_E2_E3A0 2
819 #define BNX2X_MULTI_TX_COS_E3B0 3
820 #define BNX2X_MULTI_TX_COS 3 /* Maximum possible */
823 struct bnx2x_queue_init_params
{
838 /* CID context in the host memory */
839 struct eth_context
*cxts
[BNX2X_MULTI_TX_COS
];
841 /* maximum number of cos supported by hardware */
845 struct bnx2x_queue_terminate_params
{
846 /* index within the tx_only cids of this queue object */
850 struct bnx2x_queue_cfc_del_params
{
851 /* index within the tx_only cids of this queue object */
855 struct bnx2x_queue_update_params
{
856 unsigned long update_flags
; /* BNX2X_Q_UPDATE_XX bits */
858 u16 silent_removal_value
;
859 u16 silent_removal_mask
;
860 /* index within the tx_only cids of this queue object */
864 struct rxq_pause_params
{
869 u16 sge_th_lo
; /* valid iff BNX2X_Q_FLG_TPA */
870 u16 sge_th_hi
; /* valid iff BNX2X_Q_FLG_TPA */
875 struct bnx2x_general_setup_params
{
876 /* valid iff BNX2X_Q_FLG_STATS */
884 struct bnx2x_rxq_setup_params
{
889 dma_addr_t rcq_np_map
;
896 /* valid iff BNX2X_Q_FLG_TPA */
903 /* valid iff BNX2X_Q_FLG_MCAST */
910 /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
911 u16 silent_removal_value
;
912 u16 silent_removal_mask
;
915 struct bnx2x_txq_setup_params
{
921 u8 cos
; /* valid iff BNX2X_Q_FLG_COS */
923 /* equals to the leading rss client id, used for TX classification*/
924 u8 tss_leading_cl_id
;
926 /* valid iff BNX2X_Q_FLG_DEF_VLAN */
930 struct bnx2x_queue_setup_params
{
931 struct bnx2x_general_setup_params gen_params
;
932 struct bnx2x_txq_setup_params txq_params
;
933 struct bnx2x_rxq_setup_params rxq_params
;
934 struct rxq_pause_params pause_params
;
938 struct bnx2x_queue_setup_tx_only_params
{
939 struct bnx2x_general_setup_params gen_params
;
940 struct bnx2x_txq_setup_params txq_params
;
942 /* index within the tx_only cids of this queue object */
946 struct bnx2x_queue_state_params
{
947 struct bnx2x_queue_sp_obj
*q_obj
;
949 /* Current command */
950 enum bnx2x_queue_cmd cmd
;
952 /* may have RAMROD_COMP_WAIT set only */
953 unsigned long ramrod_flags
;
955 /* Params according to the current command */
957 struct bnx2x_queue_update_params update
;
958 struct bnx2x_queue_setup_params setup
;
959 struct bnx2x_queue_init_params init
;
960 struct bnx2x_queue_setup_tx_only_params tx_only
;
961 struct bnx2x_queue_terminate_params terminate
;
962 struct bnx2x_queue_cfc_del_params cfc_del
;
966 struct bnx2x_queue_sp_obj
{
967 u32 cids
[BNX2X_MULTI_TX_COS
];
972 * number of traffic classes supported by queue.
973 * The primary connection of the queue suppotrs the first traffic
974 * class. Any further traffic class is suppoted by a tx-only
977 * Therefore max_cos is also a number of valid entries in the cids
981 u8 num_tx_only
, next_tx_only
;
983 enum bnx2x_q_state state
, next_state
;
985 /* bits from enum bnx2x_q_type */
988 /* BNX2X_Q_CMD_XX bits. This object implements "one
989 * pending" paradigm but for debug and tracing purposes it's
990 * more convinient to have different bits for different
993 unsigned long pending
;
995 /* Buffer to use as a ramrod data and its mapping */
997 dma_addr_t rdata_mapping
;
1000 * Performs one state change according to the given parameters.
1002 * @return 0 in case of success and negative value otherwise.
1004 int (*send_cmd
)(struct bnx2x
*bp
,
1005 struct bnx2x_queue_state_params
*params
);
1008 * Sets the pending bit according to the requested transition.
1010 int (*set_pending
)(struct bnx2x_queue_sp_obj
*o
,
1011 struct bnx2x_queue_state_params
*params
);
1014 * Checks that the requested state transition is legal.
1016 int (*check_transition
)(struct bnx2x
*bp
,
1017 struct bnx2x_queue_sp_obj
*o
,
1018 struct bnx2x_queue_state_params
*params
);
1021 * Completes the pending command.
1023 int (*complete_cmd
)(struct bnx2x
*bp
,
1024 struct bnx2x_queue_sp_obj
*o
,
1025 enum bnx2x_queue_cmd
);
1027 int (*wait_comp
)(struct bnx2x
*bp
,
1028 struct bnx2x_queue_sp_obj
*o
,
1029 enum bnx2x_queue_cmd cmd
);
1032 /********************** Function state update *********************************/
1033 /* Allowed Function states */
1034 enum bnx2x_func_state
{
1035 BNX2X_F_STATE_RESET
,
1036 BNX2X_F_STATE_INITIALIZED
,
1037 BNX2X_F_STATE_STARTED
,
1038 BNX2X_F_STATE_TX_STOPPED
,
1042 /* Allowed Function commands */
1043 enum bnx2x_func_cmd
{
1044 BNX2X_F_CMD_HW_INIT
,
1047 BNX2X_F_CMD_HW_RESET
,
1048 BNX2X_F_CMD_TX_STOP
,
1049 BNX2X_F_CMD_TX_START
,
1053 struct bnx2x_func_hw_init_params
{
1054 /* A load phase returned by MCP.
1057 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1058 * FW_MSG_CODE_DRV_LOAD_COMMON
1059 * FW_MSG_CODE_DRV_LOAD_PORT
1060 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1065 struct bnx2x_func_hw_reset_params
{
1066 /* A load phase returned by MCP.
1069 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1070 * FW_MSG_CODE_DRV_LOAD_COMMON
1071 * FW_MSG_CODE_DRV_LOAD_PORT
1072 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1077 struct bnx2x_func_start_params
{
1078 /* Multi Function mode:
1080 * - Switch Dependent
1081 * - Switch Independent
1085 /* Switch Dependent mode outer VLAN tag */
1088 /* Function cos mode */
1089 u8 network_cos_mode
;
1092 struct bnx2x_func_tx_start_params
{
1093 struct priority_cos traffic_type_to_priority_cos
[MAX_TRAFFIC_TYPES
];
1096 u8 dont_add_pri_0_en
;
1099 struct bnx2x_func_state_params
{
1100 struct bnx2x_func_sp_obj
*f_obj
;
1102 /* Current command */
1103 enum bnx2x_func_cmd cmd
;
1105 /* may have RAMROD_COMP_WAIT set only */
1106 unsigned long ramrod_flags
;
1108 /* Params according to the current command */
1110 struct bnx2x_func_hw_init_params hw_init
;
1111 struct bnx2x_func_hw_reset_params hw_reset
;
1112 struct bnx2x_func_start_params start
;
1113 struct bnx2x_func_tx_start_params tx_start
;
1117 struct bnx2x_func_sp_drv_ops
{
1118 /* Init tool + runtime initialization:
1120 * - Common (per Path)
1124 int (*init_hw_cmn_chip
)(struct bnx2x
*bp
);
1125 int (*init_hw_cmn
)(struct bnx2x
*bp
);
1126 int (*init_hw_port
)(struct bnx2x
*bp
);
1127 int (*init_hw_func
)(struct bnx2x
*bp
);
1129 /* Reset Function HW: Common, Port, Function phases. */
1130 void (*reset_hw_cmn
)(struct bnx2x
*bp
);
1131 void (*reset_hw_port
)(struct bnx2x
*bp
);
1132 void (*reset_hw_func
)(struct bnx2x
*bp
);
1134 /* Init/Free GUNZIP resources */
1135 int (*gunzip_init
)(struct bnx2x
*bp
);
1136 void (*gunzip_end
)(struct bnx2x
*bp
);
1138 /* Prepare/Release FW resources */
1139 int (*init_fw
)(struct bnx2x
*bp
);
1140 void (*release_fw
)(struct bnx2x
*bp
);
1143 struct bnx2x_func_sp_obj
{
1144 enum bnx2x_func_state state
, next_state
;
1146 /* BNX2X_FUNC_CMD_XX bits. This object implements "one
1147 * pending" paradigm but for debug and tracing purposes it's
1148 * more convinient to have different bits for different
1151 unsigned long pending
;
1153 /* Buffer to use as a ramrod data and its mapping */
1155 dma_addr_t rdata_mapping
;
1157 /* this mutex validates that when pending flag is taken, the next
1158 * ramrod to be sent will be the one set the pending bit
1160 struct mutex one_pending_mutex
;
1162 /* Driver interface */
1163 struct bnx2x_func_sp_drv_ops
*drv
;
1166 * Performs one state change according to the given parameters.
1168 * @return 0 in case of success and negative value otherwise.
1170 int (*send_cmd
)(struct bnx2x
*bp
,
1171 struct bnx2x_func_state_params
*params
);
1174 * Checks that the requested state transition is legal.
1176 int (*check_transition
)(struct bnx2x
*bp
,
1177 struct bnx2x_func_sp_obj
*o
,
1178 struct bnx2x_func_state_params
*params
);
1181 * Completes the pending command.
1183 int (*complete_cmd
)(struct bnx2x
*bp
,
1184 struct bnx2x_func_sp_obj
*o
,
1185 enum bnx2x_func_cmd cmd
);
1187 int (*wait_comp
)(struct bnx2x
*bp
, struct bnx2x_func_sp_obj
*o
,
1188 enum bnx2x_func_cmd cmd
);
1191 /********************** Interfaces ********************************************/
1192 /* Queueable objects set */
1193 union bnx2x_qable_obj
{
1194 struct bnx2x_vlan_mac_obj vlan_mac
;
1196 /************** Function state update *********/
1197 void bnx2x_init_func_obj(struct bnx2x
*bp
,
1198 struct bnx2x_func_sp_obj
*obj
,
1199 void *rdata
, dma_addr_t rdata_mapping
,
1200 struct bnx2x_func_sp_drv_ops
*drv_iface
);
1202 int bnx2x_func_state_change(struct bnx2x
*bp
,
1203 struct bnx2x_func_state_params
*params
);
1205 enum bnx2x_func_state
bnx2x_func_get_state(struct bnx2x
*bp
,
1206 struct bnx2x_func_sp_obj
*o
);
1207 /******************* Queue State **************/
1208 void bnx2x_init_queue_obj(struct bnx2x
*bp
,
1209 struct bnx2x_queue_sp_obj
*obj
, u8 cl_id
, u32
*cids
,
1210 u8 cid_cnt
, u8 func_id
, void *rdata
,
1211 dma_addr_t rdata_mapping
, unsigned long type
);
1213 int bnx2x_queue_state_change(struct bnx2x
*bp
,
1214 struct bnx2x_queue_state_params
*params
);
1216 /********************* VLAN-MAC ****************/
1217 void bnx2x_init_mac_obj(struct bnx2x
*bp
,
1218 struct bnx2x_vlan_mac_obj
*mac_obj
,
1219 u8 cl_id
, u32 cid
, u8 func_id
, void *rdata
,
1220 dma_addr_t rdata_mapping
, int state
,
1221 unsigned long *pstate
, bnx2x_obj_type type
,
1222 struct bnx2x_credit_pool_obj
*macs_pool
);
1224 void bnx2x_init_vlan_obj(struct bnx2x
*bp
,
1225 struct bnx2x_vlan_mac_obj
*vlan_obj
,
1226 u8 cl_id
, u32 cid
, u8 func_id
, void *rdata
,
1227 dma_addr_t rdata_mapping
, int state
,
1228 unsigned long *pstate
, bnx2x_obj_type type
,
1229 struct bnx2x_credit_pool_obj
*vlans_pool
);
1231 void bnx2x_init_vlan_mac_obj(struct bnx2x
*bp
,
1232 struct bnx2x_vlan_mac_obj
*vlan_mac_obj
,
1233 u8 cl_id
, u32 cid
, u8 func_id
, void *rdata
,
1234 dma_addr_t rdata_mapping
, int state
,
1235 unsigned long *pstate
, bnx2x_obj_type type
,
1236 struct bnx2x_credit_pool_obj
*macs_pool
,
1237 struct bnx2x_credit_pool_obj
*vlans_pool
);
1239 int bnx2x_config_vlan_mac(struct bnx2x
*bp
,
1240 struct bnx2x_vlan_mac_ramrod_params
*p
);
1242 int bnx2x_vlan_mac_move(struct bnx2x
*bp
,
1243 struct bnx2x_vlan_mac_ramrod_params
*p
,
1244 struct bnx2x_vlan_mac_obj
*dest_o
);
1246 /********************* RX MODE ****************/
1248 void bnx2x_init_rx_mode_obj(struct bnx2x
*bp
,
1249 struct bnx2x_rx_mode_obj
*o
);
1252 * Send and RX_MODE ramrod according to the provided parameters.
1255 * @param p Command parameters
1257 * @return 0 - if operation was successfull and there is no pending completions,
1258 * positive number - if there are pending completions,
1259 * negative - if there were errors
1261 int bnx2x_config_rx_mode(struct bnx2x
*bp
,
1262 struct bnx2x_rx_mode_ramrod_params
*p
);
1264 /****************** MULTICASTS ****************/
1266 void bnx2x_init_mcast_obj(struct bnx2x
*bp
,
1267 struct bnx2x_mcast_obj
*mcast_obj
,
1268 u8 mcast_cl_id
, u32 mcast_cid
, u8 func_id
,
1269 u8 engine_id
, void *rdata
, dma_addr_t rdata_mapping
,
1270 int state
, unsigned long *pstate
,
1271 bnx2x_obj_type type
);
1274 * Configure multicast MACs list. May configure a new list
1275 * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
1276 * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
1277 * configuration, continue to execute the pending commands
1278 * (BNX2X_MCAST_CMD_CONT).
1280 * If previous command is still pending or if number of MACs to
1281 * configure is more that maximum number of MACs in one command,
1282 * the current command will be enqueued to the tail of the
1283 * pending commands list.
1287 * @param command to execute: BNX2X_MCAST_CMD_X
1289 * @return 0 is operation was sucessfull and there are no pending completions,
1290 * negative if there were errors, positive if there are pending
1293 int bnx2x_config_mcast(struct bnx2x
*bp
,
1294 struct bnx2x_mcast_ramrod_params
*p
, int cmd
);
1296 /****************** CREDIT POOL ****************/
1297 void bnx2x_init_mac_credit_pool(struct bnx2x
*bp
,
1298 struct bnx2x_credit_pool_obj
*p
, u8 func_id
,
1300 void bnx2x_init_vlan_credit_pool(struct bnx2x
*bp
,
1301 struct bnx2x_credit_pool_obj
*p
, u8 func_id
,
1305 /****************** RSS CONFIGURATION ****************/
1306 void bnx2x_init_rss_config_obj(struct bnx2x
*bp
,
1307 struct bnx2x_rss_config_obj
*rss_obj
,
1308 u8 cl_id
, u32 cid
, u8 func_id
, u8 engine_id
,
1309 void *rdata
, dma_addr_t rdata_mapping
,
1310 int state
, unsigned long *pstate
,
1311 bnx2x_obj_type type
);
1314 * Updates RSS configuration according to provided parameters.
1319 * @return 0 in case of success
1321 int bnx2x_config_rss(struct bnx2x
*bp
,
1322 struct bnx2x_config_rss_params
*p
);
1325 * Return the current ind_table configuration.
1328 * @param ind_table buffer to fill with the current indirection
1329 * table content. Should be at least
1330 * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
1332 void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj
*rss_obj
,
1335 #endif /* BNX2X_SP_VERBS */