drivers/net/ethernet/emulex/benet/be.h

   1 /*
   2  * Copyright (C) 2005 - 2011 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 #ifndef BE_H
  19 #define BE_H
  20
  21 #include <linux/pci.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/delay.h>
  24 #include <net/tcp.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27 #include <linux/if_vlan.h>
  28 #include <linux/workqueue.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/firmware.h>
  31 #include <linux/slab.h>
  32 #include <linux/u64_stats_sync.h>
  33
  34 #include "be_hw.h"
  35
  36 #define DRV_VER                 "4.2.116u"
  37 #define DRV_NAME                "be2net"
  38 #define BE_NAME                 "ServerEngines BladeEngine2 10Gbps NIC"
  39 #define BE3_NAME                "ServerEngines BladeEngine3 10Gbps NIC"
  40 #define OC_NAME                 "Emulex OneConnect 10Gbps NIC"
  41 #define OC_NAME_BE              OC_NAME "(be3)"
  42 #define OC_NAME_LANCER          OC_NAME "(Lancer)"
  43 #define OC_NAME_SH              OC_NAME "(Skyhawk)"
  44 #define DRV_DESC                "ServerEngines BladeEngine 10Gbps NIC Driver"
  45
  46 #define BE_VENDOR_ID            0x19a2
  47 #define EMULEX_VENDOR_ID        0x10df
  48 #define BE_DEVICE_ID1           0x211
  49 #define BE_DEVICE_ID2           0x221
  50 #define OC_DEVICE_ID1           0x700   /* Device Id for BE2 cards */
  51 #define OC_DEVICE_ID2           0x710   /* Device Id for BE3 cards */
  52 #define OC_DEVICE_ID3           0xe220  /* Device id for Lancer cards */
  53 #define OC_DEVICE_ID4           0xe228   /* Device id for VF in Lancer */
  54 #define OC_DEVICE_ID5           0x720   /* Device Id for Skyhawk cards */
  55 #define OC_SUBSYS_DEVICE_ID1    0xE602
  56 #define OC_SUBSYS_DEVICE_ID2    0xE642
  57 #define OC_SUBSYS_DEVICE_ID3    0xE612
  58 #define OC_SUBSYS_DEVICE_ID4    0xE652
  59
  60 static inline char *nic_name(struct pci_dev *pdev)
  61 {
  62         switch (pdev->device) {
  63         case OC_DEVICE_ID1:
  64                 return OC_NAME;
  65         case OC_DEVICE_ID2:
  66                 return OC_NAME_BE;
  67         case OC_DEVICE_ID3:
  68         case OC_DEVICE_ID4:
  69                 return OC_NAME_LANCER;
  70         case BE_DEVICE_ID2:
  71                 return BE3_NAME;
  72         case OC_DEVICE_ID5:
  73                 return OC_NAME_SH;
  74         default:
  75                 return BE_NAME;
  76         }
  77 }
  78
  79 /* Number of bytes of an RX frame that are copied to skb->data */
  80 #define BE_HDR_LEN              ((u16) 64)
  81 /* allocate extra space to allow tunneling decapsulation without head reallocation */
  82 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64)
  83
  84 #define BE_MAX_JUMBO_FRAME_SIZE 9018
  85 #define BE_MIN_MTU              256
  86
  87 #define BE_NUM_VLANS_SUPPORTED  64
  88 #define BE_MAX_EQD              96u
  89 #define BE_MAX_TX_FRAG_COUNT    30
  90
  91 #define EVNT_Q_LEN              1024
  92 #define TX_Q_LEN                2048
  93 #define TX_CQ_LEN               1024
  94 #define RX_Q_LEN                1024    /* Does not support any other value */
  95 #define RX_CQ_LEN               1024
  96 #define MCC_Q_LEN               128     /* total size not to exceed 8 pages */
  97 #define MCC_CQ_LEN              256
  98
  99 #define BE3_MAX_RSS_QS          8
 100 #define BE2_MAX_RSS_QS          4
 101 #define MAX_RSS_QS              BE3_MAX_RSS_QS
 102 #define MAX_RX_QS               (MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
 103
 104 #define MAX_TX_QS               8
 105 #define MAX_MSIX_VECTORS        MAX_RSS_QS
 106 #define BE_TX_BUDGET            256
 107 #define BE_NAPI_WEIGHT          64
 108 #define MAX_RX_POST             BE_NAPI_WEIGHT /* Frags posted at a time */
 109 #define RX_FRAGS_REFILL_WM      (RX_Q_LEN - MAX_RX_POST)
 110
 111 #define FW_VER_LEN              32
 112
 113 struct be_dma_mem {
 114         void *va;
 115         dma_addr_t dma;
 116         u32 size;
 117 };
 118
 119 struct be_queue_info {
 120         struct be_dma_mem dma_mem;
 121         u16 len;
 122         u16 entry_size; /* Size of an element in the queue */
 123         u16 id;
 124         u16 tail, head;
 125         bool created;
 126         atomic_t used;  /* Number of valid elements in the queue */
 127 };
 128
 129 static inline u32 MODULO(u16 val, u16 limit)
 130 {
 131         BUG_ON(limit & (limit - 1));
 132         return val & (limit - 1);
 133 }
 134
 135 static inline void index_adv(u16 *index, u16 val, u16 limit)
 136 {
 137         *index = MODULO((*index + val), limit);
 138 }
 139
 140 static inline void index_inc(u16 *index, u16 limit)
 141 {
 142         *index = MODULO((*index + 1), limit);
 143 }
 144
 145 static inline void *queue_head_node(struct be_queue_info *q)
 146 {
 147         return q->dma_mem.va + q->head * q->entry_size;
 148 }
 149
 150 static inline void *queue_tail_node(struct be_queue_info *q)
 151 {
 152         return q->dma_mem.va + q->tail * q->entry_size;
 153 }
 154
 155 static inline void *queue_index_node(struct be_queue_info *q, u16 index)
 156 {
 157         return q->dma_mem.va + index * q->entry_size;
 158 }
 159
 160 static inline void queue_head_inc(struct be_queue_info *q)
 161 {
 162         index_inc(&q->head, q->len);
 163 }
 164
 165 static inline void queue_tail_inc(struct be_queue_info *q)
 166 {
 167         index_inc(&q->tail, q->len);
 168 }
 169
 170 struct be_eq_obj {
 171         struct be_queue_info q;
 172         char desc[32];
 173
 174         /* Adaptive interrupt coalescing (AIC) info */
 175         bool enable_aic;
 176         u32 min_eqd;            /* in usecs */
 177         u32 max_eqd;            /* in usecs */
 178         u32 eqd;                /* configured val when aic is off */
 179         u32 cur_eqd;            /* in usecs */
 180
 181         u8 idx;                 /* array index */
 182         u16 tx_budget;
 183         struct napi_struct napi;
 184         struct be_adapter *adapter;
 185 } ____cacheline_aligned_in_smp;
 186
 187 struct be_mcc_obj {
 188         struct be_queue_info q;
 189         struct be_queue_info cq;
 190         bool rearm_cq;
 191 };
 192
 193 struct be_tx_stats {
 194         u64 tx_bytes;
 195         u64 tx_pkts;
 196         u64 tx_reqs;
 197         u64 tx_wrbs;
 198         u64 tx_compl;
 199         ulong tx_jiffies;
 200         u32 tx_stops;
 201         struct u64_stats_sync sync;
 202         struct u64_stats_sync sync_compl;
 203 };
 204
 205 struct be_tx_obj {
 206         struct be_queue_info q;
 207         struct be_queue_info cq;
 208         /* Remember the skbs that were transmitted */
 209         struct sk_buff *sent_skb_list[TX_Q_LEN];
 210         struct be_tx_stats stats;
 211 } ____cacheline_aligned_in_smp;
 212
 213 /* Struct to remember the pages posted for rx frags */
 214 struct be_rx_page_info {
 215         struct page *page;
 216         DEFINE_DMA_UNMAP_ADDR(bus);
 217         u16 page_offset;
 218         bool last_page_user;
 219 };
 220
 221 struct be_rx_stats {
 222         u64 rx_bytes;
 223         u64 rx_pkts;
 224         u64 rx_pkts_prev;
 225         ulong rx_jiffies;
 226         u32 rx_drops_no_skbs;   /* skb allocation errors */
 227         u32 rx_drops_no_frags;  /* HW has no fetched frags */
 228         u32 rx_post_fail;       /* page post alloc failures */
 229         u32 rx_compl;
 230         u32 rx_mcast_pkts;
 231         u32 rx_compl_err;       /* completions with err set */
 232         u32 rx_pps;             /* pkts per second */
 233         struct u64_stats_sync sync;
 234 };
 235
 236 struct be_rx_compl_info {
 237         u32 rss_hash;
 238         u16 vlan_tag;
 239         u16 pkt_size;
 240         u16 rxq_idx;
 241         u16 port;
 242         u8 vlanf;
 243         u8 num_rcvd;
 244         u8 err;
 245         u8 ipf;
 246         u8 tcpf;
 247         u8 udpf;
 248         u8 ip_csum;
 249         u8 l4_csum;
 250         u8 ipv6;
 251         u8 vtm;
 252         u8 pkt_type;
 253 };
 254
 255 struct be_rx_obj {
 256         struct be_adapter *adapter;
 257         struct be_queue_info q;
 258         struct be_queue_info cq;
 259         struct be_rx_compl_info rxcp;
 260         struct be_rx_page_info page_info_tbl[RX_Q_LEN];
 261         struct be_rx_stats stats;
 262         u8 rss_id;
 263         bool rx_post_starved;   /* Zero rx frags have been posted to BE */
 264 } ____cacheline_aligned_in_smp;
 265
 266 struct be_drv_stats {
 267         u32 be_on_die_temperature;
 268         u32 eth_red_drops;
 269         u32 rx_drops_no_pbuf;
 270         u32 rx_drops_no_txpb;
 271         u32 rx_drops_no_erx_descr;
 272         u32 rx_drops_no_tpre_descr;
 273         u32 rx_drops_too_many_frags;
 274         u32 forwarded_packets;
 275         u32 rx_drops_mtu;
 276         u32 rx_crc_errors;
 277         u32 rx_alignment_symbol_errors;
 278         u32 rx_pause_frames;
 279         u32 rx_priority_pause_frames;
 280         u32 rx_control_frames;
 281         u32 rx_in_range_errors;
 282         u32 rx_out_range_errors;
 283         u32 rx_frame_too_long;
 284         u32 rx_address_mismatch_drops;
 285         u32 rx_dropped_too_small;
 286         u32 rx_dropped_too_short;
 287         u32 rx_dropped_header_too_small;
 288         u32 rx_dropped_tcp_length;
 289         u32 rx_dropped_runt;
 290         u32 rx_ip_checksum_errs;
 291         u32 rx_tcp_checksum_errs;
 292         u32 rx_udp_checksum_errs;
 293         u32 tx_pauseframes;
 294         u32 tx_priority_pauseframes;
 295         u32 tx_controlframes;
 296         u32 rxpp_fifo_overflow_drop;
 297         u32 rx_input_fifo_overflow_drop;
 298         u32 pmem_fifo_overflow_drop;
 299         u32 jabber_events;
 300 };
 301
 302 struct be_vf_cfg {
 303         unsigned char mac_addr[ETH_ALEN];
 304         int if_handle;
 305         int pmac_id;
 306         u16 def_vid;
 307         u16 vlan_tag;
 308         u32 tx_rate;
 309 };
 310
 311 #define BE_FLAGS_LINK_STATUS_INIT               1
 312 #define BE_FLAGS_WORKER_SCHEDULED               (1 << 3)
 313 #define BE_UC_PMAC_COUNT                30
 314 #define BE_VF_UC_PMAC_COUNT             2
 315
 316 struct be_adapter {
 317         struct pci_dev *pdev;
 318         struct net_device *netdev;
 319
 320         u8 __iomem *csr;
 321         u8 __iomem *db;         /* Door Bell */
 322
 323         struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
 324         struct be_dma_mem mbox_mem;
 325         /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
 326          * is stored for freeing purpose */
 327         struct be_dma_mem mbox_mem_alloced;
 328
 329         struct be_mcc_obj mcc_obj;
 330         spinlock_t mcc_lock;    /* For serializing mcc cmds to BE card */
 331         spinlock_t mcc_cq_lock;
 332
 333         u32 num_msix_vec;
 334         u32 num_evt_qs;
 335         struct be_eq_obj eq_obj[MAX_MSIX_VECTORS];
 336         struct msix_entry msix_entries[MAX_MSIX_VECTORS];
 337         bool isr_registered;
 338
 339         /* TX Rings */
 340         u32 num_tx_qs;
 341         struct be_tx_obj tx_obj[MAX_TX_QS];
 342
 343         /* Rx rings */
 344         u32 num_rx_qs;
 345         struct be_rx_obj rx_obj[MAX_RX_QS];
 346         u32 big_page_size;      /* Compounded page size shared by rx wrbs */
 347
 348         u8 eq_next_idx;
 349         struct be_drv_stats drv_stats;
 350
 351         u16 vlans_added;
 352         u16 max_vlans;  /* Number of vlans supported */
 353         u8 vlan_tag[VLAN_N_VID];
 354         u8 vlan_prio_bmap;      /* Available Priority BitMap */
 355         u16 recommended_prio;   /* Recommended Priority */
 356         struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
 357
 358         struct be_dma_mem stats_cmd;
 359         /* Work queue used to perform periodic tasks like getting statistics */
 360         struct delayed_work work;
 361         u16 work_counter;
 362
 363         u32 flags;
 364         /* Ethtool knobs and info */
 365         char fw_ver[FW_VER_LEN];
 366         int if_handle;          /* Used to configure filtering */
 367         u32 *pmac_id;           /* MAC addr handle used by BE card */
 368         u32 beacon_state;       /* for set_phys_id */
 369
 370         bool eeh_err;
 371         bool ue_detected;
 372         bool fw_timeout;
 373         u32 port_num;
 374         bool promiscuous;
 375         u32 function_mode;
 376         u32 function_caps;
 377         u32 rx_fc;              /* Rx flow control */
 378         u32 tx_fc;              /* Tx flow control */
 379         bool stats_cmd_sent;
 380         int link_speed;
 381         u8 port_type;
 382         u8 transceiver;
 383         u8 autoneg;
 384         u8 generation;          /* BladeEngine ASIC generation */
 385         u32 flash_status;
 386         struct completion flash_compl;
 387
 388         u32 num_vfs;
 389         u8 is_virtfn;
 390         struct be_vf_cfg *vf_cfg;
 391         bool be3_native;
 392         u32 sli_family;
 393         u8 hba_port_num;
 394         u16 pvid;
 395         u8 wol_cap;
 396         bool wol;
 397         u32 max_pmac_cnt;       /* Max secondary UC MACs programmable */
 398         u32 uc_macs;            /* Count of secondary UC MAC programmed */
 399 };
 400
 401 #define be_physfn(adapter) (!adapter->is_virtfn)
 402 #define sriov_enabled(adapter)          (adapter->num_vfs > 0)
 403 #define for_all_vfs(adapter, vf_cfg, i)                                 \
 404         for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \
 405                 i++, vf_cfg++)
 406
 407 /* BladeEngine Generation numbers */
 408 #define BE_GEN2 2
 409 #define BE_GEN3 3
 410
 411 #define ON                              1
 412 #define OFF                             0
 413 #define lancer_chip(adapter)    ((adapter->pdev->device == OC_DEVICE_ID3) || \
 414                                  (adapter->pdev->device == OC_DEVICE_ID4))
 415
 416 extern const struct ethtool_ops be_ethtool_ops;
 417
 418 #define msix_enabled(adapter)           (adapter->num_msix_vec > 0)
 419 #define num_irqs(adapter)               (msix_enabled(adapter) ?        \
 420                                                 adapter->num_msix_vec : 1)
 421 #define tx_stats(txo)                   (&(txo)->stats)
 422 #define rx_stats(rxo)                   (&(rxo)->stats)
 423
 424 /* The default RXQ is the last RXQ */
 425 #define default_rxo(adpt)               (&adpt->rx_obj[adpt->num_rx_qs - 1])
 426
 427 #define for_all_rx_queues(adapter, rxo, i)                              \
 428         for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;  \
 429                 i++, rxo++)
 430
 431 /* Skip the default non-rss queue (last one)*/
 432 #define for_all_rss_queues(adapter, rxo, i)                             \
 433         for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\
 434                 i++, rxo++)
 435
 436 #define for_all_tx_queues(adapter, txo, i)                              \
 437         for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;  \
 438                 i++, txo++)
 439
 440 #define for_all_evt_queues(adapter, eqo, i)                             \
 441         for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \
 442                 i++, eqo++)
 443
 444 #define is_mcc_eqo(eqo)                 (eqo->idx == 0)
 445 #define mcc_eqo(adapter)                (&adapter->eq_obj[0])
 446
 447 #define PAGE_SHIFT_4K           12
 448 #define PAGE_SIZE_4K            (1 << PAGE_SHIFT_4K)
 449
 450 /* Returns number of pages spanned by the data starting at the given addr */
 451 #define PAGES_4K_SPANNED(_address, size)                                \
 452                 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) +     \
 453                         (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
 454
 455 /* Returns bit offset within a DWORD of a bitfield */
 456 #define AMAP_BIT_OFFSET(_struct, field)                                 \
 457                 (((size_t)&(((_struct *)0)->field))%32)
 458
 459 /* Returns the bit mask of the field that is NOT shifted into location. */
 460 static inline u32 amap_mask(u32 bitsize)
 461 {
 462         return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
 463 }
 464
 465 static inline void
 466 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
 467 {
 468         u32 *dw = (u32 *) ptr + dw_offset;
 469         *dw &= ~(mask << offset);
 470         *dw |= (mask & value) << offset;
 471 }
 472
 473 #define AMAP_SET_BITS(_struct, field, ptr, val)                         \
 474                 amap_set(ptr,                                           \
 475                         offsetof(_struct, field)/32,                    \
 476                         amap_mask(sizeof(((_struct *)0)->field)),       \
 477                         AMAP_BIT_OFFSET(_struct, field),                \
 478                         val)
 479
 480 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
 481 {
 482         u32 *dw = (u32 *) ptr;
 483         return mask & (*(dw + dw_offset) >> offset);
 484 }
 485
 486 #define AMAP_GET_BITS(_struct, field, ptr)                              \
 487                 amap_get(ptr,                                           \
 488                         offsetof(_struct, field)/32,                    \
 489                         amap_mask(sizeof(((_struct *)0)->field)),       \
 490                         AMAP_BIT_OFFSET(_struct, field))
 491
 492 #define be_dws_cpu_to_le(wrb, len)      swap_dws(wrb, len)
 493 #define be_dws_le_to_cpu(wrb, len)      swap_dws(wrb, len)
 494 static inline void swap_dws(void *wrb, int len)
 495 {
 496 #ifdef __BIG_ENDIAN
 497         u32 *dw = wrb;
 498         BUG_ON(len % 4);
 499         do {
 500                 *dw = cpu_to_le32(*dw);
 501                 dw++;
 502                 len -= 4;
 503         } while (len);
 504 #endif                          /* __BIG_ENDIAN */
 505 }
 506
 507 static inline u8 is_tcp_pkt(struct sk_buff *skb)
 508 {
 509         u8 val = 0;
 510
 511         if (ip_hdr(skb)->version == 4)
 512                 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
 513         else if (ip_hdr(skb)->version == 6)
 514                 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
 515
 516         return val;
 517 }
 518
 519 static inline u8 is_udp_pkt(struct sk_buff *skb)
 520 {
 521         u8 val = 0;
 522
 523         if (ip_hdr(skb)->version == 4)
 524                 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
 525         else if (ip_hdr(skb)->version == 6)
 526                 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
 527
 528         return val;
 529 }
 530
 531 static inline void be_check_sriov_fn_type(struct be_adapter *adapter)
 532 {
 533         u32 sli_intf;
 534
 535         pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
 536         adapter->is_virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
 537 }
 538
 539 static inline bool is_ipv4_pkt(struct sk_buff *skb)
 540 {
 541         return skb->protocol == ntohs(ETH_P_IP) && ip_hdr(skb)->version == 4;
 542 }
 543
 544 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
 545 {
 546         u32 addr;
 547
 548         addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
 549
 550         mac[5] = (u8)(addr & 0xFF);
 551         mac[4] = (u8)((addr >> 8) & 0xFF);
 552         mac[3] = (u8)((addr >> 16) & 0xFF);
 553         /* Use the OUI from the current MAC address */
 554         memcpy(mac, adapter->netdev->dev_addr, 3);
 555 }
 556
 557 static inline bool be_multi_rxq(const struct be_adapter *adapter)
 558 {
 559         return adapter->num_rx_qs > 1;
 560 }
 561
 562 static inline bool be_error(struct be_adapter *adapter)
 563 {
 564         return adapter->eeh_err || adapter->ue_detected || adapter->fw_timeout;
 565 }
 566
 567 static inline bool be_is_wol_excluded(struct be_adapter *adapter)
 568 {
 569         struct pci_dev *pdev = adapter->pdev;
 570
 571         if (!be_physfn(adapter))
 572                 return true;
 573
 574         switch (pdev->subsystem_device) {
 575         case OC_SUBSYS_DEVICE_ID1:
 576         case OC_SUBSYS_DEVICE_ID2:
 577         case OC_SUBSYS_DEVICE_ID3:
 578         case OC_SUBSYS_DEVICE_ID4:
 579                 return true;
 580         default:
 581                 return false;
 582         }
 583 }
 584
 585 extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
 586                 u16 num_popped);
 587 extern void be_link_status_update(struct be_adapter *adapter, u8 link_status);
 588 extern void be_parse_stats(struct be_adapter *adapter);
 589 extern int be_load_fw(struct be_adapter *adapter, u8 *func);
 590 extern bool be_is_wol_supported(struct be_adapter *adapter);
 591 #endif                          /* BE_H */