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Linux 3.4.102
[linux/fpc-iii.git] / drivers / net / ethernet / sfc / efx.c
bloba87f3510741a40b9dd7c54747ab74bd33dbc245a
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
26 #include "efx.h"
27 #include "nic.h"
28 #include "selftest.h"
29
30 #include "mcdi.h"
31 #include "workarounds.h"
32
33 /**************************************************************************
34 *
35 * Type name strings
36 *
37 **************************************************************************
38 */
39
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
70 };
71
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_WORLD] = "WORLD",
77 [RESET_TYPE_DISABLE] = "DISABLE",
78 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
79 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
80 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
81 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
82 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
83 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
84 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
85 };
86
87 #define EFX_MAX_MTU (9 * 1024)
88
89 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
90 * queued onto this work queue. This is not a per-nic work queue, because
91 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 */
93 static struct workqueue_struct *reset_workqueue;
94
95 /**************************************************************************
96 *
97 * Configurable values
98 *
99 *************************************************************************/
100
101 /*
102 * Use separate channels for TX and RX events
103 *
104 * Set this to 1 to use separate channels for TX and RX. It allows us
105 * to control interrupt affinity separately for TX and RX.
106 *
107 * This is only used in MSI-X interrupt mode
108 */
109 static unsigned int separate_tx_channels;
110 module_param(separate_tx_channels, uint, 0444);
111 MODULE_PARM_DESC(separate_tx_channels,
112 "Use separate channels for TX and RX");
113
114 /* This is the weight assigned to each of the (per-channel) virtual
115 * NAPI devices.
116 */
117 static int napi_weight = 64;
118
119 /* This is the time (in jiffies) between invocations of the hardware
120 * monitor. On Falcon-based NICs, this will:
121 * - Check the on-board hardware monitor;
122 * - Poll the link state and reconfigure the hardware as necessary.
123 */
124 static unsigned int efx_monitor_interval = 1 * HZ;
125
126 /* Initial interrupt moderation settings. They can be modified after
127 * module load with ethtool.
128 *
129 * The default for RX should strike a balance between increasing the
130 * round-trip latency and reducing overhead.
131 */
132 static unsigned int rx_irq_mod_usec = 60;
133
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
136 *
137 * This default is chosen to ensure that a 10G link does not go idle
138 * while a TX queue is stopped after it has become full. A queue is
139 * restarted when it drops below half full. The time this takes (assuming
140 * worst case 3 descriptors per packet and 1024 descriptors) is
141 * 512 / 3 * 1.2 = 205 usec.
142 */
143 static unsigned int tx_irq_mod_usec = 150;
144
145 /* This is the first interrupt mode to try out of:
146 * 0 => MSI-X
147 * 1 => MSI
148 * 2 => legacy
149 */
150 static unsigned int interrupt_mode;
151
152 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
153 * i.e. the number of CPUs among which we may distribute simultaneous
154 * interrupt handling.
155 *
156 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
157 * The default (0) means to assign an interrupt to each core.
158 */
159 static unsigned int rss_cpus;
160 module_param(rss_cpus, uint, 0444);
161 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
162
163 static int phy_flash_cfg;
164 module_param(phy_flash_cfg, int, 0644);
165 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
166
167 static unsigned irq_adapt_low_thresh = 8000;
168 module_param(irq_adapt_low_thresh, uint, 0644);
169 MODULE_PARM_DESC(irq_adapt_low_thresh,
170 "Threshold score for reducing IRQ moderation");
171
172 static unsigned irq_adapt_high_thresh = 16000;
173 module_param(irq_adapt_high_thresh, uint, 0644);
174 MODULE_PARM_DESC(irq_adapt_high_thresh,
175 "Threshold score for increasing IRQ moderation");
176
177 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
178 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
179 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
180 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
181 module_param(debug, uint, 0);
182 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
183
184 /**************************************************************************
185 *
186 * Utility functions and prototypes
187 *
188 *************************************************************************/
189
190 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq);
191 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq);
192 static void efx_remove_channel(struct efx_channel *channel);
193 static void efx_remove_channels(struct efx_nic *efx);
194 static const struct efx_channel_type efx_default_channel_type;
195 static void efx_remove_port(struct efx_nic *efx);
196 static void efx_init_napi_channel(struct efx_channel *channel);
197 static void efx_fini_napi(struct efx_nic *efx);
198 static void efx_fini_napi_channel(struct efx_channel *channel);
199 static void efx_fini_struct(struct efx_nic *efx);
200 static void efx_start_all(struct efx_nic *efx);
201 static void efx_stop_all(struct efx_nic *efx);
202
203 #define EFX_ASSERT_RESET_SERIALISED(efx) \
204 do { \
205 if ((efx->state == STATE_RUNNING) || \
206 (efx->state == STATE_DISABLED)) \
207 ASSERT_RTNL(); \
208 } while (0)
209
210 /**************************************************************************
211 *
212 * Event queue processing
213 *
214 *************************************************************************/
215
216 /* Process channel's event queue
217 *
218 * This function is responsible for processing the event queue of a
219 * single channel. The caller must guarantee that this function will
220 * never be concurrently called more than once on the same channel,
221 * though different channels may be being processed concurrently.
222 */
223 static int efx_process_channel(struct efx_channel *channel, int budget)
224 {
225 int spent;
226
227 if (unlikely(!channel->enabled))
228 return 0;
229
230 spent = efx_nic_process_eventq(channel, budget);
231 if (spent && efx_channel_has_rx_queue(channel)) {
232 struct efx_rx_queue *rx_queue =
233 efx_channel_get_rx_queue(channel);
234
235 /* Deliver last RX packet. */
236 if (channel->rx_pkt) {
237 __efx_rx_packet(channel, channel->rx_pkt);
238 channel->rx_pkt = NULL;
239 }
240 if (rx_queue->enabled) {
241 efx_rx_strategy(channel);
242 efx_fast_push_rx_descriptors(rx_queue);
243 }
244 }
245
246 return spent;
247 }
248
249 /* Mark channel as finished processing
250 *
251 * Note that since we will not receive further interrupts for this
252 * channel before we finish processing and call the eventq_read_ack()
253 * method, there is no need to use the interrupt hold-off timers.
254 */
255 static inline void efx_channel_processed(struct efx_channel *channel)
256 {
257 /* The interrupt handler for this channel may set work_pending
258 * as soon as we acknowledge the events we've seen. Make sure
259 * it's cleared before then. */
260 channel->work_pending = false;
261 smp_wmb();
262
263 efx_nic_eventq_read_ack(channel);
264 }
265
266 /* NAPI poll handler
267 *
268 * NAPI guarantees serialisation of polls of the same device, which
269 * provides the guarantee required by efx_process_channel().
270 */
271 static int efx_poll(struct napi_struct *napi, int budget)
272 {
273 struct efx_channel *channel =
274 container_of(napi, struct efx_channel, napi_str);
275 struct efx_nic *efx = channel->efx;
276 int spent;
277
278 netif_vdbg(efx, intr, efx->net_dev,
279 "channel %d NAPI poll executing on CPU %d\n",
280 channel->channel, raw_smp_processor_id());
281
282 spent = efx_process_channel(channel, budget);
283
284 if (spent < budget) {
285 if (efx_channel_has_rx_queue(channel) &&
286 efx->irq_rx_adaptive &&
287 unlikely(++channel->irq_count == 1000)) {
288 if (unlikely(channel->irq_mod_score <
289 irq_adapt_low_thresh)) {
290 if (channel->irq_moderation > 1) {
291 channel->irq_moderation -= 1;
292 efx->type->push_irq_moderation(channel);
293 }
294 } else if (unlikely(channel->irq_mod_score >
295 irq_adapt_high_thresh)) {
296 if (channel->irq_moderation <
297 efx->irq_rx_moderation) {
298 channel->irq_moderation += 1;
299 efx->type->push_irq_moderation(channel);
300 }
301 }
302 channel->irq_count = 0;
303 channel->irq_mod_score = 0;
304 }
305
306 efx_filter_rfs_expire(channel);
307
308 /* There is no race here; although napi_disable() will
309 * only wait for napi_complete(), this isn't a problem
310 * since efx_channel_processed() will have no effect if
311 * interrupts have already been disabled.
312 */
313 napi_complete(napi);
314 efx_channel_processed(channel);
315 }
316
317 return spent;
318 }
319
320 /* Process the eventq of the specified channel immediately on this CPU
321 *
322 * Disable hardware generated interrupts, wait for any existing
323 * processing to finish, then directly poll (and ack ) the eventq.
324 * Finally reenable NAPI and interrupts.
325 *
326 * This is for use only during a loopback self-test. It must not
327 * deliver any packets up the stack as this can result in deadlock.
328 */
329 void efx_process_channel_now(struct efx_channel *channel)
330 {
331 struct efx_nic *efx = channel->efx;
332
333 BUG_ON(channel->channel >= efx->n_channels);
334 BUG_ON(!channel->enabled);
335 BUG_ON(!efx->loopback_selftest);
336
337 /* Disable interrupts and wait for ISRs to complete */
338 efx_nic_disable_interrupts(efx);
339 if (efx->legacy_irq) {
340 synchronize_irq(efx->legacy_irq);
341 efx->legacy_irq_enabled = false;
342 }
343 if (channel->irq)
344 synchronize_irq(channel->irq);
345
346 /* Wait for any NAPI processing to complete */
347 napi_disable(&channel->napi_str);
348
349 /* Poll the channel */
350 efx_process_channel(channel, channel->eventq_mask + 1);
351
352 /* Ack the eventq. This may cause an interrupt to be generated
353 * when they are reenabled */
354 efx_channel_processed(channel);
355
356 napi_enable(&channel->napi_str);
357 if (efx->legacy_irq)
358 efx->legacy_irq_enabled = true;
359 efx_nic_enable_interrupts(efx);
360 }
361
362 /* Create event queue
363 * Event queue memory allocations are done only once. If the channel
364 * is reset, the memory buffer will be reused; this guards against
365 * errors during channel reset and also simplifies interrupt handling.
366 */
367 static int efx_probe_eventq(struct efx_channel *channel)
368 {
369 struct efx_nic *efx = channel->efx;
370 unsigned long entries;
371
372 netif_dbg(efx, probe, efx->net_dev,
373 "chan %d create event queue\n", channel->channel);
374
375 /* Build an event queue with room for one event per tx and rx buffer,
376 * plus some extra for link state events and MCDI completions. */
377 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
378 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
379 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
380
381 return efx_nic_probe_eventq(channel);
382 }
383
384 /* Prepare channel's event queue */
385 static void efx_init_eventq(struct efx_channel *channel)
386 {
387 netif_dbg(channel->efx, drv, channel->efx->net_dev,
388 "chan %d init event queue\n", channel->channel);
389
390 channel->eventq_read_ptr = 0;
391
392 efx_nic_init_eventq(channel);
393 }
394
395 /* Enable event queue processing and NAPI */
396 static void efx_start_eventq(struct efx_channel *channel)
397 {
398 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
399 "chan %d start event queue\n", channel->channel);
400
401 /* The interrupt handler for this channel may set work_pending
402 * as soon as we enable it. Make sure it's cleared before
403 * then. Similarly, make sure it sees the enabled flag set.
404 */
405 channel->work_pending = false;
406 channel->enabled = true;
407 smp_wmb();
408
409 napi_enable(&channel->napi_str);
410 efx_nic_eventq_read_ack(channel);
411 }
412
413 /* Disable event queue processing and NAPI */
414 static void efx_stop_eventq(struct efx_channel *channel)
415 {
416 if (!channel->enabled)
417 return;
418
419 napi_disable(&channel->napi_str);
420 channel->enabled = false;
421 }
422
423 static void efx_fini_eventq(struct efx_channel *channel)
424 {
425 netif_dbg(channel->efx, drv, channel->efx->net_dev,
426 "chan %d fini event queue\n", channel->channel);
427
428 efx_nic_fini_eventq(channel);
429 }
430
431 static void efx_remove_eventq(struct efx_channel *channel)
432 {
433 netif_dbg(channel->efx, drv, channel->efx->net_dev,
434 "chan %d remove event queue\n", channel->channel);
435
436 efx_nic_remove_eventq(channel);
437 }
438
439 /**************************************************************************
440 *
441 * Channel handling
442 *
443 *************************************************************************/
444
445 /* Allocate and initialise a channel structure. */
446 static struct efx_channel *
447 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
448 {
449 struct efx_channel *channel;
450 struct efx_rx_queue *rx_queue;
451 struct efx_tx_queue *tx_queue;
452 int j;
453
454 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
455 if (!channel)
456 return NULL;
457
458 channel->efx = efx;
459 channel->channel = i;
460 channel->type = &efx_default_channel_type;
461
462 for (j = 0; j < EFX_TXQ_TYPES; j++) {
463 tx_queue = &channel->tx_queue[j];
464 tx_queue->efx = efx;
465 tx_queue->queue = i * EFX_TXQ_TYPES + j;
466 tx_queue->channel = channel;
467 }
468
469 rx_queue = &channel->rx_queue;
470 rx_queue->efx = efx;
471 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
472 (unsigned long)rx_queue);
473
474 return channel;
475 }
476
477 /* Allocate and initialise a channel structure, copying parameters
478 * (but not resources) from an old channel structure.
479 */
480 static struct efx_channel *
481 efx_copy_channel(const struct efx_channel *old_channel)
482 {
483 struct efx_channel *channel;
484 struct efx_rx_queue *rx_queue;
485 struct efx_tx_queue *tx_queue;
486 int j;
487
488 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
489 if (!channel)
490 return NULL;
491
492 *channel = *old_channel;
493
494 channel->napi_dev = NULL;
495 memset(&channel->eventq, 0, sizeof(channel->eventq));
496
497 for (j = 0; j < EFX_TXQ_TYPES; j++) {
498 tx_queue = &channel->tx_queue[j];
499 if (tx_queue->channel)
500 tx_queue->channel = channel;
501 tx_queue->buffer = NULL;
502 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
503 }
504
505 rx_queue = &channel->rx_queue;
506 rx_queue->buffer = NULL;
507 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
508 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
509 (unsigned long)rx_queue);
510
511 return channel;
512 }
513
514 static int efx_probe_channel(struct efx_channel *channel)
515 {
516 struct efx_tx_queue *tx_queue;
517 struct efx_rx_queue *rx_queue;
518 int rc;
519
520 netif_dbg(channel->efx, probe, channel->efx->net_dev,
521 "creating channel %d\n", channel->channel);
522
523 rc = channel->type->pre_probe(channel);
524 if (rc)
525 goto fail;
526
527 rc = efx_probe_eventq(channel);
528 if (rc)
529 goto fail;
530
531 efx_for_each_channel_tx_queue(tx_queue, channel) {
532 rc = efx_probe_tx_queue(tx_queue);
533 if (rc)
534 goto fail;
535 }
536
537 efx_for_each_channel_rx_queue(rx_queue, channel) {
538 rc = efx_probe_rx_queue(rx_queue);
539 if (rc)
540 goto fail;
541 }
542
543 channel->n_rx_frm_trunc = 0;
544
545 return 0;
546
547 fail:
548 efx_remove_channel(channel);
549 return rc;
550 }
551
552 static void
553 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
554 {
555 struct efx_nic *efx = channel->efx;
556 const char *type;
557 int number;
558
559 number = channel->channel;
560 if (efx->tx_channel_offset == 0) {
561 type = "";
562 } else if (channel->channel < efx->tx_channel_offset) {
563 type = "-rx";
564 } else {
565 type = "-tx";
566 number -= efx->tx_channel_offset;
567 }
568 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
569 }
570
571 static void efx_set_channel_names(struct efx_nic *efx)
572 {
573 struct efx_channel *channel;
574
575 efx_for_each_channel(channel, efx)
576 channel->type->get_name(channel,
577 efx->channel_name[channel->channel],
578 sizeof(efx->channel_name[0]));
579 }
580
581 static int efx_probe_channels(struct efx_nic *efx)
582 {
583 struct efx_channel *channel;
584 int rc;
585
586 /* Restart special buffer allocation */
587 efx->next_buffer_table = 0;
588
589 /* Probe channels in reverse, so that any 'extra' channels
590 * use the start of the buffer table. This allows the traffic
591 * channels to be resized without moving them or wasting the
592 * entries before them.
593 */
594 efx_for_each_channel_rev(channel, efx) {
595 rc = efx_probe_channel(channel);
596 if (rc) {
597 netif_err(efx, probe, efx->net_dev,
598 "failed to create channel %d\n",
599 channel->channel);
600 goto fail;
601 }
602 }
603 efx_set_channel_names(efx);
604
605 return 0;
606
607 fail:
608 efx_remove_channels(efx);
609 return rc;
610 }
611
612 /* Channels are shutdown and reinitialised whilst the NIC is running
613 * to propagate configuration changes (mtu, checksum offload), or
614 * to clear hardware error conditions
615 */
616 static void efx_start_datapath(struct efx_nic *efx)
617 {
618 struct efx_tx_queue *tx_queue;
619 struct efx_rx_queue *rx_queue;
620 struct efx_channel *channel;
621
622 /* Calculate the rx buffer allocation parameters required to
623 * support the current MTU, including padding for header
624 * alignment and overruns.
625 */
626 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
627 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
628 efx->type->rx_buffer_hash_size +
629 efx->type->rx_buffer_padding);
630 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
631 sizeof(struct efx_rx_page_state));
632
633 /* Initialise the channels */
634 efx_for_each_channel(channel, efx) {
635 efx_for_each_channel_tx_queue(tx_queue, channel)
636 efx_init_tx_queue(tx_queue);
637
638 /* The rx buffer allocation strategy is MTU dependent */
639 efx_rx_strategy(channel);
640
641 efx_for_each_channel_rx_queue(rx_queue, channel) {
642 efx_init_rx_queue(rx_queue);
643 efx_nic_generate_fill_event(rx_queue);
644 }
645
646 WARN_ON(channel->rx_pkt != NULL);
647 efx_rx_strategy(channel);
648 }
649
650 if (netif_device_present(efx->net_dev))
651 netif_tx_wake_all_queues(efx->net_dev);
652 }
653
654 static void efx_stop_datapath(struct efx_nic *efx)
655 {
656 struct efx_channel *channel;
657 struct efx_tx_queue *tx_queue;
658 struct efx_rx_queue *rx_queue;
659 struct pci_dev *dev = efx->pci_dev;
660 int rc;
661
662 EFX_ASSERT_RESET_SERIALISED(efx);
663 BUG_ON(efx->port_enabled);
664
665 /* Only perform flush if dma is enabled */
666 if (dev->is_busmaster) {
667 rc = efx_nic_flush_queues(efx);
668
669 if (rc && EFX_WORKAROUND_7803(efx)) {
670 /* Schedule a reset to recover from the flush failure. The
671 * descriptor caches reference memory we're about to free,
672 * but falcon_reconfigure_mac_wrapper() won't reconnect
673 * the MACs because of the pending reset. */
674 netif_err(efx, drv, efx->net_dev,
675 "Resetting to recover from flush failure\n");
676 efx_schedule_reset(efx, RESET_TYPE_ALL);
677 } else if (rc) {
678 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
679 } else {
680 netif_dbg(efx, drv, efx->net_dev,
681 "successfully flushed all queues\n");
682 }
683 }
684
685 efx_for_each_channel(channel, efx) {
686 /* RX packet processing is pipelined, so wait for the
687 * NAPI handler to complete. At least event queue 0
688 * might be kept active by non-data events, so don't
689 * use napi_synchronize() but actually disable NAPI
690 * temporarily.
691 */
692 if (efx_channel_has_rx_queue(channel)) {
693 efx_stop_eventq(channel);
694 efx_start_eventq(channel);
695 }
696
697 efx_for_each_channel_rx_queue(rx_queue, channel)
698 efx_fini_rx_queue(rx_queue);
699 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
700 efx_fini_tx_queue(tx_queue);
701 }
702 }
703
704 static void efx_remove_channel(struct efx_channel *channel)
705 {
706 struct efx_tx_queue *tx_queue;
707 struct efx_rx_queue *rx_queue;
708
709 netif_dbg(channel->efx, drv, channel->efx->net_dev,
710 "destroy chan %d\n", channel->channel);
711
712 efx_for_each_channel_rx_queue(rx_queue, channel)
713 efx_remove_rx_queue(rx_queue);
714 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
715 efx_remove_tx_queue(tx_queue);
716 efx_remove_eventq(channel);
717 }
718
719 static void efx_remove_channels(struct efx_nic *efx)
720 {
721 struct efx_channel *channel;
722
723 efx_for_each_channel(channel, efx)
724 efx_remove_channel(channel);
725 }
726
727 int
728 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
729 {
730 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
731 u32 old_rxq_entries, old_txq_entries;
732 unsigned i, next_buffer_table = 0;
733 int rc = 0;
734
735 /* Not all channels should be reallocated. We must avoid
736 * reallocating their buffer table entries.
737 */
738 efx_for_each_channel(channel, efx) {
739 struct efx_rx_queue *rx_queue;
740 struct efx_tx_queue *tx_queue;
741
742 if (channel->type->copy)
743 continue;
744 next_buffer_table = max(next_buffer_table,
745 channel->eventq.index +
746 channel->eventq.entries);
747 efx_for_each_channel_rx_queue(rx_queue, channel)
748 next_buffer_table = max(next_buffer_table,
749 rx_queue->rxd.index +
750 rx_queue->rxd.entries);
751 efx_for_each_channel_tx_queue(tx_queue, channel)
752 next_buffer_table = max(next_buffer_table,
753 tx_queue->txd.index +
754 tx_queue->txd.entries);
755 }
756
757 efx_device_detach_sync(efx);
758 efx_stop_all(efx);
759 efx_stop_interrupts(efx, true);
760
761 /* Clone channels (where possible) */
762 memset(other_channel, 0, sizeof(other_channel));
763 for (i = 0; i < efx->n_channels; i++) {
764 channel = efx->channel[i];
765 if (channel->type->copy)
766 channel = channel->type->copy(channel);
767 if (!channel) {
768 rc = -ENOMEM;
769 goto out;
770 }
771 other_channel[i] = channel;
772 }
773
774 /* Swap entry counts and channel pointers */
775 old_rxq_entries = efx->rxq_entries;
776 old_txq_entries = efx->txq_entries;
777 efx->rxq_entries = rxq_entries;
778 efx->txq_entries = txq_entries;
779 for (i = 0; i < efx->n_channels; i++) {
780 channel = efx->channel[i];
781 efx->channel[i] = other_channel[i];
782 other_channel[i] = channel;
783 }
784
785 /* Restart buffer table allocation */
786 efx->next_buffer_table = next_buffer_table;
787
788 for (i = 0; i < efx->n_channels; i++) {
789 channel = efx->channel[i];
790 if (!channel->type->copy)
791 continue;
792 rc = efx_probe_channel(channel);
793 if (rc)
794 goto rollback;
795 efx_init_napi_channel(efx->channel[i]);
796 }
797
798 out:
799 /* Destroy unused channel structures */
800 for (i = 0; i < efx->n_channels; i++) {
801 channel = other_channel[i];
802 if (channel && channel->type->copy) {
803 efx_fini_napi_channel(channel);
804 efx_remove_channel(channel);
805 kfree(channel);
806 }
807 }
808
809 efx_start_interrupts(efx, true);
810 efx_start_all(efx);
811 netif_device_attach(efx->net_dev);
812 return rc;
813
814 rollback:
815 /* Swap back */
816 efx->rxq_entries = old_rxq_entries;
817 efx->txq_entries = old_txq_entries;
818 for (i = 0; i < efx->n_channels; i++) {
819 channel = efx->channel[i];
820 efx->channel[i] = other_channel[i];
821 other_channel[i] = channel;
822 }
823 goto out;
824 }
825
826 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
827 {
828 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
829 }
830
831 static const struct efx_channel_type efx_default_channel_type = {
832 .pre_probe = efx_channel_dummy_op_int,
833 .get_name = efx_get_channel_name,
834 .copy = efx_copy_channel,
835 .keep_eventq = false,
836 };
837
838 int efx_channel_dummy_op_int(struct efx_channel *channel)
839 {
840 return 0;
841 }
842
843 /**************************************************************************
844 *
845 * Port handling
846 *
847 **************************************************************************/
848
849 /* This ensures that the kernel is kept informed (via
850 * netif_carrier_on/off) of the link status, and also maintains the
851 * link status's stop on the port's TX queue.
852 */
853 void efx_link_status_changed(struct efx_nic *efx)
854 {
855 struct efx_link_state *link_state = &efx->link_state;
856
857 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
858 * that no events are triggered between unregister_netdev() and the
859 * driver unloading. A more general condition is that NETDEV_CHANGE
860 * can only be generated between NETDEV_UP and NETDEV_DOWN */
861 if (!netif_running(efx->net_dev))
862 return;
863
864 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
865 efx->n_link_state_changes++;
866
867 if (link_state->up)
868 netif_carrier_on(efx->net_dev);
869 else
870 netif_carrier_off(efx->net_dev);
871 }
872
873 /* Status message for kernel log */
874 if (link_state->up)
875 netif_info(efx, link, efx->net_dev,
876 "link up at %uMbps %s-duplex (MTU %d)%s\n",
877 link_state->speed, link_state->fd ? "full" : "half",
878 efx->net_dev->mtu,
879 (efx->promiscuous ? " [PROMISC]" : ""));
880 else
881 netif_info(efx, link, efx->net_dev, "link down\n");
882 }
883
884 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
885 {
886 efx->link_advertising = advertising;
887 if (advertising) {
888 if (advertising & ADVERTISED_Pause)
889 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
890 else
891 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
892 if (advertising & ADVERTISED_Asym_Pause)
893 efx->wanted_fc ^= EFX_FC_TX;
894 }
895 }
896
897 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
898 {
899 efx->wanted_fc = wanted_fc;
900 if (efx->link_advertising) {
901 if (wanted_fc & EFX_FC_RX)
902 efx->link_advertising |= (ADVERTISED_Pause |
903 ADVERTISED_Asym_Pause);
904 else
905 efx->link_advertising &= ~(ADVERTISED_Pause |
906 ADVERTISED_Asym_Pause);
907 if (wanted_fc & EFX_FC_TX)
908 efx->link_advertising ^= ADVERTISED_Asym_Pause;
909 }
910 }
911
912 static void efx_fini_port(struct efx_nic *efx);
913
914 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
915 * the MAC appropriately. All other PHY configuration changes are pushed
916 * through phy_op->set_settings(), and pushed asynchronously to the MAC
917 * through efx_monitor().
918 *
919 * Callers must hold the mac_lock
920 */
921 int __efx_reconfigure_port(struct efx_nic *efx)
922 {
923 enum efx_phy_mode phy_mode;
924 int rc;
925
926 WARN_ON(!mutex_is_locked(&efx->mac_lock));
927
928 /* Serialise the promiscuous flag with efx_set_rx_mode. */
929 netif_addr_lock_bh(efx->net_dev);
930 netif_addr_unlock_bh(efx->net_dev);
931
932 /* Disable PHY transmit in mac level loopbacks */
933 phy_mode = efx->phy_mode;
934 if (LOOPBACK_INTERNAL(efx))
935 efx->phy_mode |= PHY_MODE_TX_DISABLED;
936 else
937 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
938
939 rc = efx->type->reconfigure_port(efx);
940
941 if (rc)
942 efx->phy_mode = phy_mode;
943
944 return rc;
945 }
946
947 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
948 * disabled. */
949 int efx_reconfigure_port(struct efx_nic *efx)
950 {
951 int rc;
952
953 EFX_ASSERT_RESET_SERIALISED(efx);
954
955 mutex_lock(&efx->mac_lock);
956 rc = __efx_reconfigure_port(efx);
957 mutex_unlock(&efx->mac_lock);
958
959 return rc;
960 }
961
962 /* Asynchronous work item for changing MAC promiscuity and multicast
963 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
964 * MAC directly. */
965 static void efx_mac_work(struct work_struct *data)
966 {
967 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
968
969 mutex_lock(&efx->mac_lock);
970 if (efx->port_enabled)
971 efx->type->reconfigure_mac(efx);
972 mutex_unlock(&efx->mac_lock);
973 }
974
975 static int efx_probe_port(struct efx_nic *efx)
976 {
977 int rc;
978
979 netif_dbg(efx, probe, efx->net_dev, "create port\n");
980
981 if (phy_flash_cfg)
982 efx->phy_mode = PHY_MODE_SPECIAL;
983
984 /* Connect up MAC/PHY operations table */
985 rc = efx->type->probe_port(efx);
986 if (rc)
987 return rc;
988
989 /* Initialise MAC address to permanent address */
990 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
991
992 return 0;
993 }
994
995 static int efx_init_port(struct efx_nic *efx)
996 {
997 int rc;
998
999 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1000
1001 mutex_lock(&efx->mac_lock);
1002
1003 rc = efx->phy_op->init(efx);
1004 if (rc)
1005 goto fail1;
1006
1007 efx->port_initialized = true;
1008
1009 /* Reconfigure the MAC before creating dma queues (required for
1010 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1011 efx->type->reconfigure_mac(efx);
1012
1013 /* Ensure the PHY advertises the correct flow control settings */
1014 rc = efx->phy_op->reconfigure(efx);
1015 if (rc)
1016 goto fail2;
1017
1018 mutex_unlock(&efx->mac_lock);
1019 return 0;
1020
1021 fail2:
1022 efx->phy_op->fini(efx);
1023 fail1:
1024 mutex_unlock(&efx->mac_lock);
1025 return rc;
1026 }
1027
1028 static void efx_start_port(struct efx_nic *efx)
1029 {
1030 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1031 BUG_ON(efx->port_enabled);
1032
1033 mutex_lock(&efx->mac_lock);
1034 efx->port_enabled = true;
1035
1036 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1037 * and then cancelled by efx_flush_all() */
1038 efx->type->reconfigure_mac(efx);
1039
1040 mutex_unlock(&efx->mac_lock);
1041 }
1042
1043 /* Prevent efx_mac_work() and efx_monitor() from working */
1044 static void efx_stop_port(struct efx_nic *efx)
1045 {
1046 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1047
1048 mutex_lock(&efx->mac_lock);
1049 efx->port_enabled = false;
1050 mutex_unlock(&efx->mac_lock);
1051
1052 /* Serialise against efx_set_multicast_list() */
1053 netif_addr_lock_bh(efx->net_dev);
1054 netif_addr_unlock_bh(efx->net_dev);
1055 }
1056
1057 static void efx_fini_port(struct efx_nic *efx)
1058 {
1059 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1060
1061 if (!efx->port_initialized)
1062 return;
1063
1064 efx->phy_op->fini(efx);
1065 efx->port_initialized = false;
1066
1067 efx->link_state.up = false;
1068 efx_link_status_changed(efx);
1069 }
1070
1071 static void efx_remove_port(struct efx_nic *efx)
1072 {
1073 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1074
1075 efx->type->remove_port(efx);
1076 }
1077
1078 /**************************************************************************
1079 *
1080 * NIC handling
1081 *
1082 **************************************************************************/
1083
1084 /* This configures the PCI device to enable I/O and DMA. */
1085 static int efx_init_io(struct efx_nic *efx)
1086 {
1087 struct pci_dev *pci_dev = efx->pci_dev;
1088 dma_addr_t dma_mask = efx->type->max_dma_mask;
1089 int rc;
1090
1091 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1092
1093 rc = pci_enable_device(pci_dev);
1094 if (rc) {
1095 netif_err(efx, probe, efx->net_dev,
1096 "failed to enable PCI device\n");
1097 goto fail1;
1098 }
1099
1100 pci_set_master(pci_dev);
1101
1102 /* Set the PCI DMA mask. Try all possibilities from our
1103 * genuine mask down to 32 bits, because some architectures
1104 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1105 * masks event though they reject 46 bit masks.
1106 */
1107 while (dma_mask > 0x7fffffffUL) {
1108 if (pci_dma_supported(pci_dev, dma_mask)) {
1109 rc = pci_set_dma_mask(pci_dev, dma_mask);
1110 if (rc == 0)
1111 break;
1112 }
1113 dma_mask >>= 1;
1114 }
1115 if (rc) {
1116 netif_err(efx, probe, efx->net_dev,
1117 "could not find a suitable DMA mask\n");
1118 goto fail2;
1119 }
1120 netif_dbg(efx, probe, efx->net_dev,
1121 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1122 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1123 if (rc) {
1124 /* pci_set_consistent_dma_mask() is not *allowed* to
1125 * fail with a mask that pci_set_dma_mask() accepted,
1126 * but just in case...
1127 */
1128 netif_err(efx, probe, efx->net_dev,
1129 "failed to set consistent DMA mask\n");
1130 goto fail2;
1131 }
1132
1133 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1134 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1135 if (rc) {
1136 netif_err(efx, probe, efx->net_dev,
1137 "request for memory BAR failed\n");
1138 rc = -EIO;
1139 goto fail3;
1140 }
1141 efx->membase = ioremap_nocache(efx->membase_phys,
1142 efx->type->mem_map_size);
1143 if (!efx->membase) {
1144 netif_err(efx, probe, efx->net_dev,
1145 "could not map memory BAR at %llx+%x\n",
1146 (unsigned long long)efx->membase_phys,
1147 efx->type->mem_map_size);
1148 rc = -ENOMEM;
1149 goto fail4;
1150 }
1151 netif_dbg(efx, probe, efx->net_dev,
1152 "memory BAR at %llx+%x (virtual %p)\n",
1153 (unsigned long long)efx->membase_phys,
1154 efx->type->mem_map_size, efx->membase);
1155
1156 return 0;
1157
1158 fail4:
1159 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1160 fail3:
1161 efx->membase_phys = 0;
1162 fail2:
1163 pci_disable_device(efx->pci_dev);
1164 fail1:
1165 return rc;
1166 }
1167
1168 static void efx_fini_io(struct efx_nic *efx)
1169 {
1170 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1171
1172 if (efx->membase) {
1173 iounmap(efx->membase);
1174 efx->membase = NULL;
1175 }
1176
1177 if (efx->membase_phys) {
1178 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1179 efx->membase_phys = 0;
1180 }
1181
1182 pci_disable_device(efx->pci_dev);
1183 }
1184
1185 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1186 {
1187 cpumask_var_t thread_mask;
1188 unsigned int count;
1189 int cpu;
1190
1191 if (rss_cpus) {
1192 count = rss_cpus;
1193 } else {
1194 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1195 netif_warn(efx, probe, efx->net_dev,
1196 "RSS disabled due to allocation failure\n");
1197 return 1;
1198 }
1199
1200 count = 0;
1201 for_each_online_cpu(cpu) {
1202 if (!cpumask_test_cpu(cpu, thread_mask)) {
1203 ++count;
1204 cpumask_or(thread_mask, thread_mask,
1205 topology_thread_cpumask(cpu));
1206 }
1207 }
1208
1209 free_cpumask_var(thread_mask);
1210 }
1211
1212 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1213 * table entries that are inaccessible to VFs
1214 */
1215 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1216 count > efx_vf_size(efx)) {
1217 netif_warn(efx, probe, efx->net_dev,
1218 "Reducing number of RSS channels from %u to %u for "
1219 "VF support. Increase vf-msix-limit to use more "
1220 "channels on the PF.\n",
1221 count, efx_vf_size(efx));
1222 count = efx_vf_size(efx);
1223 }
1224
1225 return count;
1226 }
1227
1228 static int
1229 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1230 {
1231 #ifdef CONFIG_RFS_ACCEL
1232 unsigned int i;
1233 int rc;
1234
1235 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1236 if (!efx->net_dev->rx_cpu_rmap)
1237 return -ENOMEM;
1238 for (i = 0; i < efx->n_rx_channels; i++) {
1239 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1240 xentries[i].vector);
1241 if (rc) {
1242 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1243 efx->net_dev->rx_cpu_rmap = NULL;
1244 return rc;
1245 }
1246 }
1247 #endif
1248 return 0;
1249 }
1250
1251 /* Probe the number and type of interrupts we are able to obtain, and
1252 * the resulting numbers of channels and RX queues.
1253 */
1254 static int efx_probe_interrupts(struct efx_nic *efx)
1255 {
1256 unsigned int max_channels =
1257 min(efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1258 unsigned int extra_channels = 0;
1259 unsigned int i, j;
1260 int rc;
1261
1262 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1263 if (efx->extra_channel_type[i])
1264 ++extra_channels;
1265
1266 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1267 struct msix_entry xentries[EFX_MAX_CHANNELS];
1268 unsigned int n_channels;
1269
1270 n_channels = efx_wanted_parallelism(efx);
1271 if (separate_tx_channels)
1272 n_channels *= 2;
1273 n_channels += extra_channels;
1274 n_channels = min(n_channels, max_channels);
1275
1276 for (i = 0; i < n_channels; i++)
1277 xentries[i].entry = i;
1278 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1279 if (rc > 0) {
1280 netif_err(efx, drv, efx->net_dev,
1281 "WARNING: Insufficient MSI-X vectors"
1282 " available (%d < %u).\n", rc, n_channels);
1283 netif_err(efx, drv, efx->net_dev,
1284 "WARNING: Performance may be reduced.\n");
1285 EFX_BUG_ON_PARANOID(rc >= n_channels);
1286 n_channels = rc;
1287 rc = pci_enable_msix(efx->pci_dev, xentries,
1288 n_channels);
1289 }
1290
1291 if (rc == 0) {
1292 efx->n_channels = n_channels;
1293 if (n_channels > extra_channels)
1294 n_channels -= extra_channels;
1295 if (separate_tx_channels) {
1296 efx->n_tx_channels = max(n_channels / 2, 1U);
1297 efx->n_rx_channels = max(n_channels -
1298 efx->n_tx_channels,
1299 1U);
1300 } else {
1301 efx->n_tx_channels = n_channels;
1302 efx->n_rx_channels = n_channels;
1303 }
1304 rc = efx_init_rx_cpu_rmap(efx, xentries);
1305 if (rc) {
1306 pci_disable_msix(efx->pci_dev);
1307 return rc;
1308 }
1309 for (i = 0; i < efx->n_channels; i++)
1310 efx_get_channel(efx, i)->irq =
1311 xentries[i].vector;
1312 } else {
1313 /* Fall back to single channel MSI */
1314 efx->interrupt_mode = EFX_INT_MODE_MSI;
1315 netif_err(efx, drv, efx->net_dev,
1316 "could not enable MSI-X\n");
1317 }
1318 }
1319
1320 /* Try single interrupt MSI */
1321 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1322 efx->n_channels = 1;
1323 efx->n_rx_channels = 1;
1324 efx->n_tx_channels = 1;
1325 rc = pci_enable_msi(efx->pci_dev);
1326 if (rc == 0) {
1327 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1328 } else {
1329 netif_err(efx, drv, efx->net_dev,
1330 "could not enable MSI\n");
1331 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1332 }
1333 }
1334
1335 /* Assume legacy interrupts */
1336 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1337 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1338 efx->n_rx_channels = 1;
1339 efx->n_tx_channels = 1;
1340 efx->legacy_irq = efx->pci_dev->irq;
1341 }
1342
1343 /* Assign extra channels if possible */
1344 j = efx->n_channels;
1345 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1346 if (!efx->extra_channel_type[i])
1347 continue;
1348 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1349 efx->n_channels <= extra_channels) {
1350 efx->extra_channel_type[i]->handle_no_channel(efx);
1351 } else {
1352 --j;
1353 efx_get_channel(efx, j)->type =
1354 efx->extra_channel_type[i];
1355 }
1356 }
1357
1358 /* RSS might be usable on VFs even if it is disabled on the PF */
1359 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1360 efx->n_rx_channels : efx_vf_size(efx));
1361
1362 return 0;
1363 }
1364
1365 /* Enable interrupts, then probe and start the event queues */
1366 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1367 {
1368 struct efx_channel *channel;
1369
1370 if (efx->legacy_irq)
1371 efx->legacy_irq_enabled = true;
1372 efx_nic_enable_interrupts(efx);
1373
1374 efx_for_each_channel(channel, efx) {
1375 if (!channel->type->keep_eventq || !may_keep_eventq)
1376 efx_init_eventq(channel);
1377 efx_start_eventq(channel);
1378 }
1379
1380 efx_mcdi_mode_event(efx);
1381 }
1382
1383 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1384 {
1385 struct efx_channel *channel;
1386
1387 efx_mcdi_mode_poll(efx);
1388
1389 efx_nic_disable_interrupts(efx);
1390 if (efx->legacy_irq) {
1391 synchronize_irq(efx->legacy_irq);
1392 efx->legacy_irq_enabled = false;
1393 }
1394
1395 efx_for_each_channel(channel, efx) {
1396 if (channel->irq)
1397 synchronize_irq(channel->irq);
1398
1399 efx_stop_eventq(channel);
1400 if (!channel->type->keep_eventq || !may_keep_eventq)
1401 efx_fini_eventq(channel);
1402 }
1403 }
1404
1405 static void efx_remove_interrupts(struct efx_nic *efx)
1406 {
1407 struct efx_channel *channel;
1408
1409 /* Remove MSI/MSI-X interrupts */
1410 efx_for_each_channel(channel, efx)
1411 channel->irq = 0;
1412 pci_disable_msi(efx->pci_dev);
1413 pci_disable_msix(efx->pci_dev);
1414
1415 /* Remove legacy interrupt */
1416 efx->legacy_irq = 0;
1417 }
1418
1419 static void efx_set_channels(struct efx_nic *efx)
1420 {
1421 struct efx_channel *channel;
1422 struct efx_tx_queue *tx_queue;
1423
1424 efx->tx_channel_offset =
1425 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1426
1427 /* We need to adjust the TX queue numbers if we have separate
1428 * RX-only and TX-only channels.
1429 */
1430 efx_for_each_channel(channel, efx) {
1431 efx_for_each_channel_tx_queue(tx_queue, channel)
1432 tx_queue->queue -= (efx->tx_channel_offset *
1433 EFX_TXQ_TYPES);
1434 }
1435 }
1436
1437 static int efx_probe_nic(struct efx_nic *efx)
1438 {
1439 size_t i;
1440 int rc;
1441
1442 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1443
1444 /* Carry out hardware-type specific initialisation */
1445 rc = efx->type->probe(efx);
1446 if (rc)
1447 return rc;
1448
1449 /* Determine the number of channels and queues by trying to hook
1450 * in MSI-X interrupts. */
1451 rc = efx_probe_interrupts(efx);
1452 if (rc)
1453 goto fail;
1454
1455 efx->type->dimension_resources(efx);
1456
1457 if (efx->n_channels > 1)
1458 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1459 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1460 efx->rx_indir_table[i] =
1461 ethtool_rxfh_indir_default(i, efx->rss_spread);
1462
1463 efx_set_channels(efx);
1464 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1465 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1466
1467 /* Initialise the interrupt moderation settings */
1468 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1469 true);
1470
1471 return 0;
1472
1473 fail:
1474 efx->type->remove(efx);
1475 return rc;
1476 }
1477
1478 static void efx_remove_nic(struct efx_nic *efx)
1479 {
1480 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1481
1482 efx_remove_interrupts(efx);
1483 efx->type->remove(efx);
1484 }
1485
1486 /**************************************************************************
1487 *
1488 * NIC startup/shutdown
1489 *
1490 *************************************************************************/
1491
1492 static int efx_probe_all(struct efx_nic *efx)
1493 {
1494 int rc;
1495
1496 rc = efx_probe_nic(efx);
1497 if (rc) {
1498 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1499 goto fail1;
1500 }
1501
1502 rc = efx_probe_port(efx);
1503 if (rc) {
1504 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1505 goto fail2;
1506 }
1507
1508 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1509 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1510 rc = -EINVAL;
1511 goto fail3;
1512 }
1513 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1514
1515 rc = efx_probe_filters(efx);
1516 if (rc) {
1517 netif_err(efx, probe, efx->net_dev,
1518 "failed to create filter tables\n");
1519 goto fail3;
1520 }
1521
1522 rc = efx_probe_channels(efx);
1523 if (rc)
1524 goto fail4;
1525
1526 return 0;
1527
1528 fail4:
1529 efx_remove_filters(efx);
1530 fail3:
1531 efx_remove_port(efx);
1532 fail2:
1533 efx_remove_nic(efx);
1534 fail1:
1535 return rc;
1536 }
1537
1538 /* Called after previous invocation(s) of efx_stop_all, restarts the port,
1539 * kernel transmit queues and NAPI processing, and ensures that the port is
1540 * scheduled to be reconfigured. This function is safe to call multiple
1541 * times when the NIC is in any state.
1542 */
1543 static void efx_start_all(struct efx_nic *efx)
1544 {
1545 EFX_ASSERT_RESET_SERIALISED(efx);
1546
1547 /* Check that it is appropriate to restart the interface. All
1548 * of these flags are safe to read under just the rtnl lock */
1549 if (efx->port_enabled)
1550 return;
1551 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1552 return;
1553 if (!netif_running(efx->net_dev))
1554 return;
1555
1556 efx_start_port(efx);
1557 efx_start_datapath(efx);
1558
1559 /* Start the hardware monitor if there is one. Otherwise (we're link
1560 * event driven), we have to poll the PHY because after an event queue
1561 * flush, we could have a missed a link state change */
1562 if (efx->type->monitor != NULL) {
1563 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1564 efx_monitor_interval);
1565 } else {
1566 mutex_lock(&efx->mac_lock);
1567 if (efx->phy_op->poll(efx))
1568 efx_link_status_changed(efx);
1569 mutex_unlock(&efx->mac_lock);
1570 }
1571
1572 efx->type->start_stats(efx);
1573 }
1574
1575 /* Flush all delayed work. Should only be called when no more delayed work
1576 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1577 * since we're holding the rtnl_lock at this point. */
1578 static void efx_flush_all(struct efx_nic *efx)
1579 {
1580 /* Make sure the hardware monitor and event self-test are stopped */
1581 cancel_delayed_work_sync(&efx->monitor_work);
1582 efx_selftest_async_cancel(efx);
1583 /* Stop scheduled port reconfigurations */
1584 cancel_work_sync(&efx->mac_work);
1585 }
1586
1587 /* Quiesce hardware and software without bringing the link down.
1588 * Safe to call multiple times, when the nic and interface is in any
1589 * state. The caller is guaranteed to subsequently be in a position
1590 * to modify any hardware and software state they see fit without
1591 * taking locks. */
1592 static void efx_stop_all(struct efx_nic *efx)
1593 {
1594 EFX_ASSERT_RESET_SERIALISED(efx);
1595
1596 /* port_enabled can be read safely under the rtnl lock */
1597 if (!efx->port_enabled)
1598 return;
1599
1600 efx->type->stop_stats(efx);
1601 efx_stop_port(efx);
1602
1603 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1604 efx_flush_all(efx);
1605
1606 /* Stop the kernel transmit interface. This is only valid if
1607 * the device is stopped or detached; otherwise the watchdog
1608 * may fire immediately.
1609 */
1610 WARN_ON(netif_running(efx->net_dev) &&
1611 netif_device_present(efx->net_dev));
1612 netif_tx_disable(efx->net_dev);
1613
1614 efx_stop_datapath(efx);
1615 }
1616
1617 static void efx_remove_all(struct efx_nic *efx)
1618 {
1619 efx_remove_channels(efx);
1620 efx_remove_filters(efx);
1621 efx_remove_port(efx);
1622 efx_remove_nic(efx);
1623 }
1624
1625 /**************************************************************************
1626 *
1627 * Interrupt moderation
1628 *
1629 **************************************************************************/
1630
1631 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1632 {
1633 if (usecs == 0)
1634 return 0;
1635 if (usecs * 1000 < quantum_ns)
1636 return 1; /* never round down to 0 */
1637 return usecs * 1000 / quantum_ns;
1638 }
1639
1640 /* Set interrupt moderation parameters */
1641 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1642 unsigned int rx_usecs, bool rx_adaptive,
1643 bool rx_may_override_tx)
1644 {
1645 struct efx_channel *channel;
1646 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1647 efx->timer_quantum_ns,
1648 1000);
1649 unsigned int tx_ticks;
1650 unsigned int rx_ticks;
1651
1652 EFX_ASSERT_RESET_SERIALISED(efx);
1653
1654 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1655 return -EINVAL;
1656
1657 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1658 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1659
1660 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1661 !rx_may_override_tx) {
1662 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1663 "RX and TX IRQ moderation must be equal\n");
1664 return -EINVAL;
1665 }
1666
1667 efx->irq_rx_adaptive = rx_adaptive;
1668 efx->irq_rx_moderation = rx_ticks;
1669 efx_for_each_channel(channel, efx) {
1670 if (efx_channel_has_rx_queue(channel))
1671 channel->irq_moderation = rx_ticks;
1672 else if (efx_channel_has_tx_queues(channel))
1673 channel->irq_moderation = tx_ticks;
1674 }
1675
1676 return 0;
1677 }
1678
1679 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1680 unsigned int *rx_usecs, bool *rx_adaptive)
1681 {
1682 /* We must round up when converting ticks to microseconds
1683 * because we round down when converting the other way.
1684 */
1685
1686 *rx_adaptive = efx->irq_rx_adaptive;
1687 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1688 efx->timer_quantum_ns,
1689 1000);
1690
1691 /* If channels are shared between RX and TX, so is IRQ
1692 * moderation. Otherwise, IRQ moderation is the same for all
1693 * TX channels and is not adaptive.
1694 */
1695 if (efx->tx_channel_offset == 0)
1696 *tx_usecs = *rx_usecs;
1697 else
1698 *tx_usecs = DIV_ROUND_UP(
1699 efx->channel[efx->tx_channel_offset]->irq_moderation *
1700 efx->timer_quantum_ns,
1701 1000);
1702 }
1703
1704 /**************************************************************************
1705 *
1706 * Hardware monitor
1707 *
1708 **************************************************************************/
1709
1710 /* Run periodically off the general workqueue */
1711 static void efx_monitor(struct work_struct *data)
1712 {
1713 struct efx_nic *efx = container_of(data, struct efx_nic,
1714 monitor_work.work);
1715
1716 netif_vdbg(efx, timer, efx->net_dev,
1717 "hardware monitor executing on CPU %d\n",
1718 raw_smp_processor_id());
1719 BUG_ON(efx->type->monitor == NULL);
1720
1721 /* If the mac_lock is already held then it is likely a port
1722 * reconfiguration is already in place, which will likely do
1723 * most of the work of monitor() anyway. */
1724 if (mutex_trylock(&efx->mac_lock)) {
1725 if (efx->port_enabled)
1726 efx->type->monitor(efx);
1727 mutex_unlock(&efx->mac_lock);
1728 }
1729
1730 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1731 efx_monitor_interval);
1732 }
1733
1734 /**************************************************************************
1735 *
1736 * ioctls
1737 *
1738 *************************************************************************/
1739
1740 /* Net device ioctl
1741 * Context: process, rtnl_lock() held.
1742 */
1743 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1744 {
1745 struct efx_nic *efx = netdev_priv(net_dev);
1746 struct mii_ioctl_data *data = if_mii(ifr);
1747
1748 EFX_ASSERT_RESET_SERIALISED(efx);
1749
1750 /* Convert phy_id from older PRTAD/DEVAD format */
1751 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1752 (data->phy_id & 0xfc00) == 0x0400)
1753 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1754
1755 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1756 }
1757
1758 /**************************************************************************
1759 *
1760 * NAPI interface
1761 *
1762 **************************************************************************/
1763
1764 static void efx_init_napi_channel(struct efx_channel *channel)
1765 {
1766 struct efx_nic *efx = channel->efx;
1767
1768 channel->napi_dev = efx->net_dev;
1769 netif_napi_add(channel->napi_dev, &channel->napi_str,
1770 efx_poll, napi_weight);
1771 }
1772
1773 static void efx_init_napi(struct efx_nic *efx)
1774 {
1775 struct efx_channel *channel;
1776
1777 efx_for_each_channel(channel, efx)
1778 efx_init_napi_channel(channel);
1779 }
1780
1781 static void efx_fini_napi_channel(struct efx_channel *channel)
1782 {
1783 if (channel->napi_dev)
1784 netif_napi_del(&channel->napi_str);
1785 channel->napi_dev = NULL;
1786 }
1787
1788 static void efx_fini_napi(struct efx_nic *efx)
1789 {
1790 struct efx_channel *channel;
1791
1792 efx_for_each_channel(channel, efx)
1793 efx_fini_napi_channel(channel);
1794 }
1795
1796 /**************************************************************************
1797 *
1798 * Kernel netpoll interface
1799 *
1800 *************************************************************************/
1801
1802 #ifdef CONFIG_NET_POLL_CONTROLLER
1803
1804 /* Although in the common case interrupts will be disabled, this is not
1805 * guaranteed. However, all our work happens inside the NAPI callback,
1806 * so no locking is required.
1807 */
1808 static void efx_netpoll(struct net_device *net_dev)
1809 {
1810 struct efx_nic *efx = netdev_priv(net_dev);
1811 struct efx_channel *channel;
1812
1813 efx_for_each_channel(channel, efx)
1814 efx_schedule_channel(channel);
1815 }
1816
1817 #endif
1818
1819 /**************************************************************************
1820 *
1821 * Kernel net device interface
1822 *
1823 *************************************************************************/
1824
1825 /* Context: process, rtnl_lock() held. */
1826 static int efx_net_open(struct net_device *net_dev)
1827 {
1828 struct efx_nic *efx = netdev_priv(net_dev);
1829 EFX_ASSERT_RESET_SERIALISED(efx);
1830
1831 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1832 raw_smp_processor_id());
1833
1834 if (efx->state == STATE_DISABLED)
1835 return -EIO;
1836 if (efx->phy_mode & PHY_MODE_SPECIAL)
1837 return -EBUSY;
1838 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1839 return -EIO;
1840
1841 /* Notify the kernel of the link state polled during driver load,
1842 * before the monitor starts running */
1843 efx_link_status_changed(efx);
1844
1845 efx_start_all(efx);
1846 efx_selftest_async_start(efx);
1847 return 0;
1848 }
1849
1850 /* Context: process, rtnl_lock() held.
1851 * Note that the kernel will ignore our return code; this method
1852 * should really be a void.
1853 */
1854 static int efx_net_stop(struct net_device *net_dev)
1855 {
1856 struct efx_nic *efx = netdev_priv(net_dev);
1857
1858 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1859 raw_smp_processor_id());
1860
1861 if (efx->state != STATE_DISABLED) {
1862 /* Stop the device and flush all the channels */
1863 efx_stop_all(efx);
1864 }
1865
1866 return 0;
1867 }
1868
1869 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1870 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1871 struct rtnl_link_stats64 *stats)
1872 {
1873 struct efx_nic *efx = netdev_priv(net_dev);
1874 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1875
1876 spin_lock_bh(&efx->stats_lock);
1877
1878 efx->type->update_stats(efx);
1879
1880 stats->rx_packets = mac_stats->rx_packets;
1881 stats->tx_packets = mac_stats->tx_packets;
1882 stats->rx_bytes = mac_stats->rx_bytes;
1883 stats->tx_bytes = mac_stats->tx_bytes;
1884 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1885 stats->multicast = mac_stats->rx_multicast;
1886 stats->collisions = mac_stats->tx_collision;
1887 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1888 mac_stats->rx_length_error);
1889 stats->rx_crc_errors = mac_stats->rx_bad;
1890 stats->rx_frame_errors = mac_stats->rx_align_error;
1891 stats->rx_fifo_errors = mac_stats->rx_overflow;
1892 stats->rx_missed_errors = mac_stats->rx_missed;
1893 stats->tx_window_errors = mac_stats->tx_late_collision;
1894
1895 stats->rx_errors = (stats->rx_length_errors +
1896 stats->rx_crc_errors +
1897 stats->rx_frame_errors +
1898 mac_stats->rx_symbol_error);
1899 stats->tx_errors = (stats->tx_window_errors +
1900 mac_stats->tx_bad);
1901
1902 spin_unlock_bh(&efx->stats_lock);
1903
1904 return stats;
1905 }
1906
1907 /* Context: netif_tx_lock held, BHs disabled. */
1908 static void efx_watchdog(struct net_device *net_dev)
1909 {
1910 struct efx_nic *efx = netdev_priv(net_dev);
1911
1912 netif_err(efx, tx_err, efx->net_dev,
1913 "TX stuck with port_enabled=%d: resetting channels\n",
1914 efx->port_enabled);
1915
1916 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1917 }
1918
1919
1920 /* Context: process, rtnl_lock() held. */
1921 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1922 {
1923 struct efx_nic *efx = netdev_priv(net_dev);
1924
1925 EFX_ASSERT_RESET_SERIALISED(efx);
1926
1927 if (new_mtu > EFX_MAX_MTU)
1928 return -EINVAL;
1929
1930 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1931
1932 efx_device_detach_sync(efx);
1933 efx_stop_all(efx);
1934
1935 mutex_lock(&efx->mac_lock);
1936 /* Reconfigure the MAC before enabling the dma queues so that
1937 * the RX buffers don't overflow */
1938 net_dev->mtu = new_mtu;
1939 efx->type->reconfigure_mac(efx);
1940 mutex_unlock(&efx->mac_lock);
1941
1942 efx_start_all(efx);
1943 netif_device_attach(efx->net_dev);
1944 return 0;
1945 }
1946
1947 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1948 {
1949 struct efx_nic *efx = netdev_priv(net_dev);
1950 struct sockaddr *addr = data;
1951 char *new_addr = addr->sa_data;
1952
1953 EFX_ASSERT_RESET_SERIALISED(efx);
1954
1955 if (!is_valid_ether_addr(new_addr)) {
1956 netif_err(efx, drv, efx->net_dev,
1957 "invalid ethernet MAC address requested: %pM\n",
1958 new_addr);
1959 return -EADDRNOTAVAIL;
1960 }
1961
1962 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1963 efx_sriov_mac_address_changed(efx);
1964
1965 /* Reconfigure the MAC */
1966 mutex_lock(&efx->mac_lock);
1967 efx->type->reconfigure_mac(efx);
1968 mutex_unlock(&efx->mac_lock);
1969
1970 return 0;
1971 }
1972
1973 /* Context: netif_addr_lock held, BHs disabled. */
1974 static void efx_set_rx_mode(struct net_device *net_dev)
1975 {
1976 struct efx_nic *efx = netdev_priv(net_dev);
1977 struct netdev_hw_addr *ha;
1978 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1979 u32 crc;
1980 int bit;
1981
1982 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1983
1984 /* Build multicast hash table */
1985 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1986 memset(mc_hash, 0xff, sizeof(*mc_hash));
1987 } else {
1988 memset(mc_hash, 0x00, sizeof(*mc_hash));
1989 netdev_for_each_mc_addr(ha, net_dev) {
1990 crc = ether_crc_le(ETH_ALEN, ha->addr);
1991 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1992 set_bit_le(bit, mc_hash->byte);
1993 }
1994
1995 /* Broadcast packets go through the multicast hash filter.
1996 * ether_crc_le() of the broadcast address is 0xbe2612ff
1997 * so we always add bit 0xff to the mask.
1998 */
1999 set_bit_le(0xff, mc_hash->byte);
2000 }
2001
2002 if (efx->port_enabled)
2003 queue_work(efx->workqueue, &efx->mac_work);
2004 /* Otherwise efx_start_port() will do this */
2005 }
2006
2007 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2008 {
2009 struct efx_nic *efx = netdev_priv(net_dev);
2010
2011 /* If disabling RX n-tuple filtering, clear existing filters */
2012 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2013 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2014
2015 return 0;
2016 }
2017
2018 static const struct net_device_ops efx_netdev_ops = {
2019 .ndo_open = efx_net_open,
2020 .ndo_stop = efx_net_stop,
2021 .ndo_get_stats64 = efx_net_stats,
2022 .ndo_tx_timeout = efx_watchdog,
2023 .ndo_start_xmit = efx_hard_start_xmit,
2024 .ndo_validate_addr = eth_validate_addr,
2025 .ndo_do_ioctl = efx_ioctl,
2026 .ndo_change_mtu = efx_change_mtu,
2027 .ndo_set_mac_address = efx_set_mac_address,
2028 .ndo_set_rx_mode = efx_set_rx_mode,
2029 .ndo_set_features = efx_set_features,
2030 #ifdef CONFIG_SFC_SRIOV
2031 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2032 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2033 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2034 .ndo_get_vf_config = efx_sriov_get_vf_config,
2035 #endif
2036 #ifdef CONFIG_NET_POLL_CONTROLLER
2037 .ndo_poll_controller = efx_netpoll,
2038 #endif
2039 .ndo_setup_tc = efx_setup_tc,
2040 #ifdef CONFIG_RFS_ACCEL
2041 .ndo_rx_flow_steer = efx_filter_rfs,
2042 #endif
2043 };
2044
2045 static void efx_update_name(struct efx_nic *efx)
2046 {
2047 strcpy(efx->name, efx->net_dev->name);
2048 efx_mtd_rename(efx);
2049 efx_set_channel_names(efx);
2050 }
2051
2052 static int efx_netdev_event(struct notifier_block *this,
2053 unsigned long event, void *ptr)
2054 {
2055 struct net_device *net_dev = ptr;
2056
2057 if (net_dev->netdev_ops == &efx_netdev_ops &&
2058 event == NETDEV_CHANGENAME)
2059 efx_update_name(netdev_priv(net_dev));
2060
2061 return NOTIFY_DONE;
2062 }
2063
2064 static struct notifier_block efx_netdev_notifier = {
2065 .notifier_call = efx_netdev_event,
2066 };
2067
2068 static ssize_t
2069 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2070 {
2071 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2072 return sprintf(buf, "%d\n", efx->phy_type);
2073 }
2074 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
2075
2076 static int efx_register_netdev(struct efx_nic *efx)
2077 {
2078 struct net_device *net_dev = efx->net_dev;
2079 struct efx_channel *channel;
2080 int rc;
2081
2082 net_dev->watchdog_timeo = 5 * HZ;
2083 net_dev->irq = efx->pci_dev->irq;
2084 net_dev->netdev_ops = &efx_netdev_ops;
2085 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2086 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2087
2088 rtnl_lock();
2089
2090 rc = dev_alloc_name(net_dev, net_dev->name);
2091 if (rc < 0)
2092 goto fail_locked;
2093 efx_update_name(efx);
2094
2095 rc = register_netdevice(net_dev);
2096 if (rc)
2097 goto fail_locked;
2098
2099 efx_for_each_channel(channel, efx) {
2100 struct efx_tx_queue *tx_queue;
2101 efx_for_each_channel_tx_queue(tx_queue, channel)
2102 efx_init_tx_queue_core_txq(tx_queue);
2103 }
2104
2105 /* Always start with carrier off; PHY events will detect the link */
2106 netif_carrier_off(net_dev);
2107
2108 rtnl_unlock();
2109
2110 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2111 if (rc) {
2112 netif_err(efx, drv, efx->net_dev,
2113 "failed to init net dev attributes\n");
2114 goto fail_registered;
2115 }
2116
2117 return 0;
2118
2119 fail_locked:
2120 rtnl_unlock();
2121 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2122 return rc;
2123
2124 fail_registered:
2125 unregister_netdev(net_dev);
2126 return rc;
2127 }
2128
2129 static void efx_unregister_netdev(struct efx_nic *efx)
2130 {
2131 struct efx_channel *channel;
2132 struct efx_tx_queue *tx_queue;
2133
2134 if (!efx->net_dev)
2135 return;
2136
2137 BUG_ON(netdev_priv(efx->net_dev) != efx);
2138
2139 /* Free up any skbs still remaining. This has to happen before
2140 * we try to unregister the netdev as running their destructors
2141 * may be needed to get the device ref. count to 0. */
2142 efx_for_each_channel(channel, efx) {
2143 efx_for_each_channel_tx_queue(tx_queue, channel)
2144 efx_release_tx_buffers(tx_queue);
2145 }
2146
2147 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2148 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2149 unregister_netdev(efx->net_dev);
2150 }
2151
2152 /**************************************************************************
2153 *
2154 * Device reset and suspend
2155 *
2156 **************************************************************************/
2157
2158 /* Tears down the entire software state and most of the hardware state
2159 * before reset. */
2160 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2161 {
2162 EFX_ASSERT_RESET_SERIALISED(efx);
2163
2164 efx_stop_all(efx);
2165 mutex_lock(&efx->mac_lock);
2166
2167 efx_stop_interrupts(efx, false);
2168 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2169 efx->phy_op->fini(efx);
2170 efx->type->fini(efx);
2171 }
2172
2173 /* This function will always ensure that the locks acquired in
2174 * efx_reset_down() are released. A failure return code indicates
2175 * that we were unable to reinitialise the hardware, and the
2176 * driver should be disabled. If ok is false, then the rx and tx
2177 * engines are not restarted, pending a RESET_DISABLE. */
2178 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2179 {
2180 int rc;
2181
2182 EFX_ASSERT_RESET_SERIALISED(efx);
2183
2184 rc = efx->type->init(efx);
2185 if (rc) {
2186 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2187 goto fail;
2188 }
2189
2190 if (!ok)
2191 goto fail;
2192
2193 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2194 rc = efx->phy_op->init(efx);
2195 if (rc)
2196 goto fail;
2197 if (efx->phy_op->reconfigure(efx))
2198 netif_err(efx, drv, efx->net_dev,
2199 "could not restore PHY settings\n");
2200 }
2201
2202 efx->type->reconfigure_mac(efx);
2203
2204 efx_start_interrupts(efx, false);
2205 efx_restore_filters(efx);
2206 efx_sriov_reset(efx);
2207
2208 mutex_unlock(&efx->mac_lock);
2209
2210 efx_start_all(efx);
2211
2212 return 0;
2213
2214 fail:
2215 efx->port_initialized = false;
2216
2217 mutex_unlock(&efx->mac_lock);
2218
2219 return rc;
2220 }
2221
2222 /* Reset the NIC using the specified method. Note that the reset may
2223 * fail, in which case the card will be left in an unusable state.
2224 *
2225 * Caller must hold the rtnl_lock.
2226 */
2227 int efx_reset(struct efx_nic *efx, enum reset_type method)
2228 {
2229 int rc, rc2;
2230 bool disabled;
2231
2232 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2233 RESET_TYPE(method));
2234
2235 efx_device_detach_sync(efx);
2236 efx_reset_down(efx, method);
2237
2238 rc = efx->type->reset(efx, method);
2239 if (rc) {
2240 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2241 goto out;
2242 }
2243
2244 /* Clear flags for the scopes we covered. We assume the NIC and
2245 * driver are now quiescent so that there is no race here.
2246 */
2247 efx->reset_pending &= -(1 << (method + 1));
2248
2249 /* Reinitialise bus-mastering, which may have been turned off before
2250 * the reset was scheduled. This is still appropriate, even in the
2251 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2252 * can respond to requests. */
2253 pci_set_master(efx->pci_dev);
2254
2255 out:
2256 /* Leave device stopped if necessary */
2257 disabled = rc || method == RESET_TYPE_DISABLE;
2258 rc2 = efx_reset_up(efx, method, !disabled);
2259 if (rc2) {
2260 disabled = true;
2261 if (!rc)
2262 rc = rc2;
2263 }
2264
2265 if (disabled) {
2266 dev_close(efx->net_dev);
2267 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2268 efx->state = STATE_DISABLED;
2269 } else {
2270 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2271 netif_device_attach(efx->net_dev);
2272 }
2273 return rc;
2274 }
2275
2276 /* The worker thread exists so that code that cannot sleep can
2277 * schedule a reset for later.
2278 */
2279 static void efx_reset_work(struct work_struct *data)
2280 {
2281 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2282 unsigned long pending = ACCESS_ONCE(efx->reset_pending);
2283
2284 if (!pending)
2285 return;
2286
2287 /* If we're not RUNNING then don't reset. Leave the reset_pending
2288 * flags set so that efx_pci_probe_main will be retried */
2289 if (efx->state != STATE_RUNNING) {
2290 netif_info(efx, drv, efx->net_dev,
2291 "scheduled reset quenched. NIC not RUNNING\n");
2292 return;
2293 }
2294
2295 rtnl_lock();
2296 (void)efx_reset(efx, fls(pending) - 1);
2297 rtnl_unlock();
2298 }
2299
2300 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2301 {
2302 enum reset_type method;
2303
2304 switch (type) {
2305 case RESET_TYPE_INVISIBLE:
2306 case RESET_TYPE_ALL:
2307 case RESET_TYPE_WORLD:
2308 case RESET_TYPE_DISABLE:
2309 method = type;
2310 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2311 RESET_TYPE(method));
2312 break;
2313 default:
2314 method = efx->type->map_reset_reason(type);
2315 netif_dbg(efx, drv, efx->net_dev,
2316 "scheduling %s reset for %s\n",
2317 RESET_TYPE(method), RESET_TYPE(type));
2318 break;
2319 }
2320
2321 set_bit(method, &efx->reset_pending);
2322
2323 /* efx_process_channel() will no longer read events once a
2324 * reset is scheduled. So switch back to poll'd MCDI completions. */
2325 efx_mcdi_mode_poll(efx);
2326
2327 queue_work(reset_workqueue, &efx->reset_work);
2328 }
2329
2330 /**************************************************************************
2331 *
2332 * List of NICs we support
2333 *
2334 **************************************************************************/
2335
2336 /* PCI device ID table */
2337 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2338 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2339 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2340 .driver_data = (unsigned long) &falcon_a1_nic_type},
2341 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2342 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2343 .driver_data = (unsigned long) &falcon_b0_nic_type},
2344 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2345 .driver_data = (unsigned long) &siena_a0_nic_type},
2346 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2347 .driver_data = (unsigned long) &siena_a0_nic_type},
2348 {0} /* end of list */
2349 };
2350
2351 /**************************************************************************
2352 *
2353 * Dummy PHY/MAC operations
2354 *
2355 * Can be used for some unimplemented operations
2356 * Needed so all function pointers are valid and do not have to be tested
2357 * before use
2358 *
2359 **************************************************************************/
2360 int efx_port_dummy_op_int(struct efx_nic *efx)
2361 {
2362 return 0;
2363 }
2364 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2365
2366 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2367 {
2368 return false;
2369 }
2370
2371 static const struct efx_phy_operations efx_dummy_phy_operations = {
2372 .init = efx_port_dummy_op_int,
2373 .reconfigure = efx_port_dummy_op_int,
2374 .poll = efx_port_dummy_op_poll,
2375 .fini = efx_port_dummy_op_void,
2376 };
2377
2378 /**************************************************************************
2379 *
2380 * Data housekeeping
2381 *
2382 **************************************************************************/
2383
2384 /* This zeroes out and then fills in the invariants in a struct
2385 * efx_nic (including all sub-structures).
2386 */
2387 static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
2388 struct pci_dev *pci_dev, struct net_device *net_dev)
2389 {
2390 int i;
2391
2392 /* Initialise common structures */
2393 memset(efx, 0, sizeof(*efx));
2394 spin_lock_init(&efx->biu_lock);
2395 #ifdef CONFIG_SFC_MTD
2396 INIT_LIST_HEAD(&efx->mtd_list);
2397 #endif
2398 INIT_WORK(&efx->reset_work, efx_reset_work);
2399 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2400 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2401 efx->pci_dev = pci_dev;
2402 efx->msg_enable = debug;
2403 efx->state = STATE_INIT;
2404 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2405
2406 efx->net_dev = net_dev;
2407 spin_lock_init(&efx->stats_lock);
2408 mutex_init(&efx->mac_lock);
2409 efx->phy_op = &efx_dummy_phy_operations;
2410 efx->mdio.dev = net_dev;
2411 INIT_WORK(&efx->mac_work, efx_mac_work);
2412 init_waitqueue_head(&efx->flush_wq);
2413
2414 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2415 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2416 if (!efx->channel[i])
2417 goto fail;
2418 }
2419
2420 efx->type = type;
2421
2422 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2423
2424 /* Higher numbered interrupt modes are less capable! */
2425 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2426 interrupt_mode);
2427
2428 /* Would be good to use the net_dev name, but we're too early */
2429 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2430 pci_name(pci_dev));
2431 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2432 if (!efx->workqueue)
2433 goto fail;
2434
2435 return 0;
2436
2437 fail:
2438 efx_fini_struct(efx);
2439 return -ENOMEM;
2440 }
2441
2442 static void efx_fini_struct(struct efx_nic *efx)
2443 {
2444 int i;
2445
2446 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2447 kfree(efx->channel[i]);
2448
2449 if (efx->workqueue) {
2450 destroy_workqueue(efx->workqueue);
2451 efx->workqueue = NULL;
2452 }
2453 }
2454
2455 /**************************************************************************
2456 *
2457 * PCI interface
2458 *
2459 **************************************************************************/
2460
2461 /* Main body of final NIC shutdown code
2462 * This is called only at module unload (or hotplug removal).
2463 */
2464 static void efx_pci_remove_main(struct efx_nic *efx)
2465 {
2466 #ifdef CONFIG_RFS_ACCEL
2467 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2468 efx->net_dev->rx_cpu_rmap = NULL;
2469 #endif
2470 efx_stop_interrupts(efx, false);
2471 efx_nic_fini_interrupt(efx);
2472 efx_fini_port(efx);
2473 efx->type->fini(efx);
2474 efx_fini_napi(efx);
2475 efx_remove_all(efx);
2476 }
2477
2478 /* Final NIC shutdown
2479 * This is called only at module unload (or hotplug removal).
2480 */
2481 static void efx_pci_remove(struct pci_dev *pci_dev)
2482 {
2483 struct efx_nic *efx;
2484
2485 efx = pci_get_drvdata(pci_dev);
2486 if (!efx)
2487 return;
2488
2489 /* Mark the NIC as fini, then stop the interface */
2490 rtnl_lock();
2491 efx->state = STATE_FINI;
2492 dev_close(efx->net_dev);
2493
2494 /* Allow any queued efx_resets() to complete */
2495 rtnl_unlock();
2496
2497 efx_stop_interrupts(efx, false);
2498 efx_sriov_fini(efx);
2499 efx_unregister_netdev(efx);
2500
2501 efx_mtd_remove(efx);
2502
2503 /* Wait for any scheduled resets to complete. No more will be
2504 * scheduled from this point because efx_stop_all() has been
2505 * called, we are no longer registered with driverlink, and
2506 * the net_device's have been removed. */
2507 cancel_work_sync(&efx->reset_work);
2508
2509 efx_pci_remove_main(efx);
2510
2511 efx_fini_io(efx);
2512 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2513
2514 pci_set_drvdata(pci_dev, NULL);
2515 efx_fini_struct(efx);
2516 free_netdev(efx->net_dev);
2517 };
2518
2519 /* NIC VPD information
2520 * Called during probe to display the part number of the
2521 * installed NIC. VPD is potentially very large but this should
2522 * always appear within the first 512 bytes.
2523 */
2524 #define SFC_VPD_LEN 512
2525 static void efx_print_product_vpd(struct efx_nic *efx)
2526 {
2527 struct pci_dev *dev = efx->pci_dev;
2528 char vpd_data[SFC_VPD_LEN];
2529 ssize_t vpd_size;
2530 int i, j;
2531
2532 /* Get the vpd data from the device */
2533 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2534 if (vpd_size <= 0) {
2535 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2536 return;
2537 }
2538
2539 /* Get the Read only section */
2540 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2541 if (i < 0) {
2542 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2543 return;
2544 }
2545
2546 j = pci_vpd_lrdt_size(&vpd_data[i]);
2547 i += PCI_VPD_LRDT_TAG_SIZE;
2548 if (i + j > vpd_size)
2549 j = vpd_size - i;
2550
2551 /* Get the Part number */
2552 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2553 if (i < 0) {
2554 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2555 return;
2556 }
2557
2558 j = pci_vpd_info_field_size(&vpd_data[i]);
2559 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2560 if (i + j > vpd_size) {
2561 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2562 return;
2563 }
2564
2565 netif_info(efx, drv, efx->net_dev,
2566 "Part Number : %.*s\n", j, &vpd_data[i]);
2567 }
2568
2569
2570 /* Main body of NIC initialisation
2571 * This is called at module load (or hotplug insertion, theoretically).
2572 */
2573 static int efx_pci_probe_main(struct efx_nic *efx)
2574 {
2575 int rc;
2576
2577 /* Do start-of-day initialisation */
2578 rc = efx_probe_all(efx);
2579 if (rc)
2580 goto fail1;
2581
2582 efx_init_napi(efx);
2583
2584 rc = efx->type->init(efx);
2585 if (rc) {
2586 netif_err(efx, probe, efx->net_dev,
2587 "failed to initialise NIC\n");
2588 goto fail3;
2589 }
2590
2591 rc = efx_init_port(efx);
2592 if (rc) {
2593 netif_err(efx, probe, efx->net_dev,
2594 "failed to initialise port\n");
2595 goto fail4;
2596 }
2597
2598 rc = efx_nic_init_interrupt(efx);
2599 if (rc)
2600 goto fail5;
2601 efx_start_interrupts(efx, false);
2602
2603 return 0;
2604
2605 fail5:
2606 efx_fini_port(efx);
2607 fail4:
2608 efx->type->fini(efx);
2609 fail3:
2610 efx_fini_napi(efx);
2611 efx_remove_all(efx);
2612 fail1:
2613 return rc;
2614 }
2615
2616 /* NIC initialisation
2617 *
2618 * This is called at module load (or hotplug insertion,
2619 * theoretically). It sets up PCI mappings, resets the NIC,
2620 * sets up and registers the network devices with the kernel and hooks
2621 * the interrupt service routine. It does not prepare the device for
2622 * transmission; this is left to the first time one of the network
2623 * interfaces is brought up (i.e. efx_net_open).
2624 */
2625 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2626 const struct pci_device_id *entry)
2627 {
2628 const struct efx_nic_type *type = (const struct efx_nic_type *) entry->driver_data;
2629 struct net_device *net_dev;
2630 struct efx_nic *efx;
2631 int rc;
2632
2633 /* Allocate and initialise a struct net_device and struct efx_nic */
2634 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2635 EFX_MAX_RX_QUEUES);
2636 if (!net_dev)
2637 return -ENOMEM;
2638 net_dev->features |= (type->offload_features | NETIF_F_SG |
2639 NETIF_F_HIGHDMA | NETIF_F_TSO |
2640 NETIF_F_RXCSUM);
2641 if (type->offload_features & NETIF_F_V6_CSUM)
2642 net_dev->features |= NETIF_F_TSO6;
2643 /* Mask for features that also apply to VLAN devices */
2644 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2645 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2646 NETIF_F_RXCSUM);
2647 /* All offloads can be toggled */
2648 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2649 efx = netdev_priv(net_dev);
2650 pci_set_drvdata(pci_dev, efx);
2651 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2652 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2653 if (rc)
2654 goto fail1;
2655
2656 netif_info(efx, probe, efx->net_dev,
2657 "Solarflare NIC detected\n");
2658
2659 efx_print_product_vpd(efx);
2660
2661 /* Set up basic I/O (BAR mappings etc) */
2662 rc = efx_init_io(efx);
2663 if (rc)
2664 goto fail2;
2665
2666 rc = efx_pci_probe_main(efx);
2667
2668 /* Serialise against efx_reset(). No more resets will be
2669 * scheduled since efx_stop_all() has been called, and we have
2670 * not and never have been registered.
2671 */
2672 cancel_work_sync(&efx->reset_work);
2673
2674 if (rc)
2675 goto fail3;
2676
2677 /* If there was a scheduled reset during probe, the NIC is
2678 * probably hosed anyway.
2679 */
2680 if (efx->reset_pending) {
2681 rc = -EIO;
2682 goto fail4;
2683 }
2684
2685 /* Switch to the running state before we expose the device to the OS,
2686 * so that dev_open()|efx_start_all() will actually start the device */
2687 efx->state = STATE_RUNNING;
2688
2689 rc = efx_register_netdev(efx);
2690 if (rc)
2691 goto fail4;
2692
2693 rc = efx_sriov_init(efx);
2694 if (rc)
2695 netif_err(efx, probe, efx->net_dev,
2696 "SR-IOV can't be enabled rc %d\n", rc);
2697
2698 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2699
2700 /* Try to create MTDs, but allow this to fail */
2701 rtnl_lock();
2702 rc = efx_mtd_probe(efx);
2703 rtnl_unlock();
2704 if (rc)
2705 netif_warn(efx, probe, efx->net_dev,
2706 "failed to create MTDs (%d)\n", rc);
2707
2708 return 0;
2709
2710 fail4:
2711 efx_pci_remove_main(efx);
2712 fail3:
2713 efx_fini_io(efx);
2714 fail2:
2715 efx_fini_struct(efx);
2716 fail1:
2717 WARN_ON(rc > 0);
2718 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2719 free_netdev(net_dev);
2720 return rc;
2721 }
2722
2723 static int efx_pm_freeze(struct device *dev)
2724 {
2725 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2726
2727 efx->state = STATE_FINI;
2728
2729 efx_device_detach_sync(efx);
2730
2731 efx_stop_all(efx);
2732 efx_stop_interrupts(efx, false);
2733
2734 return 0;
2735 }
2736
2737 static int efx_pm_thaw(struct device *dev)
2738 {
2739 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2740
2741 efx->state = STATE_INIT;
2742
2743 efx_start_interrupts(efx, false);
2744
2745 mutex_lock(&efx->mac_lock);
2746 efx->phy_op->reconfigure(efx);
2747 mutex_unlock(&efx->mac_lock);
2748
2749 efx_start_all(efx);
2750
2751 netif_device_attach(efx->net_dev);
2752
2753 efx->state = STATE_RUNNING;
2754
2755 efx->type->resume_wol(efx);
2756
2757 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2758 queue_work(reset_workqueue, &efx->reset_work);
2759
2760 return 0;
2761 }
2762
2763 static int efx_pm_poweroff(struct device *dev)
2764 {
2765 struct pci_dev *pci_dev = to_pci_dev(dev);
2766 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2767
2768 efx->type->fini(efx);
2769
2770 efx->reset_pending = 0;
2771
2772 pci_save_state(pci_dev);
2773 return pci_set_power_state(pci_dev, PCI_D3hot);
2774 }
2775
2776 /* Used for both resume and restore */
2777 static int efx_pm_resume(struct device *dev)
2778 {
2779 struct pci_dev *pci_dev = to_pci_dev(dev);
2780 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2781 int rc;
2782
2783 rc = pci_set_power_state(pci_dev, PCI_D0);
2784 if (rc)
2785 return rc;
2786 pci_restore_state(pci_dev);
2787 rc = pci_enable_device(pci_dev);
2788 if (rc)
2789 return rc;
2790 pci_set_master(efx->pci_dev);
2791 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2792 if (rc)
2793 return rc;
2794 rc = efx->type->init(efx);
2795 if (rc)
2796 return rc;
2797 efx_pm_thaw(dev);
2798 return 0;
2799 }
2800
2801 static int efx_pm_suspend(struct device *dev)
2802 {
2803 int rc;
2804
2805 efx_pm_freeze(dev);
2806 rc = efx_pm_poweroff(dev);
2807 if (rc)
2808 efx_pm_resume(dev);
2809 return rc;
2810 }
2811
2812 static const struct dev_pm_ops efx_pm_ops = {
2813 .suspend = efx_pm_suspend,
2814 .resume = efx_pm_resume,
2815 .freeze = efx_pm_freeze,
2816 .thaw = efx_pm_thaw,
2817 .poweroff = efx_pm_poweroff,
2818 .restore = efx_pm_resume,
2819 };
2820
2821 static struct pci_driver efx_pci_driver = {
2822 .name = KBUILD_MODNAME,
2823 .id_table = efx_pci_table,
2824 .probe = efx_pci_probe,
2825 .remove = efx_pci_remove,
2826 .driver.pm = &efx_pm_ops,
2827 };
2828
2829 /**************************************************************************
2830 *
2831 * Kernel module interface
2832 *
2833 *************************************************************************/
2834
2835 module_param(interrupt_mode, uint, 0444);
2836 MODULE_PARM_DESC(interrupt_mode,
2837 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2838
2839 static int __init efx_init_module(void)
2840 {
2841 int rc;
2842
2843 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2844
2845 rc = register_netdevice_notifier(&efx_netdev_notifier);
2846 if (rc)
2847 goto err_notifier;
2848
2849 rc = efx_init_sriov();
2850 if (rc)
2851 goto err_sriov;
2852
2853 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2854 if (!reset_workqueue) {
2855 rc = -ENOMEM;
2856 goto err_reset;
2857 }
2858
2859 rc = pci_register_driver(&efx_pci_driver);
2860 if (rc < 0)
2861 goto err_pci;
2862
2863 return 0;
2864
2865 err_pci:
2866 destroy_workqueue(reset_workqueue);
2867 err_reset:
2868 efx_fini_sriov();
2869 err_sriov:
2870 unregister_netdevice_notifier(&efx_netdev_notifier);
2871 err_notifier:
2872 return rc;
2873 }
2874
2875 static void __exit efx_exit_module(void)
2876 {
2877 printk(KERN_INFO "Solarflare NET driver unloading\n");
2878
2879 pci_unregister_driver(&efx_pci_driver);
2880 destroy_workqueue(reset_workqueue);
2881 efx_fini_sriov();
2882 unregister_netdevice_notifier(&efx_netdev_notifier);
2883
2884 }
2885
2886 module_init(efx_init_module);
2887 module_exit(efx_exit_module);
2888
2889 MODULE_AUTHOR("Solarflare Communications and "
2890 "Michael Brown <mbrown@fensystems.co.uk>");
2891 MODULE_DESCRIPTION("Solarflare Communications network driver");
2892 MODULE_LICENSE("GPL");
2893 MODULE_DEVICE_TABLE(pci, efx_pci_table);
Linux with added FPC-III support