2 * Driver for Vitesse PHYs
4 * Author: Kriston Carson
6 * Copyright (c) 2005, 2009 Freescale Semiconductor, Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/mii.h>
18 #include <linux/ethtool.h>
19 #include <linux/phy.h>
21 /* Vitesse Extended Control Register 1 */
22 #define MII_VSC8244_EXT_CON1 0x17
23 #define MII_VSC8244_EXTCON1_INIT 0x0000
24 #define MII_VSC8244_EXTCON1_TX_SKEW_MASK 0x0c00
25 #define MII_VSC8244_EXTCON1_RX_SKEW_MASK 0x0300
26 #define MII_VSC8244_EXTCON1_TX_SKEW 0x0800
27 #define MII_VSC8244_EXTCON1_RX_SKEW 0x0200
29 /* Vitesse Interrupt Mask Register */
30 #define MII_VSC8244_IMASK 0x19
31 #define MII_VSC8244_IMASK_IEN 0x8000
32 #define MII_VSC8244_IMASK_SPEED 0x4000
33 #define MII_VSC8244_IMASK_LINK 0x2000
34 #define MII_VSC8244_IMASK_DUPLEX 0x1000
35 #define MII_VSC8244_IMASK_MASK 0xf000
37 #define MII_VSC8221_IMASK_MASK 0xa000
39 /* Vitesse Interrupt Status Register */
40 #define MII_VSC8244_ISTAT 0x1a
41 #define MII_VSC8244_ISTAT_STATUS 0x8000
42 #define MII_VSC8244_ISTAT_SPEED 0x4000
43 #define MII_VSC8244_ISTAT_LINK 0x2000
44 #define MII_VSC8244_ISTAT_DUPLEX 0x1000
46 /* Vitesse Auxiliary Control/Status Register */
47 #define MII_VSC8244_AUX_CONSTAT 0x1c
48 #define MII_VSC8244_AUXCONSTAT_INIT 0x0000
49 #define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020
50 #define MII_VSC8244_AUXCONSTAT_SPEED 0x0018
51 #define MII_VSC8244_AUXCONSTAT_GBIT 0x0010
52 #define MII_VSC8244_AUXCONSTAT_100 0x0008
54 #define MII_VSC8221_AUXCONSTAT_INIT 0x0004 /* need to set this bit? */
55 #define MII_VSC8221_AUXCONSTAT_RESERVED 0x0004
57 #define PHY_ID_VSC8244 0x000fc6c0
58 #define PHY_ID_VSC8221 0x000fc550
60 MODULE_DESCRIPTION("Vitesse PHY driver");
61 MODULE_AUTHOR("Kriston Carson");
62 MODULE_LICENSE("GPL");
64 int vsc824x_add_skew(struct phy_device
*phydev
)
69 extcon
= phy_read(phydev
, MII_VSC8244_EXT_CON1
);
74 extcon
&= ~(MII_VSC8244_EXTCON1_TX_SKEW_MASK
|
75 MII_VSC8244_EXTCON1_RX_SKEW_MASK
);
77 extcon
|= (MII_VSC8244_EXTCON1_TX_SKEW
|
78 MII_VSC8244_EXTCON1_RX_SKEW
);
80 err
= phy_write(phydev
, MII_VSC8244_EXT_CON1
, extcon
);
84 EXPORT_SYMBOL(vsc824x_add_skew
);
86 static int vsc824x_config_init(struct phy_device
*phydev
)
90 err
= phy_write(phydev
, MII_VSC8244_AUX_CONSTAT
,
91 MII_VSC8244_AUXCONSTAT_INIT
);
95 if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_ID
)
96 err
= vsc824x_add_skew(phydev
);
101 static int vsc824x_ack_interrupt(struct phy_device
*phydev
)
106 * Don't bother to ACK the interrupts if interrupts
107 * are disabled. The 824x cannot clear the interrupts
108 * if they are disabled.
110 if (phydev
->interrupts
== PHY_INTERRUPT_ENABLED
)
111 err
= phy_read(phydev
, MII_VSC8244_ISTAT
);
113 return (err
< 0) ? err
: 0;
116 static int vsc82xx_config_intr(struct phy_device
*phydev
)
120 if (phydev
->interrupts
== PHY_INTERRUPT_ENABLED
)
121 err
= phy_write(phydev
, MII_VSC8244_IMASK
,
122 phydev
->drv
->phy_id
== PHY_ID_VSC8244
?
123 MII_VSC8244_IMASK_MASK
:
124 MII_VSC8221_IMASK_MASK
);
127 * The Vitesse PHY cannot clear the interrupt
128 * once it has disabled them, so we clear them first
130 err
= phy_read(phydev
, MII_VSC8244_ISTAT
);
135 err
= phy_write(phydev
, MII_VSC8244_IMASK
, 0);
142 static struct phy_driver vsc8244_driver
= {
143 .phy_id
= PHY_ID_VSC8244
,
144 .name
= "Vitesse VSC8244",
145 .phy_id_mask
= 0x000fffc0,
146 .features
= PHY_GBIT_FEATURES
,
147 .flags
= PHY_HAS_INTERRUPT
,
148 .config_init
= &vsc824x_config_init
,
149 .config_aneg
= &genphy_config_aneg
,
150 .read_status
= &genphy_read_status
,
151 .ack_interrupt
= &vsc824x_ack_interrupt
,
152 .config_intr
= &vsc82xx_config_intr
,
153 .driver
= { .owner
= THIS_MODULE
,},
156 static int vsc8221_config_init(struct phy_device
*phydev
)
160 err
= phy_write(phydev
, MII_VSC8244_AUX_CONSTAT
,
161 MII_VSC8221_AUXCONSTAT_INIT
);
164 /* Perhaps we should set EXT_CON1 based on the interface?
165 Options are 802.3Z SerDes or SGMII */
169 static struct phy_driver vsc8221_driver
= {
170 .phy_id
= PHY_ID_VSC8221
,
171 .phy_id_mask
= 0x000ffff0,
172 .name
= "Vitesse VSC8221",
173 .features
= PHY_GBIT_FEATURES
,
174 .flags
= PHY_HAS_INTERRUPT
,
175 .config_init
= &vsc8221_config_init
,
176 .config_aneg
= &genphy_config_aneg
,
177 .read_status
= &genphy_read_status
,
178 .ack_interrupt
= &vsc824x_ack_interrupt
,
179 .config_intr
= &vsc82xx_config_intr
,
180 .driver
= { .owner
= THIS_MODULE
,},
183 static int __init
vsc82xx_init(void)
187 err
= phy_driver_register(&vsc8244_driver
);
190 err
= phy_driver_register(&vsc8221_driver
);
192 phy_driver_unregister(&vsc8244_driver
);
196 static void __exit
vsc82xx_exit(void)
198 phy_driver_unregister(&vsc8244_driver
);
199 phy_driver_unregister(&vsc8221_driver
);
202 module_init(vsc82xx_init
);
203 module_exit(vsc82xx_exit
);
205 static struct mdio_device_id __maybe_unused vitesse_tbl
[] = {
206 { PHY_ID_VSC8244
, 0x000fffc0 },
207 { PHY_ID_VSC8221
, 0x000ffff0 },
211 MODULE_DEVICE_TABLE(mdio
, vitesse_tbl
);