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Linux 3.4.102
[linux/fpc-iii.git] / drivers / net / usb / asix.c
blobe3e0ca1e92e291f7b48c1cbecc2e2a3bee04254c
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
25
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37 #include <linux/slab.h>
38 #include <linux/if_vlan.h>
39
40 #define DRIVER_VERSION "22-Dec-2011"
41 #define DRIVER_NAME "asix"
42
43 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
44
45 #define AX_CMD_SET_SW_MII 0x06
46 #define AX_CMD_READ_MII_REG 0x07
47 #define AX_CMD_WRITE_MII_REG 0x08
48 #define AX_CMD_SET_HW_MII 0x0a
49 #define AX_CMD_READ_EEPROM 0x0b
50 #define AX_CMD_WRITE_EEPROM 0x0c
51 #define AX_CMD_WRITE_ENABLE 0x0d
52 #define AX_CMD_WRITE_DISABLE 0x0e
53 #define AX_CMD_READ_RX_CTL 0x0f
54 #define AX_CMD_WRITE_RX_CTL 0x10
55 #define AX_CMD_READ_IPG012 0x11
56 #define AX_CMD_WRITE_IPG0 0x12
57 #define AX_CMD_WRITE_IPG1 0x13
58 #define AX_CMD_READ_NODE_ID 0x13
59 #define AX_CMD_WRITE_NODE_ID 0x14
60 #define AX_CMD_WRITE_IPG2 0x14
61 #define AX_CMD_WRITE_MULTI_FILTER 0x16
62 #define AX88172_CMD_READ_NODE_ID 0x17
63 #define AX_CMD_READ_PHY_ID 0x19
64 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
65 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
66 #define AX_CMD_READ_MONITOR_MODE 0x1c
67 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
68 #define AX_CMD_READ_GPIOS 0x1e
69 #define AX_CMD_WRITE_GPIOS 0x1f
70 #define AX_CMD_SW_RESET 0x20
71 #define AX_CMD_SW_PHY_STATUS 0x21
72 #define AX_CMD_SW_PHY_SELECT 0x22
73
74 #define AX_MONITOR_MODE 0x01
75 #define AX_MONITOR_LINK 0x02
76 #define AX_MONITOR_MAGIC 0x04
77 #define AX_MONITOR_HSFS 0x10
78
79 /* AX88172 Medium Status Register values */
80 #define AX88172_MEDIUM_FD 0x02
81 #define AX88172_MEDIUM_TX 0x04
82 #define AX88172_MEDIUM_FC 0x10
83 #define AX88172_MEDIUM_DEFAULT \
84 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
85
86 #define AX_MCAST_FILTER_SIZE 8
87 #define AX_MAX_MCAST 64
88
89 #define AX_SWRESET_CLEAR 0x00
90 #define AX_SWRESET_RR 0x01
91 #define AX_SWRESET_RT 0x02
92 #define AX_SWRESET_PRTE 0x04
93 #define AX_SWRESET_PRL 0x08
94 #define AX_SWRESET_BZ 0x10
95 #define AX_SWRESET_IPRL 0x20
96 #define AX_SWRESET_IPPD 0x40
97
98 #define AX88772_IPG0_DEFAULT 0x15
99 #define AX88772_IPG1_DEFAULT 0x0c
100 #define AX88772_IPG2_DEFAULT 0x12
101
102 /* AX88772 & AX88178 Medium Mode Register */
103 #define AX_MEDIUM_PF 0x0080
104 #define AX_MEDIUM_JFE 0x0040
105 #define AX_MEDIUM_TFC 0x0020
106 #define AX_MEDIUM_RFC 0x0010
107 #define AX_MEDIUM_ENCK 0x0008
108 #define AX_MEDIUM_AC 0x0004
109 #define AX_MEDIUM_FD 0x0002
110 #define AX_MEDIUM_GM 0x0001
111 #define AX_MEDIUM_SM 0x1000
112 #define AX_MEDIUM_SBP 0x0800
113 #define AX_MEDIUM_PS 0x0200
114 #define AX_MEDIUM_RE 0x0100
115
116 #define AX88178_MEDIUM_DEFAULT \
117 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
118 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
119 AX_MEDIUM_RE)
120
121 #define AX88772_MEDIUM_DEFAULT \
122 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
123 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
124 AX_MEDIUM_AC | AX_MEDIUM_RE)
125
126 /* AX88772 & AX88178 RX_CTL values */
127 #define AX_RX_CTL_SO 0x0080
128 #define AX_RX_CTL_AP 0x0020
129 #define AX_RX_CTL_AM 0x0010
130 #define AX_RX_CTL_AB 0x0008
131 #define AX_RX_CTL_SEP 0x0004
132 #define AX_RX_CTL_AMALL 0x0002
133 #define AX_RX_CTL_PRO 0x0001
134 #define AX_RX_CTL_MFB_2048 0x0000
135 #define AX_RX_CTL_MFB_4096 0x0100
136 #define AX_RX_CTL_MFB_8192 0x0200
137 #define AX_RX_CTL_MFB_16384 0x0300
138
139 #define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB)
140
141 /* GPIO 0 .. 2 toggles */
142 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
143 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
144 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
145 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
146 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
147 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
148 #define AX_GPIO_RESERVED 0x40 /* Reserved */
149 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
150
151 #define AX_EEPROM_MAGIC 0xdeadbeef
152 #define AX88172_EEPROM_LEN 0x40
153 #define AX88772_EEPROM_LEN 0xff
154
155 #define PHY_MODE_MARVELL 0x0000
156 #define MII_MARVELL_LED_CTRL 0x0018
157 #define MII_MARVELL_STATUS 0x001b
158 #define MII_MARVELL_CTRL 0x0014
159
160 #define MARVELL_LED_MANUAL 0x0019
161
162 #define MARVELL_STATUS_HWCFG 0x0004
163
164 #define MARVELL_CTRL_TXDELAY 0x0002
165 #define MARVELL_CTRL_RXDELAY 0x0080
166
167 #define PHY_MODE_RTL8211CL 0x000C
168
169 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
170 struct asix_data {
171 u8 multi_filter[AX_MCAST_FILTER_SIZE];
172 u8 mac_addr[ETH_ALEN];
173 u8 phymode;
174 u8 ledmode;
175 u8 eeprom_len;
176 };
177
178 struct ax88172_int_data {
179 __le16 res1;
180 u8 link;
181 __le16 res2;
182 u8 status;
183 __le16 res3;
184 } __packed;
185
186 struct asix_rx_fixup_info {
187 struct sk_buff *ax_skb;
188 u32 header;
189 u16 size;
190 bool split_head;
191 };
192
193 struct asix_common_private {
194 struct asix_rx_fixup_info rx_fixup_info;
195 };
196
197 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
198 u16 size, void *data)
199 {
200 void *buf;
201 int err = -ENOMEM;
202
203 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
204 cmd, value, index, size);
205
206 buf = kmalloc(size, GFP_KERNEL);
207 if (!buf)
208 goto out;
209
210 err = usb_control_msg(
211 dev->udev,
212 usb_rcvctrlpipe(dev->udev, 0),
213 cmd,
214 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
215 value,
216 index,
217 buf,
218 size,
219 USB_CTRL_GET_TIMEOUT);
220 if (err == size)
221 memcpy(data, buf, size);
222 else if (err >= 0)
223 err = -EINVAL;
224 kfree(buf);
225
226 out:
227 return err;
228 }
229
230 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
231 u16 size, void *data)
232 {
233 void *buf = NULL;
234 int err = -ENOMEM;
235
236 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
237 cmd, value, index, size);
238
239 if (data) {
240 buf = kmemdup(data, size, GFP_KERNEL);
241 if (!buf)
242 goto out;
243 }
244
245 err = usb_control_msg(
246 dev->udev,
247 usb_sndctrlpipe(dev->udev, 0),
248 cmd,
249 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
250 value,
251 index,
252 buf,
253 size,
254 USB_CTRL_SET_TIMEOUT);
255 kfree(buf);
256
257 out:
258 return err;
259 }
260
261 static void asix_async_cmd_callback(struct urb *urb)
262 {
263 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
264 int status = urb->status;
265
266 if (status < 0)
267 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
268 status);
269
270 kfree(req);
271 usb_free_urb(urb);
272 }
273
274 static void
275 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
276 u16 size, void *data)
277 {
278 struct usb_ctrlrequest *req;
279 int status;
280 struct urb *urb;
281
282 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
283 cmd, value, index, size);
284
285 urb = usb_alloc_urb(0, GFP_ATOMIC);
286 if (!urb) {
287 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
288 return;
289 }
290
291 req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC);
292 if (!req) {
293 netdev_err(dev->net, "Failed to allocate memory for control request\n");
294 usb_free_urb(urb);
295 return;
296 }
297
298 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
299 req->bRequest = cmd;
300 req->wValue = cpu_to_le16(value);
301 req->wIndex = cpu_to_le16(index);
302 req->wLength = cpu_to_le16(size);
303
304 usb_fill_control_urb(urb, dev->udev,
305 usb_sndctrlpipe(dev->udev, 0),
306 (void *)req, data, size,
307 asix_async_cmd_callback, req);
308
309 status = usb_submit_urb(urb, GFP_ATOMIC);
310 if (status < 0) {
311 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
312 status);
313 kfree(req);
314 usb_free_urb(urb);
315 }
316 }
317
318 static int asix_rx_fixup_internal(struct usbnet *dev, struct sk_buff *skb,
319 struct asix_rx_fixup_info *rx)
320 {
321 int offset = 0;
322
323 while (offset + sizeof(u16) <= skb->len) {
324 u16 remaining = 0;
325 unsigned char *data;
326
327 if (!rx->size) {
328 if ((skb->len - offset == sizeof(u16)) ||
329 rx->split_head) {
330 if (!rx->split_head) {
331 rx->header = get_unaligned_le16(
332 skb->data + offset);
333 rx->split_head = true;
334 offset += sizeof(u16);
335 break;
336 } else {
337 rx->header |= (get_unaligned_le16(
338 skb->data + offset)
339 << 16);
340 rx->split_head = false;
341 offset += sizeof(u16);
342 }
343 } else {
344 rx->header = get_unaligned_le32(skb->data +
345 offset);
346 offset += sizeof(u32);
347 }
348
349 /* get the packet length */
350 rx->size = (u16) (rx->header & 0x7ff);
351 if (rx->size != ((~rx->header >> 16) & 0x7ff)) {
352 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length 0x%x, offset %d\n",
353 rx->header, offset);
354 rx->size = 0;
355 return 0;
356 }
357 rx->ax_skb = netdev_alloc_skb_ip_align(dev->net,
358 rx->size);
359 if (!rx->ax_skb)
360 return 0;
361 }
362
363 if (rx->size > dev->net->mtu + ETH_HLEN + VLAN_HLEN) {
364 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
365 rx->size);
366 kfree_skb(rx->ax_skb);
367 return 0;
368 }
369
370 if (rx->size > skb->len - offset) {
371 remaining = rx->size - (skb->len - offset);
372 rx->size = skb->len - offset;
373 }
374
375 data = skb_put(rx->ax_skb, rx->size);
376 memcpy(data, skb->data + offset, rx->size);
377 if (!remaining)
378 usbnet_skb_return(dev, rx->ax_skb);
379
380 offset += (rx->size + 1) & 0xfffe;
381 rx->size = remaining;
382 }
383
384 if (skb->len != offset) {
385 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d, %d\n",
386 skb->len, offset);
387 return 0;
388 }
389
390 return 1;
391 }
392
393 static int asix_rx_fixup_common(struct usbnet *dev, struct sk_buff *skb)
394 {
395 struct asix_common_private *dp = dev->driver_priv;
396 struct asix_rx_fixup_info *rx = &dp->rx_fixup_info;
397
398 return asix_rx_fixup_internal(dev, skb, rx);
399 }
400
401 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
402 gfp_t flags)
403 {
404 int padlen;
405 int headroom = skb_headroom(skb);
406 int tailroom = skb_tailroom(skb);
407 u32 packet_len;
408 u32 padbytes = 0xffff0000;
409
410 padlen = ((skb->len + 4) & (dev->maxpacket - 1)) ? 0 : 4;
411
412 if ((!skb_cloned(skb)) &&
413 ((headroom + tailroom) >= (4 + padlen))) {
414 if ((headroom < 4) || (tailroom < padlen)) {
415 skb->data = memmove(skb->head + 4, skb->data, skb->len);
416 skb_set_tail_pointer(skb, skb->len);
417 }
418 } else {
419 struct sk_buff *skb2;
420 skb2 = skb_copy_expand(skb, 4, padlen, flags);
421 dev_kfree_skb_any(skb);
422 skb = skb2;
423 if (!skb)
424 return NULL;
425 }
426
427 skb_push(skb, 4);
428 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
429 cpu_to_le32s(&packet_len);
430 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
431
432 if (padlen) {
433 cpu_to_le32s(&padbytes);
434 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
435 skb_put(skb, sizeof(padbytes));
436 }
437 return skb;
438 }
439
440 static void asix_status(struct usbnet *dev, struct urb *urb)
441 {
442 struct ax88172_int_data *event;
443 int link;
444
445 if (urb->actual_length < 8)
446 return;
447
448 event = urb->transfer_buffer;
449 link = event->link & 0x01;
450 if (netif_carrier_ok(dev->net) != link) {
451 if (link) {
452 netif_carrier_on(dev->net);
453 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
454 } else
455 netif_carrier_off(dev->net);
456 netdev_dbg(dev->net, "Link Status is: %d\n", link);
457 }
458 }
459
460 static inline int asix_set_sw_mii(struct usbnet *dev)
461 {
462 int ret;
463 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
464 if (ret < 0)
465 netdev_err(dev->net, "Failed to enable software MII access\n");
466 return ret;
467 }
468
469 static inline int asix_set_hw_mii(struct usbnet *dev)
470 {
471 int ret;
472 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
473 if (ret < 0)
474 netdev_err(dev->net, "Failed to enable hardware MII access\n");
475 return ret;
476 }
477
478 static inline int asix_get_phy_addr(struct usbnet *dev)
479 {
480 u8 buf[2];
481 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
482
483 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
484
485 if (ret < 0) {
486 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
487 goto out;
488 }
489 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
490 *((__le16 *)buf));
491 ret = buf[1];
492
493 out:
494 return ret;
495 }
496
497 static int asix_sw_reset(struct usbnet *dev, u8 flags)
498 {
499 int ret;
500
501 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
502 if (ret < 0)
503 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
504
505 return ret;
506 }
507
508 static u16 asix_read_rx_ctl(struct usbnet *dev)
509 {
510 __le16 v;
511 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
512
513 if (ret < 0) {
514 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
515 goto out;
516 }
517 ret = le16_to_cpu(v);
518 out:
519 return ret;
520 }
521
522 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
523 {
524 int ret;
525
526 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
527 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
528 if (ret < 0)
529 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
530 mode, ret);
531
532 return ret;
533 }
534
535 static u16 asix_read_medium_status(struct usbnet *dev)
536 {
537 __le16 v;
538 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
539
540 if (ret < 0) {
541 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
542 ret);
543 return ret; /* TODO: callers not checking for error ret */
544 }
545
546 return le16_to_cpu(v);
547
548 }
549
550 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
551 {
552 int ret;
553
554 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
555 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
556 if (ret < 0)
557 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
558 mode, ret);
559
560 return ret;
561 }
562
563 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
564 {
565 int ret;
566
567 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
568 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
569 if (ret < 0)
570 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
571 value, ret);
572
573 if (sleep)
574 msleep(sleep);
575
576 return ret;
577 }
578
579 /*
580 * AX88772 & AX88178 have a 16-bit RX_CTL value
581 */
582 static void asix_set_multicast(struct net_device *net)
583 {
584 struct usbnet *dev = netdev_priv(net);
585 struct asix_data *data = (struct asix_data *)&dev->data;
586 u16 rx_ctl = AX_DEFAULT_RX_CTL;
587
588 if (net->flags & IFF_PROMISC) {
589 rx_ctl |= AX_RX_CTL_PRO;
590 } else if (net->flags & IFF_ALLMULTI ||
591 netdev_mc_count(net) > AX_MAX_MCAST) {
592 rx_ctl |= AX_RX_CTL_AMALL;
593 } else if (netdev_mc_empty(net)) {
594 /* just broadcast and directed */
595 } else {
596 /* We use the 20 byte dev->data
597 * for our 8 byte filter buffer
598 * to avoid allocating memory that
599 * is tricky to free later */
600 struct netdev_hw_addr *ha;
601 u32 crc_bits;
602
603 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
604
605 /* Build the multicast hash filter. */
606 netdev_for_each_mc_addr(ha, net) {
607 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
608 data->multi_filter[crc_bits >> 3] |=
609 1 << (crc_bits & 7);
610 }
611
612 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
613 AX_MCAST_FILTER_SIZE, data->multi_filter);
614
615 rx_ctl |= AX_RX_CTL_AM;
616 }
617
618 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
619 }
620
621 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
622 {
623 struct usbnet *dev = netdev_priv(netdev);
624 __le16 res;
625
626 mutex_lock(&dev->phy_mutex);
627 asix_set_sw_mii(dev);
628 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
629 (__u16)loc, 2, &res);
630 asix_set_hw_mii(dev);
631 mutex_unlock(&dev->phy_mutex);
632
633 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
634 phy_id, loc, le16_to_cpu(res));
635
636 return le16_to_cpu(res);
637 }
638
639 static void
640 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
641 {
642 struct usbnet *dev = netdev_priv(netdev);
643 __le16 res = cpu_to_le16(val);
644
645 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
646 phy_id, loc, val);
647 mutex_lock(&dev->phy_mutex);
648 asix_set_sw_mii(dev);
649 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
650 asix_set_hw_mii(dev);
651 mutex_unlock(&dev->phy_mutex);
652 }
653
654 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
655 static u32 asix_get_phyid(struct usbnet *dev)
656 {
657 int phy_reg;
658 u32 phy_id;
659 int i;
660
661 /* Poll for the rare case the FW or phy isn't ready yet. */
662 for (i = 0; i < 100; i++) {
663 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
664 if (phy_reg != 0 && phy_reg != 0xFFFF)
665 break;
666 mdelay(1);
667 }
668
669 if (phy_reg <= 0 || phy_reg == 0xFFFF)
670 return 0;
671
672 phy_id = (phy_reg & 0xffff) << 16;
673
674 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
675 if (phy_reg < 0)
676 return 0;
677
678 phy_id |= (phy_reg & 0xffff);
679
680 return phy_id;
681 }
682
683 static void
684 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
685 {
686 struct usbnet *dev = netdev_priv(net);
687 u8 opt;
688
689 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
690 wolinfo->supported = 0;
691 wolinfo->wolopts = 0;
692 return;
693 }
694 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
695 wolinfo->wolopts = 0;
696 if (opt & AX_MONITOR_LINK)
697 wolinfo->wolopts |= WAKE_PHY;
698 if (opt & AX_MONITOR_MAGIC)
699 wolinfo->wolopts |= WAKE_MAGIC;
700 }
701
702 static int
703 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
704 {
705 struct usbnet *dev = netdev_priv(net);
706 u8 opt = 0;
707
708 if (wolinfo->wolopts & WAKE_PHY)
709 opt |= AX_MONITOR_LINK;
710 if (wolinfo->wolopts & WAKE_MAGIC)
711 opt |= AX_MONITOR_MAGIC;
712
713 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
714 opt, 0, 0, NULL) < 0)
715 return -EINVAL;
716
717 return 0;
718 }
719
720 static int asix_get_eeprom_len(struct net_device *net)
721 {
722 struct usbnet *dev = netdev_priv(net);
723 struct asix_data *data = (struct asix_data *)&dev->data;
724
725 return data->eeprom_len;
726 }
727
728 static int asix_get_eeprom(struct net_device *net,
729 struct ethtool_eeprom *eeprom, u8 *data)
730 {
731 struct usbnet *dev = netdev_priv(net);
732 __le16 *ebuf = (__le16 *)data;
733 int i;
734
735 /* Crude hack to ensure that we don't overwrite memory
736 * if an odd length is supplied
737 */
738 if (eeprom->len % 2)
739 return -EINVAL;
740
741 eeprom->magic = AX_EEPROM_MAGIC;
742
743 /* ax8817x returns 2 bytes from eeprom on read */
744 for (i=0; i < eeprom->len / 2; i++) {
745 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
746 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
747 return -EINVAL;
748 }
749 return 0;
750 }
751
752 static void asix_get_drvinfo (struct net_device *net,
753 struct ethtool_drvinfo *info)
754 {
755 struct usbnet *dev = netdev_priv(net);
756 struct asix_data *data = (struct asix_data *)&dev->data;
757
758 /* Inherit standard device info */
759 usbnet_get_drvinfo(net, info);
760 strncpy (info->driver, DRIVER_NAME, sizeof info->driver);
761 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
762 info->eedump_len = data->eeprom_len;
763 }
764
765 static u32 asix_get_link(struct net_device *net)
766 {
767 struct usbnet *dev = netdev_priv(net);
768
769 return mii_link_ok(&dev->mii);
770 }
771
772 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
773 {
774 struct usbnet *dev = netdev_priv(net);
775
776 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
777 }
778
779 static int asix_set_mac_address(struct net_device *net, void *p)
780 {
781 struct usbnet *dev = netdev_priv(net);
782 struct asix_data *data = (struct asix_data *)&dev->data;
783 struct sockaddr *addr = p;
784
785 if (netif_running(net))
786 return -EBUSY;
787 if (!is_valid_ether_addr(addr->sa_data))
788 return -EADDRNOTAVAIL;
789
790 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
791
792 /* We use the 20 byte dev->data
793 * for our 6 byte mac buffer
794 * to avoid allocating memory that
795 * is tricky to free later */
796 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
797 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
798 data->mac_addr);
799
800 return 0;
801 }
802
803 /* We need to override some ethtool_ops so we require our
804 own structure so we don't interfere with other usbnet
805 devices that may be connected at the same time. */
806 static const struct ethtool_ops ax88172_ethtool_ops = {
807 .get_drvinfo = asix_get_drvinfo,
808 .get_link = asix_get_link,
809 .get_msglevel = usbnet_get_msglevel,
810 .set_msglevel = usbnet_set_msglevel,
811 .get_wol = asix_get_wol,
812 .set_wol = asix_set_wol,
813 .get_eeprom_len = asix_get_eeprom_len,
814 .get_eeprom = asix_get_eeprom,
815 .get_settings = usbnet_get_settings,
816 .set_settings = usbnet_set_settings,
817 .nway_reset = usbnet_nway_reset,
818 };
819
820 static void ax88172_set_multicast(struct net_device *net)
821 {
822 struct usbnet *dev = netdev_priv(net);
823 struct asix_data *data = (struct asix_data *)&dev->data;
824 u8 rx_ctl = 0x8c;
825
826 if (net->flags & IFF_PROMISC) {
827 rx_ctl |= 0x01;
828 } else if (net->flags & IFF_ALLMULTI ||
829 netdev_mc_count(net) > AX_MAX_MCAST) {
830 rx_ctl |= 0x02;
831 } else if (netdev_mc_empty(net)) {
832 /* just broadcast and directed */
833 } else {
834 /* We use the 20 byte dev->data
835 * for our 8 byte filter buffer
836 * to avoid allocating memory that
837 * is tricky to free later */
838 struct netdev_hw_addr *ha;
839 u32 crc_bits;
840
841 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
842
843 /* Build the multicast hash filter. */
844 netdev_for_each_mc_addr(ha, net) {
845 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
846 data->multi_filter[crc_bits >> 3] |=
847 1 << (crc_bits & 7);
848 }
849
850 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
851 AX_MCAST_FILTER_SIZE, data->multi_filter);
852
853 rx_ctl |= 0x10;
854 }
855
856 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
857 }
858
859 static int ax88172_link_reset(struct usbnet *dev)
860 {
861 u8 mode;
862 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
863
864 mii_check_media(&dev->mii, 1, 1);
865 mii_ethtool_gset(&dev->mii, &ecmd);
866 mode = AX88172_MEDIUM_DEFAULT;
867
868 if (ecmd.duplex != DUPLEX_FULL)
869 mode |= ~AX88172_MEDIUM_FD;
870
871 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
872 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
873
874 asix_write_medium_mode(dev, mode);
875
876 return 0;
877 }
878
879 static const struct net_device_ops ax88172_netdev_ops = {
880 .ndo_open = usbnet_open,
881 .ndo_stop = usbnet_stop,
882 .ndo_start_xmit = usbnet_start_xmit,
883 .ndo_tx_timeout = usbnet_tx_timeout,
884 .ndo_change_mtu = usbnet_change_mtu,
885 .ndo_set_mac_address = eth_mac_addr,
886 .ndo_validate_addr = eth_validate_addr,
887 .ndo_do_ioctl = asix_ioctl,
888 .ndo_set_rx_mode = ax88172_set_multicast,
889 };
890
891 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
892 {
893 int ret = 0;
894 u8 buf[ETH_ALEN];
895 int i;
896 unsigned long gpio_bits = dev->driver_info->data;
897 struct asix_data *data = (struct asix_data *)&dev->data;
898
899 data->eeprom_len = AX88172_EEPROM_LEN;
900
901 usbnet_get_endpoints(dev,intf);
902
903 /* Toggle the GPIOs in a manufacturer/model specific way */
904 for (i = 2; i >= 0; i--) {
905 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
906 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
907 if (ret < 0)
908 goto out;
909 msleep(5);
910 }
911
912 ret = asix_write_rx_ctl(dev, 0x80);
913 if (ret < 0)
914 goto out;
915
916 /* Get the MAC address */
917 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
918 if (ret < 0) {
919 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
920 goto out;
921 }
922 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
923
924 /* Initialize MII structure */
925 dev->mii.dev = dev->net;
926 dev->mii.mdio_read = asix_mdio_read;
927 dev->mii.mdio_write = asix_mdio_write;
928 dev->mii.phy_id_mask = 0x3f;
929 dev->mii.reg_num_mask = 0x1f;
930 dev->mii.phy_id = asix_get_phy_addr(dev);
931
932 dev->net->netdev_ops = &ax88172_netdev_ops;
933 dev->net->ethtool_ops = &ax88172_ethtool_ops;
934
935 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
936 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
937 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
938 mii_nway_restart(&dev->mii);
939
940 return 0;
941
942 out:
943 return ret;
944 }
945
946 static const struct ethtool_ops ax88772_ethtool_ops = {
947 .get_drvinfo = asix_get_drvinfo,
948 .get_link = asix_get_link,
949 .get_msglevel = usbnet_get_msglevel,
950 .set_msglevel = usbnet_set_msglevel,
951 .get_wol = asix_get_wol,
952 .set_wol = asix_set_wol,
953 .get_eeprom_len = asix_get_eeprom_len,
954 .get_eeprom = asix_get_eeprom,
955 .get_settings = usbnet_get_settings,
956 .set_settings = usbnet_set_settings,
957 .nway_reset = usbnet_nway_reset,
958 };
959
960 static int ax88772_link_reset(struct usbnet *dev)
961 {
962 u16 mode;
963 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
964
965 mii_check_media(&dev->mii, 1, 1);
966 mii_ethtool_gset(&dev->mii, &ecmd);
967 mode = AX88772_MEDIUM_DEFAULT;
968
969 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
970 mode &= ~AX_MEDIUM_PS;
971
972 if (ecmd.duplex != DUPLEX_FULL)
973 mode &= ~AX_MEDIUM_FD;
974
975 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
976 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
977
978 asix_write_medium_mode(dev, mode);
979
980 return 0;
981 }
982
983 static int ax88772_reset(struct usbnet *dev)
984 {
985 struct asix_data *data = (struct asix_data *)&dev->data;
986 int ret, embd_phy;
987 u16 rx_ctl;
988
989 ret = asix_write_gpio(dev,
990 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
991 if (ret < 0)
992 goto out;
993
994 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
995
996 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
997 if (ret < 0) {
998 dbg("Select PHY #1 failed: %d", ret);
999 goto out;
1000 }
1001
1002 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
1003 if (ret < 0)
1004 goto out;
1005
1006 msleep(150);
1007
1008 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1009 if (ret < 0)
1010 goto out;
1011
1012 msleep(150);
1013
1014 if (embd_phy) {
1015 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
1016 if (ret < 0)
1017 goto out;
1018 } else {
1019 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
1020 if (ret < 0)
1021 goto out;
1022 }
1023
1024 msleep(150);
1025 rx_ctl = asix_read_rx_ctl(dev);
1026 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
1027 ret = asix_write_rx_ctl(dev, 0x0000);
1028 if (ret < 0)
1029 goto out;
1030
1031 rx_ctl = asix_read_rx_ctl(dev);
1032 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
1033
1034 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
1035 if (ret < 0)
1036 goto out;
1037
1038 msleep(150);
1039
1040 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
1041 if (ret < 0)
1042 goto out;
1043
1044 msleep(150);
1045
1046 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1047 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1048 ADVERTISE_ALL | ADVERTISE_CSMA);
1049 mii_nway_restart(&dev->mii);
1050
1051 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
1052 if (ret < 0)
1053 goto out;
1054
1055 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1056 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1057 AX88772_IPG2_DEFAULT, 0, NULL);
1058 if (ret < 0) {
1059 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1060 goto out;
1061 }
1062
1063 /* Rewrite MAC address */
1064 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1065 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1066 data->mac_addr);
1067 if (ret < 0)
1068 goto out;
1069
1070 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1071 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1072 if (ret < 0)
1073 goto out;
1074
1075 rx_ctl = asix_read_rx_ctl(dev);
1076 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1077
1078 rx_ctl = asix_read_medium_status(dev);
1079 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1080
1081 return 0;
1082
1083 out:
1084 return ret;
1085
1086 }
1087
1088 static const struct net_device_ops ax88772_netdev_ops = {
1089 .ndo_open = usbnet_open,
1090 .ndo_stop = usbnet_stop,
1091 .ndo_start_xmit = usbnet_start_xmit,
1092 .ndo_tx_timeout = usbnet_tx_timeout,
1093 .ndo_change_mtu = usbnet_change_mtu,
1094 .ndo_set_mac_address = asix_set_mac_address,
1095 .ndo_validate_addr = eth_validate_addr,
1096 .ndo_do_ioctl = asix_ioctl,
1097 .ndo_set_rx_mode = asix_set_multicast,
1098 };
1099
1100 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
1101 {
1102 int ret, embd_phy;
1103 struct asix_data *data = (struct asix_data *)&dev->data;
1104 u8 buf[ETH_ALEN];
1105 u32 phyid;
1106
1107 data->eeprom_len = AX88772_EEPROM_LEN;
1108
1109 usbnet_get_endpoints(dev,intf);
1110
1111 /* Get the MAC address */
1112 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1113 if (ret < 0) {
1114 dbg("Failed to read MAC address: %d", ret);
1115 return ret;
1116 }
1117 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1118
1119 /* Initialize MII structure */
1120 dev->mii.dev = dev->net;
1121 dev->mii.mdio_read = asix_mdio_read;
1122 dev->mii.mdio_write = asix_mdio_write;
1123 dev->mii.phy_id_mask = 0x1f;
1124 dev->mii.reg_num_mask = 0x1f;
1125 dev->mii.phy_id = asix_get_phy_addr(dev);
1126
1127 dev->net->netdev_ops = &ax88772_netdev_ops;
1128 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1129
1130 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
1131
1132 /* Reset the PHY to normal operation mode */
1133 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
1134 if (ret < 0) {
1135 dbg("Select PHY #1 failed: %d", ret);
1136 return ret;
1137 }
1138
1139 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
1140 if (ret < 0)
1141 return ret;
1142
1143 msleep(150);
1144
1145 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1146 if (ret < 0)
1147 return ret;
1148
1149 msleep(150);
1150
1151 ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
1152
1153 /* Read PHYID register *AFTER* the PHY was reset properly */
1154 phyid = asix_get_phyid(dev);
1155 dbg("PHYID=0x%08x", phyid);
1156
1157 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1158 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1159 /* hard_mtu is still the default - the device does not support
1160 jumbo eth frames */
1161 dev->rx_urb_size = 2048;
1162 }
1163
1164 dev->driver_priv = kzalloc(sizeof(struct asix_common_private),
1165 GFP_KERNEL);
1166 if (!dev->driver_priv)
1167 return -ENOMEM;
1168
1169 return 0;
1170 }
1171
1172 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
1173 {
1174 kfree(dev->driver_priv);
1175 }
1176
1177 static const struct ethtool_ops ax88178_ethtool_ops = {
1178 .get_drvinfo = asix_get_drvinfo,
1179 .get_link = asix_get_link,
1180 .get_msglevel = usbnet_get_msglevel,
1181 .set_msglevel = usbnet_set_msglevel,
1182 .get_wol = asix_get_wol,
1183 .set_wol = asix_set_wol,
1184 .get_eeprom_len = asix_get_eeprom_len,
1185 .get_eeprom = asix_get_eeprom,
1186 .get_settings = usbnet_get_settings,
1187 .set_settings = usbnet_set_settings,
1188 .nway_reset = usbnet_nway_reset,
1189 };
1190
1191 static int marvell_phy_init(struct usbnet *dev)
1192 {
1193 struct asix_data *data = (struct asix_data *)&dev->data;
1194 u16 reg;
1195
1196 netdev_dbg(dev->net, "marvell_phy_init()\n");
1197
1198 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1199 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1200
1201 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1202 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1203
1204 if (data->ledmode) {
1205 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1206 MII_MARVELL_LED_CTRL);
1207 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1208
1209 reg &= 0xf8ff;
1210 reg |= (1 + 0x0100);
1211 asix_mdio_write(dev->net, dev->mii.phy_id,
1212 MII_MARVELL_LED_CTRL, reg);
1213
1214 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1215 MII_MARVELL_LED_CTRL);
1216 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1217 reg &= 0xfc0f;
1218 }
1219
1220 return 0;
1221 }
1222
1223 static int rtl8211cl_phy_init(struct usbnet *dev)
1224 {
1225 struct asix_data *data = (struct asix_data *)&dev->data;
1226
1227 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
1228
1229 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
1230 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
1231 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
1232 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
1233 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1234
1235 if (data->ledmode == 12) {
1236 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
1237 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
1238 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1239 }
1240
1241 return 0;
1242 }
1243
1244 static int marvell_led_status(struct usbnet *dev, u16 speed)
1245 {
1246 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1247
1248 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1249
1250 /* Clear out the center LED bits - 0x03F0 */
1251 reg &= 0xfc0f;
1252
1253 switch (speed) {
1254 case SPEED_1000:
1255 reg |= 0x03e0;
1256 break;
1257 case SPEED_100:
1258 reg |= 0x03b0;
1259 break;
1260 default:
1261 reg |= 0x02f0;
1262 }
1263
1264 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1265 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1266
1267 return 0;
1268 }
1269
1270 static int ax88178_reset(struct usbnet *dev)
1271 {
1272 struct asix_data *data = (struct asix_data *)&dev->data;
1273 int ret;
1274 __le16 eeprom;
1275 u8 status;
1276 int gpio0 = 0;
1277 u32 phyid;
1278
1279 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1280 dbg("GPIO Status: 0x%04x", status);
1281
1282 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1283 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1284 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1285
1286 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1287
1288 if (eeprom == cpu_to_le16(0xffff)) {
1289 data->phymode = PHY_MODE_MARVELL;
1290 data->ledmode = 0;
1291 gpio0 = 1;
1292 } else {
1293 data->phymode = le16_to_cpu(eeprom) & 0x7F;
1294 data->ledmode = le16_to_cpu(eeprom) >> 8;
1295 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1296 }
1297 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1298
1299 /* Power up external GigaPHY through AX88178 GPIO pin */
1300 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1301 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1302 asix_write_gpio(dev, 0x003c, 30);
1303 asix_write_gpio(dev, 0x001c, 300);
1304 asix_write_gpio(dev, 0x003c, 30);
1305 } else {
1306 dbg("gpio phymode == 1 path");
1307 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1308 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1309 }
1310
1311 /* Read PHYID register *AFTER* powering up PHY */
1312 phyid = asix_get_phyid(dev);
1313 dbg("PHYID=0x%08x", phyid);
1314
1315 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
1316 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
1317
1318 asix_sw_reset(dev, 0);
1319 msleep(150);
1320
1321 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1322 msleep(150);
1323
1324 asix_write_rx_ctl(dev, 0);
1325
1326 if (data->phymode == PHY_MODE_MARVELL) {
1327 marvell_phy_init(dev);
1328 msleep(60);
1329 } else if (data->phymode == PHY_MODE_RTL8211CL)
1330 rtl8211cl_phy_init(dev);
1331
1332 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1333 BMCR_RESET | BMCR_ANENABLE);
1334 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1335 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1336 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1337 ADVERTISE_1000FULL);
1338
1339 mii_nway_restart(&dev->mii);
1340
1341 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
1342 if (ret < 0)
1343 return ret;
1344
1345 /* Rewrite MAC address */
1346 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1347 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1348 data->mac_addr);
1349 if (ret < 0)
1350 return ret;
1351
1352 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1353 if (ret < 0)
1354 return ret;
1355
1356 return 0;
1357 }
1358
1359 static int ax88178_link_reset(struct usbnet *dev)
1360 {
1361 u16 mode;
1362 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1363 struct asix_data *data = (struct asix_data *)&dev->data;
1364 u32 speed;
1365
1366 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1367
1368 mii_check_media(&dev->mii, 1, 1);
1369 mii_ethtool_gset(&dev->mii, &ecmd);
1370 mode = AX88178_MEDIUM_DEFAULT;
1371 speed = ethtool_cmd_speed(&ecmd);
1372
1373 if (speed == SPEED_1000)
1374 mode |= AX_MEDIUM_GM;
1375 else if (speed == SPEED_100)
1376 mode |= AX_MEDIUM_PS;
1377 else
1378 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1379
1380 mode |= AX_MEDIUM_ENCK;
1381
1382 if (ecmd.duplex == DUPLEX_FULL)
1383 mode |= AX_MEDIUM_FD;
1384 else
1385 mode &= ~AX_MEDIUM_FD;
1386
1387 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1388 speed, ecmd.duplex, mode);
1389
1390 asix_write_medium_mode(dev, mode);
1391
1392 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1393 marvell_led_status(dev, speed);
1394
1395 return 0;
1396 }
1397
1398 static void ax88178_set_mfb(struct usbnet *dev)
1399 {
1400 u16 mfb = AX_RX_CTL_MFB_16384;
1401 u16 rxctl;
1402 u16 medium;
1403 int old_rx_urb_size = dev->rx_urb_size;
1404
1405 if (dev->hard_mtu < 2048) {
1406 dev->rx_urb_size = 2048;
1407 mfb = AX_RX_CTL_MFB_2048;
1408 } else if (dev->hard_mtu < 4096) {
1409 dev->rx_urb_size = 4096;
1410 mfb = AX_RX_CTL_MFB_4096;
1411 } else if (dev->hard_mtu < 8192) {
1412 dev->rx_urb_size = 8192;
1413 mfb = AX_RX_CTL_MFB_8192;
1414 } else if (dev->hard_mtu < 16384) {
1415 dev->rx_urb_size = 16384;
1416 mfb = AX_RX_CTL_MFB_16384;
1417 }
1418
1419 rxctl = asix_read_rx_ctl(dev);
1420 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1421
1422 medium = asix_read_medium_status(dev);
1423 if (dev->net->mtu > 1500)
1424 medium |= AX_MEDIUM_JFE;
1425 else
1426 medium &= ~AX_MEDIUM_JFE;
1427 asix_write_medium_mode(dev, medium);
1428
1429 if (dev->rx_urb_size > old_rx_urb_size)
1430 usbnet_unlink_rx_urbs(dev);
1431 }
1432
1433 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1434 {
1435 struct usbnet *dev = netdev_priv(net);
1436 int ll_mtu = new_mtu + net->hard_header_len + 4;
1437
1438 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1439
1440 if (new_mtu <= 0 || ll_mtu > 16384)
1441 return -EINVAL;
1442
1443 if ((ll_mtu % dev->maxpacket) == 0)
1444 return -EDOM;
1445
1446 net->mtu = new_mtu;
1447 dev->hard_mtu = net->mtu + net->hard_header_len;
1448 ax88178_set_mfb(dev);
1449
1450 return 0;
1451 }
1452
1453 static const struct net_device_ops ax88178_netdev_ops = {
1454 .ndo_open = usbnet_open,
1455 .ndo_stop = usbnet_stop,
1456 .ndo_start_xmit = usbnet_start_xmit,
1457 .ndo_tx_timeout = usbnet_tx_timeout,
1458 .ndo_set_mac_address = asix_set_mac_address,
1459 .ndo_validate_addr = eth_validate_addr,
1460 .ndo_set_rx_mode = asix_set_multicast,
1461 .ndo_do_ioctl = asix_ioctl,
1462 .ndo_change_mtu = ax88178_change_mtu,
1463 };
1464
1465 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1466 {
1467 int ret;
1468 u8 buf[ETH_ALEN];
1469 struct asix_data *data = (struct asix_data *)&dev->data;
1470
1471 data->eeprom_len = AX88772_EEPROM_LEN;
1472
1473 usbnet_get_endpoints(dev,intf);
1474
1475 /* Get the MAC address */
1476 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1477 if (ret < 0) {
1478 dbg("Failed to read MAC address: %d", ret);
1479 return ret;
1480 }
1481 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1482
1483 /* Initialize MII structure */
1484 dev->mii.dev = dev->net;
1485 dev->mii.mdio_read = asix_mdio_read;
1486 dev->mii.mdio_write = asix_mdio_write;
1487 dev->mii.phy_id_mask = 0x1f;
1488 dev->mii.reg_num_mask = 0xff;
1489 dev->mii.supports_gmii = 1;
1490 dev->mii.phy_id = asix_get_phy_addr(dev);
1491
1492 dev->net->netdev_ops = &ax88178_netdev_ops;
1493 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1494
1495 /* Blink LEDS so users know driver saw dongle */
1496 asix_sw_reset(dev, 0);
1497 msleep(150);
1498
1499 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1500 msleep(150);
1501
1502 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1503 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1504 /* hard_mtu is still the default - the device does not support
1505 jumbo eth frames */
1506 dev->rx_urb_size = 2048;
1507 }
1508
1509 dev->driver_priv = kzalloc(sizeof(struct asix_common_private),
1510 GFP_KERNEL);
1511 if (!dev->driver_priv)
1512 return -ENOMEM;
1513
1514 return 0;
1515 }
1516
1517 static const struct driver_info ax8817x_info = {
1518 .description = "ASIX AX8817x USB 2.0 Ethernet",
1519 .bind = ax88172_bind,
1520 .status = asix_status,
1521 .link_reset = ax88172_link_reset,
1522 .reset = ax88172_link_reset,
1523 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1524 .data = 0x00130103,
1525 };
1526
1527 static const struct driver_info dlink_dub_e100_info = {
1528 .description = "DLink DUB-E100 USB Ethernet",
1529 .bind = ax88172_bind,
1530 .status = asix_status,
1531 .link_reset = ax88172_link_reset,
1532 .reset = ax88172_link_reset,
1533 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1534 .data = 0x009f9d9f,
1535 };
1536
1537 static const struct driver_info netgear_fa120_info = {
1538 .description = "Netgear FA-120 USB Ethernet",
1539 .bind = ax88172_bind,
1540 .status = asix_status,
1541 .link_reset = ax88172_link_reset,
1542 .reset = ax88172_link_reset,
1543 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1544 .data = 0x00130103,
1545 };
1546
1547 static const struct driver_info hawking_uf200_info = {
1548 .description = "Hawking UF200 USB Ethernet",
1549 .bind = ax88172_bind,
1550 .status = asix_status,
1551 .link_reset = ax88172_link_reset,
1552 .reset = ax88172_link_reset,
1553 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1554 .data = 0x001f1d1f,
1555 };
1556
1557 static const struct driver_info ax88772_info = {
1558 .description = "ASIX AX88772 USB 2.0 Ethernet",
1559 .bind = ax88772_bind,
1560 .unbind = ax88772_unbind,
1561 .status = asix_status,
1562 .link_reset = ax88772_link_reset,
1563 .reset = ax88772_reset,
1564 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1565 FLAG_MULTI_PACKET,
1566 .rx_fixup = asix_rx_fixup_common,
1567 .tx_fixup = asix_tx_fixup,
1568 };
1569
1570 static const struct driver_info ax88178_info = {
1571 .description = "ASIX AX88178 USB 2.0 Ethernet",
1572 .bind = ax88178_bind,
1573 .unbind = ax88772_unbind,
1574 .status = asix_status,
1575 .link_reset = ax88178_link_reset,
1576 .reset = ax88178_reset,
1577 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1578 FLAG_MULTI_PACKET,
1579 .rx_fixup = asix_rx_fixup_common,
1580 .tx_fixup = asix_tx_fixup,
1581 };
1582
1583 static const struct usb_device_id products [] = {
1584 {
1585 // Linksys USB200M
1586 USB_DEVICE (0x077b, 0x2226),
1587 .driver_info = (unsigned long) &ax8817x_info,
1588 }, {
1589 // Netgear FA120
1590 USB_DEVICE (0x0846, 0x1040),
1591 .driver_info = (unsigned long) &netgear_fa120_info,
1592 }, {
1593 // DLink DUB-E100
1594 USB_DEVICE (0x2001, 0x1a00),
1595 .driver_info = (unsigned long) &dlink_dub_e100_info,
1596 }, {
1597 // Intellinet, ST Lab USB Ethernet
1598 USB_DEVICE (0x0b95, 0x1720),
1599 .driver_info = (unsigned long) &ax8817x_info,
1600 }, {
1601 // Hawking UF200, TrendNet TU2-ET100
1602 USB_DEVICE (0x07b8, 0x420a),
1603 .driver_info = (unsigned long) &hawking_uf200_info,
1604 }, {
1605 // Billionton Systems, USB2AR
1606 USB_DEVICE (0x08dd, 0x90ff),
1607 .driver_info = (unsigned long) &ax8817x_info,
1608 }, {
1609 // ATEN UC210T
1610 USB_DEVICE (0x0557, 0x2009),
1611 .driver_info = (unsigned long) &ax8817x_info,
1612 }, {
1613 // Buffalo LUA-U2-KTX
1614 USB_DEVICE (0x0411, 0x003d),
1615 .driver_info = (unsigned long) &ax8817x_info,
1616 }, {
1617 // Buffalo LUA-U2-GT 10/100/1000
1618 USB_DEVICE (0x0411, 0x006e),
1619 .driver_info = (unsigned long) &ax88178_info,
1620 }, {
1621 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1622 USB_DEVICE (0x6189, 0x182d),
1623 .driver_info = (unsigned long) &ax8817x_info,
1624 }, {
1625 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1626 USB_DEVICE (0x0df6, 0x0056),
1627 .driver_info = (unsigned long) &ax88178_info,
1628 }, {
1629 // corega FEther USB2-TX
1630 USB_DEVICE (0x07aa, 0x0017),
1631 .driver_info = (unsigned long) &ax8817x_info,
1632 }, {
1633 // Surecom EP-1427X-2
1634 USB_DEVICE (0x1189, 0x0893),
1635 .driver_info = (unsigned long) &ax8817x_info,
1636 }, {
1637 // goodway corp usb gwusb2e
1638 USB_DEVICE (0x1631, 0x6200),
1639 .driver_info = (unsigned long) &ax8817x_info,
1640 }, {
1641 // JVC MP-PRX1 Port Replicator
1642 USB_DEVICE (0x04f1, 0x3008),
1643 .driver_info = (unsigned long) &ax8817x_info,
1644 }, {
1645 // ASIX AX88772B 10/100
1646 USB_DEVICE (0x0b95, 0x772b),
1647 .driver_info = (unsigned long) &ax88772_info,
1648 }, {
1649 // ASIX AX88772 10/100
1650 USB_DEVICE (0x0b95, 0x7720),
1651 .driver_info = (unsigned long) &ax88772_info,
1652 }, {
1653 // ASIX AX88178 10/100/1000
1654 USB_DEVICE (0x0b95, 0x1780),
1655 .driver_info = (unsigned long) &ax88178_info,
1656 }, {
1657 // Logitec LAN-GTJ/U2A
1658 USB_DEVICE (0x0789, 0x0160),
1659 .driver_info = (unsigned long) &ax88178_info,
1660 }, {
1661 // Linksys USB200M Rev 2
1662 USB_DEVICE (0x13b1, 0x0018),
1663 .driver_info = (unsigned long) &ax88772_info,
1664 }, {
1665 // 0Q0 cable ethernet
1666 USB_DEVICE (0x1557, 0x7720),
1667 .driver_info = (unsigned long) &ax88772_info,
1668 }, {
1669 // DLink DUB-E100 H/W Ver B1
1670 USB_DEVICE (0x07d1, 0x3c05),
1671 .driver_info = (unsigned long) &ax88772_info,
1672 }, {
1673 // DLink DUB-E100 H/W Ver B1 Alternate
1674 USB_DEVICE (0x2001, 0x3c05),
1675 .driver_info = (unsigned long) &ax88772_info,
1676 }, {
1677 // DLink DUB-E100 H/W Ver C1
1678 USB_DEVICE (0x2001, 0x1a02),
1679 .driver_info = (unsigned long) &ax88772_info,
1680 }, {
1681 // Linksys USB1000
1682 USB_DEVICE (0x1737, 0x0039),
1683 .driver_info = (unsigned long) &ax88178_info,
1684 }, {
1685 // IO-DATA ETG-US2
1686 USB_DEVICE (0x04bb, 0x0930),
1687 .driver_info = (unsigned long) &ax88178_info,
1688 }, {
1689 // Belkin F5D5055
1690 USB_DEVICE(0x050d, 0x5055),
1691 .driver_info = (unsigned long) &ax88178_info,
1692 }, {
1693 // Apple USB Ethernet Adapter
1694 USB_DEVICE(0x05ac, 0x1402),
1695 .driver_info = (unsigned long) &ax88772_info,
1696 }, {
1697 // Cables-to-Go USB Ethernet Adapter
1698 USB_DEVICE(0x0b95, 0x772a),
1699 .driver_info = (unsigned long) &ax88772_info,
1700 }, {
1701 // ABOCOM for pci
1702 USB_DEVICE(0x14ea, 0xab11),
1703 .driver_info = (unsigned long) &ax88178_info,
1704 }, {
1705 // ASIX 88772a
1706 USB_DEVICE(0x0db0, 0xa877),
1707 .driver_info = (unsigned long) &ax88772_info,
1708 }, {
1709 // Asus USB Ethernet Adapter
1710 USB_DEVICE (0x0b95, 0x7e2b),
1711 .driver_info = (unsigned long) &ax88772_info,
1712 },
1713 { }, // END
1714 };
1715 MODULE_DEVICE_TABLE(usb, products);
1716
1717 static struct usb_driver asix_driver = {
1718 .name = DRIVER_NAME,
1719 .id_table = products,
1720 .probe = usbnet_probe,
1721 .suspend = usbnet_suspend,
1722 .resume = usbnet_resume,
1723 .disconnect = usbnet_disconnect,
1724 .supports_autosuspend = 1,
1725 };
1726
1727 module_usb_driver(asix_driver);
1728
1729 MODULE_AUTHOR("David Hollis");
1730 MODULE_VERSION(DRIVER_VERSION);
1731 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1732 MODULE_LICENSE("GPL");
1733
Linux with added FPC-III support