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Linux 3.4.102
[linux/fpc-iii.git] / drivers / net / usb / smsc75xx.c
blob5a82fcdd206b902496ccfbcf88976213c7d670db
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2010 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21 #include <linux/module.h>
22 #include <linux/kmod.h>
23 #include <linux/init.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/mii.h>
28 #include <linux/usb.h>
29 #include <linux/crc32.h>
30 #include <linux/usb/usbnet.h>
31 #include <linux/slab.h>
32 #include "smsc75xx.h"
33
34 #define SMSC_CHIPNAME "smsc75xx"
35 #define SMSC_DRIVER_VERSION "1.0.0"
36 #define HS_USB_PKT_SIZE (512)
37 #define FS_USB_PKT_SIZE (64)
38 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
39 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
40 #define DEFAULT_BULK_IN_DELAY (0x00002000)
41 #define MAX_SINGLE_PACKET_SIZE (9000)
42 #define LAN75XX_EEPROM_MAGIC (0x7500)
43 #define EEPROM_MAC_OFFSET (0x01)
44 #define DEFAULT_TX_CSUM_ENABLE (true)
45 #define DEFAULT_RX_CSUM_ENABLE (true)
46 #define SMSC75XX_INTERNAL_PHY_ID (1)
47 #define SMSC75XX_TX_OVERHEAD (8)
48 #define MAX_RX_FIFO_SIZE (20 * 1024)
49 #define MAX_TX_FIFO_SIZE (12 * 1024)
50 #define USB_VENDOR_ID_SMSC (0x0424)
51 #define USB_PRODUCT_ID_LAN7500 (0x7500)
52 #define USB_PRODUCT_ID_LAN7505 (0x7505)
53 #define RXW_PADDING 2
54
55 #define check_warn(ret, fmt, args...) \
56 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
57
58 #define check_warn_return(ret, fmt, args...) \
59 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
60
61 #define check_warn_goto_done(ret, fmt, args...) \
62 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
63
64 struct smsc75xx_priv {
65 struct usbnet *dev;
66 u32 rfe_ctl;
67 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
68 struct mutex dataport_mutex;
69 spinlock_t rfe_ctl_lock;
70 struct work_struct set_multicast;
71 };
72
73 struct usb_context {
74 struct usb_ctrlrequest req;
75 struct usbnet *dev;
76 };
77
78 static bool turbo_mode = true;
79 module_param(turbo_mode, bool, 0644);
80 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
81
82 static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
83 u32 *data)
84 {
85 u32 *buf = kmalloc(4, GFP_KERNEL);
86 int ret;
87
88 BUG_ON(!dev);
89
90 if (!buf)
91 return -ENOMEM;
92
93 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
94 USB_VENDOR_REQUEST_READ_REGISTER,
95 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
96 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
97
98 if (unlikely(ret < 0))
99 netdev_warn(dev->net,
100 "Failed to read reg index 0x%08x: %d", index, ret);
101
102 le32_to_cpus(buf);
103 *data = *buf;
104 kfree(buf);
105
106 return ret;
107 }
108
109 static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
110 u32 data)
111 {
112 u32 *buf = kmalloc(4, GFP_KERNEL);
113 int ret;
114
115 BUG_ON(!dev);
116
117 if (!buf)
118 return -ENOMEM;
119
120 *buf = data;
121 cpu_to_le32s(buf);
122
123 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
124 USB_VENDOR_REQUEST_WRITE_REGISTER,
125 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
126 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
127
128 if (unlikely(ret < 0))
129 netdev_warn(dev->net,
130 "Failed to write reg index 0x%08x: %d", index, ret);
131
132 kfree(buf);
133
134 return ret;
135 }
136
137 /* Loop until the read is completed with timeout
138 * called with phy_mutex held */
139 static int smsc75xx_phy_wait_not_busy(struct usbnet *dev)
140 {
141 unsigned long start_time = jiffies;
142 u32 val;
143 int ret;
144
145 do {
146 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val);
147 check_warn_return(ret, "Error reading MII_ACCESS");
148
149 if (!(val & MII_ACCESS_BUSY))
150 return 0;
151 } while (!time_after(jiffies, start_time + HZ));
152
153 return -EIO;
154 }
155
156 static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
157 {
158 struct usbnet *dev = netdev_priv(netdev);
159 u32 val, addr;
160 int ret;
161
162 mutex_lock(&dev->phy_mutex);
163
164 /* confirm MII not busy */
165 ret = smsc75xx_phy_wait_not_busy(dev);
166 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read");
167
168 /* set the address, index & direction (read from PHY) */
169 phy_id &= dev->mii.phy_id_mask;
170 idx &= dev->mii.reg_num_mask;
171 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
172 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
173 | MII_ACCESS_READ | MII_ACCESS_BUSY;
174 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
175 check_warn_goto_done(ret, "Error writing MII_ACCESS");
176
177 ret = smsc75xx_phy_wait_not_busy(dev);
178 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
179
180 ret = smsc75xx_read_reg(dev, MII_DATA, &val);
181 check_warn_goto_done(ret, "Error reading MII_DATA");
182
183 ret = (u16)(val & 0xFFFF);
184
185 done:
186 mutex_unlock(&dev->phy_mutex);
187 return ret;
188 }
189
190 static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
191 int regval)
192 {
193 struct usbnet *dev = netdev_priv(netdev);
194 u32 val, addr;
195 int ret;
196
197 mutex_lock(&dev->phy_mutex);
198
199 /* confirm MII not busy */
200 ret = smsc75xx_phy_wait_not_busy(dev);
201 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write");
202
203 val = regval;
204 ret = smsc75xx_write_reg(dev, MII_DATA, val);
205 check_warn_goto_done(ret, "Error writing MII_DATA");
206
207 /* set the address, index & direction (write to PHY) */
208 phy_id &= dev->mii.phy_id_mask;
209 idx &= dev->mii.reg_num_mask;
210 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
211 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
212 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
213 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
214 check_warn_goto_done(ret, "Error writing MII_ACCESS");
215
216 ret = smsc75xx_phy_wait_not_busy(dev);
217 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
218
219 done:
220 mutex_unlock(&dev->phy_mutex);
221 }
222
223 static int smsc75xx_wait_eeprom(struct usbnet *dev)
224 {
225 unsigned long start_time = jiffies;
226 u32 val;
227 int ret;
228
229 do {
230 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
231 check_warn_return(ret, "Error reading E2P_CMD");
232
233 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
234 break;
235 udelay(40);
236 } while (!time_after(jiffies, start_time + HZ));
237
238 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
239 netdev_warn(dev->net, "EEPROM read operation timeout");
240 return -EIO;
241 }
242
243 return 0;
244 }
245
246 static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
247 {
248 unsigned long start_time = jiffies;
249 u32 val;
250 int ret;
251
252 do {
253 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
254 check_warn_return(ret, "Error reading E2P_CMD");
255
256 if (!(val & E2P_CMD_BUSY))
257 return 0;
258
259 udelay(40);
260 } while (!time_after(jiffies, start_time + HZ));
261
262 netdev_warn(dev->net, "EEPROM is busy");
263 return -EIO;
264 }
265
266 static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
267 u8 *data)
268 {
269 u32 val;
270 int i, ret;
271
272 BUG_ON(!dev);
273 BUG_ON(!data);
274
275 ret = smsc75xx_eeprom_confirm_not_busy(dev);
276 if (ret)
277 return ret;
278
279 for (i = 0; i < length; i++) {
280 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
281 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
282 check_warn_return(ret, "Error writing E2P_CMD");
283
284 ret = smsc75xx_wait_eeprom(dev);
285 if (ret < 0)
286 return ret;
287
288 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
289 check_warn_return(ret, "Error reading E2P_DATA");
290
291 data[i] = val & 0xFF;
292 offset++;
293 }
294
295 return 0;
296 }
297
298 static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
299 u8 *data)
300 {
301 u32 val;
302 int i, ret;
303
304 BUG_ON(!dev);
305 BUG_ON(!data);
306
307 ret = smsc75xx_eeprom_confirm_not_busy(dev);
308 if (ret)
309 return ret;
310
311 /* Issue write/erase enable command */
312 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
313 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
314 check_warn_return(ret, "Error writing E2P_CMD");
315
316 ret = smsc75xx_wait_eeprom(dev);
317 if (ret < 0)
318 return ret;
319
320 for (i = 0; i < length; i++) {
321
322 /* Fill data register */
323 val = data[i];
324 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
325 check_warn_return(ret, "Error writing E2P_DATA");
326
327 /* Send "write" command */
328 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
329 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
330 check_warn_return(ret, "Error writing E2P_CMD");
331
332 ret = smsc75xx_wait_eeprom(dev);
333 if (ret < 0)
334 return ret;
335
336 offset++;
337 }
338
339 return 0;
340 }
341
342 static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
343 {
344 int i, ret;
345
346 for (i = 0; i < 100; i++) {
347 u32 dp_sel;
348 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
349 check_warn_return(ret, "Error reading DP_SEL");
350
351 if (dp_sel & DP_SEL_DPRDY)
352 return 0;
353
354 udelay(40);
355 }
356
357 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out");
358
359 return -EIO;
360 }
361
362 static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
363 u32 length, u32 *buf)
364 {
365 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
366 u32 dp_sel;
367 int i, ret;
368
369 mutex_lock(&pdata->dataport_mutex);
370
371 ret = smsc75xx_dataport_wait_not_busy(dev);
372 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry");
373
374 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
375 check_warn_goto_done(ret, "Error reading DP_SEL");
376
377 dp_sel &= ~DP_SEL_RSEL;
378 dp_sel |= ram_select;
379 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
380 check_warn_goto_done(ret, "Error writing DP_SEL");
381
382 for (i = 0; i < length; i++) {
383 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
384 check_warn_goto_done(ret, "Error writing DP_ADDR");
385
386 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
387 check_warn_goto_done(ret, "Error writing DP_DATA");
388
389 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
390 check_warn_goto_done(ret, "Error writing DP_CMD");
391
392 ret = smsc75xx_dataport_wait_not_busy(dev);
393 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout");
394 }
395
396 done:
397 mutex_unlock(&pdata->dataport_mutex);
398 return ret;
399 }
400
401 /* returns hash bit number for given MAC address */
402 static u32 smsc75xx_hash(char addr[ETH_ALEN])
403 {
404 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
405 }
406
407 static void smsc75xx_deferred_multicast_write(struct work_struct *param)
408 {
409 struct smsc75xx_priv *pdata =
410 container_of(param, struct smsc75xx_priv, set_multicast);
411 struct usbnet *dev = pdata->dev;
412 int ret;
413
414 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x",
415 pdata->rfe_ctl);
416
417 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
418 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
419
420 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
421 check_warn(ret, "Error writing RFE_CRL");
422 }
423
424 static void smsc75xx_set_multicast(struct net_device *netdev)
425 {
426 struct usbnet *dev = netdev_priv(netdev);
427 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
428 unsigned long flags;
429 int i;
430
431 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
432
433 pdata->rfe_ctl &=
434 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
435 pdata->rfe_ctl |= RFE_CTL_AB;
436
437 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
438 pdata->multicast_hash_table[i] = 0;
439
440 if (dev->net->flags & IFF_PROMISC) {
441 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
442 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
443 } else if (dev->net->flags & IFF_ALLMULTI) {
444 netif_dbg(dev, drv, dev->net, "receive all multicast enabled");
445 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
446 } else if (!netdev_mc_empty(dev->net)) {
447 struct netdev_hw_addr *ha;
448
449 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
450
451 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
452
453 netdev_for_each_mc_addr(ha, netdev) {
454 u32 bitnum = smsc75xx_hash(ha->addr);
455 pdata->multicast_hash_table[bitnum / 32] |=
456 (1 << (bitnum % 32));
457 }
458 } else {
459 netif_dbg(dev, drv, dev->net, "receive own packets only");
460 pdata->rfe_ctl |= RFE_CTL_DPF;
461 }
462
463 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
464
465 /* defer register writes to a sleepable context */
466 schedule_work(&pdata->set_multicast);
467 }
468
469 static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
470 u16 lcladv, u16 rmtadv)
471 {
472 u32 flow = 0, fct_flow = 0;
473 int ret;
474
475 if (duplex == DUPLEX_FULL) {
476 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
477
478 if (cap & FLOW_CTRL_TX) {
479 flow = (FLOW_TX_FCEN | 0xFFFF);
480 /* set fct_flow thresholds to 20% and 80% */
481 fct_flow = (8 << 8) | 32;
482 }
483
484 if (cap & FLOW_CTRL_RX)
485 flow |= FLOW_RX_FCEN;
486
487 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
488 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
489 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
490 } else {
491 netif_dbg(dev, link, dev->net, "half duplex");
492 }
493
494 ret = smsc75xx_write_reg(dev, FLOW, flow);
495 check_warn_return(ret, "Error writing FLOW");
496
497 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
498 check_warn_return(ret, "Error writing FCT_FLOW");
499
500 return 0;
501 }
502
503 static int smsc75xx_link_reset(struct usbnet *dev)
504 {
505 struct mii_if_info *mii = &dev->mii;
506 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
507 u16 lcladv, rmtadv;
508 int ret;
509
510 /* read and write to clear phy interrupt status */
511 ret = smsc75xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
512 check_warn_return(ret, "Error reading PHY_INT_SRC");
513 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC, 0xffff);
514
515 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
516 check_warn_return(ret, "Error writing INT_STS");
517
518 mii_check_media(mii, 1, 1);
519 mii_ethtool_gset(&dev->mii, &ecmd);
520 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
521 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
522
523 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x"
524 " rmtadv: %04x", ethtool_cmd_speed(&ecmd),
525 ecmd.duplex, lcladv, rmtadv);
526
527 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
528 }
529
530 static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
531 {
532 u32 intdata;
533
534 if (urb->actual_length != 4) {
535 netdev_warn(dev->net,
536 "unexpected urb length %d", urb->actual_length);
537 return;
538 }
539
540 memcpy(&intdata, urb->transfer_buffer, 4);
541 le32_to_cpus(&intdata);
542
543 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata);
544
545 if (intdata & INT_ENP_PHY_INT)
546 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
547 else
548 netdev_warn(dev->net,
549 "unexpected interrupt, intdata=0x%08X", intdata);
550 }
551
552 static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
553 {
554 return MAX_EEPROM_SIZE;
555 }
556
557 static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
558 struct ethtool_eeprom *ee, u8 *data)
559 {
560 struct usbnet *dev = netdev_priv(netdev);
561
562 ee->magic = LAN75XX_EEPROM_MAGIC;
563
564 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
565 }
566
567 static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
568 struct ethtool_eeprom *ee, u8 *data)
569 {
570 struct usbnet *dev = netdev_priv(netdev);
571
572 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
573 netdev_warn(dev->net,
574 "EEPROM: magic value mismatch: 0x%x", ee->magic);
575 return -EINVAL;
576 }
577
578 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
579 }
580
581 static const struct ethtool_ops smsc75xx_ethtool_ops = {
582 .get_link = usbnet_get_link,
583 .nway_reset = usbnet_nway_reset,
584 .get_drvinfo = usbnet_get_drvinfo,
585 .get_msglevel = usbnet_get_msglevel,
586 .set_msglevel = usbnet_set_msglevel,
587 .get_settings = usbnet_get_settings,
588 .set_settings = usbnet_set_settings,
589 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
590 .get_eeprom = smsc75xx_ethtool_get_eeprom,
591 .set_eeprom = smsc75xx_ethtool_set_eeprom,
592 };
593
594 static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
595 {
596 struct usbnet *dev = netdev_priv(netdev);
597
598 if (!netif_running(netdev))
599 return -EINVAL;
600
601 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
602 }
603
604 static void smsc75xx_init_mac_address(struct usbnet *dev)
605 {
606 /* try reading mac address from EEPROM */
607 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
608 dev->net->dev_addr) == 0) {
609 if (is_valid_ether_addr(dev->net->dev_addr)) {
610 /* eeprom values are valid so use them */
611 netif_dbg(dev, ifup, dev->net,
612 "MAC address read from EEPROM");
613 return;
614 }
615 }
616
617 /* no eeprom, or eeprom values are invalid. generate random MAC */
618 eth_hw_addr_random(dev->net);
619 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr");
620 }
621
622 static int smsc75xx_set_mac_address(struct usbnet *dev)
623 {
624 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
625 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
626 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
627
628 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
629 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret);
630
631 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
632 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret);
633
634 addr_hi |= ADDR_FILTX_FB_VALID;
635 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
636 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret);
637
638 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
639 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret);
640
641 return 0;
642 }
643
644 static int smsc75xx_phy_initialize(struct usbnet *dev)
645 {
646 int bmcr, ret, timeout = 0;
647
648 /* Initialize MII structure */
649 dev->mii.dev = dev->net;
650 dev->mii.mdio_read = smsc75xx_mdio_read;
651 dev->mii.mdio_write = smsc75xx_mdio_write;
652 dev->mii.phy_id_mask = 0x1f;
653 dev->mii.reg_num_mask = 0x1f;
654 dev->mii.supports_gmii = 1;
655 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
656
657 /* reset phy and wait for reset to complete */
658 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
659
660 do {
661 msleep(10);
662 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
663 check_warn_return(bmcr, "Error reading MII_BMCR");
664 timeout++;
665 } while ((bmcr & BMCR_RESET) && (timeout < 100));
666
667 if (timeout >= 100) {
668 netdev_warn(dev->net, "timeout on PHY Reset");
669 return -EIO;
670 }
671
672 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
673 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
674 ADVERTISE_PAUSE_ASYM);
675 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
676 ADVERTISE_1000FULL);
677
678 /* read and write to clear phy interrupt status */
679 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
680 check_warn_return(ret, "Error reading PHY_INT_SRC");
681 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
682
683 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
684 PHY_INT_MASK_DEFAULT);
685 mii_nway_restart(&dev->mii);
686
687 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
688 return 0;
689 }
690
691 static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
692 {
693 int ret = 0;
694 u32 buf;
695 bool rxenabled;
696
697 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
698 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
699
700 rxenabled = ((buf & MAC_RX_RXEN) != 0);
701
702 if (rxenabled) {
703 buf &= ~MAC_RX_RXEN;
704 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
705 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
706 }
707
708 /* add 4 to size for FCS */
709 buf &= ~MAC_RX_MAX_SIZE;
710 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
711
712 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
713 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
714
715 if (rxenabled) {
716 buf |= MAC_RX_RXEN;
717 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
718 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
719 }
720
721 return 0;
722 }
723
724 static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
725 {
726 struct usbnet *dev = netdev_priv(netdev);
727 int ret;
728
729 if (new_mtu > MAX_SINGLE_PACKET_SIZE)
730 return -EINVAL;
731
732 ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
733 check_warn_return(ret, "Failed to set mac rx frame length");
734
735 return usbnet_change_mtu(netdev, new_mtu);
736 }
737
738 /* Enable or disable Rx checksum offload engine */
739 static int smsc75xx_set_features(struct net_device *netdev,
740 netdev_features_t features)
741 {
742 struct usbnet *dev = netdev_priv(netdev);
743 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
744 unsigned long flags;
745 int ret;
746
747 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
748
749 if (features & NETIF_F_RXCSUM)
750 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
751 else
752 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
753
754 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
755 /* it's racing here! */
756
757 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
758 check_warn_return(ret, "Error writing RFE_CTL");
759
760 return 0;
761 }
762
763 static int smsc75xx_reset(struct usbnet *dev)
764 {
765 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
766 u32 buf;
767 int ret = 0, timeout;
768
769 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset");
770
771 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
772 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
773
774 buf |= HW_CFG_LRST;
775
776 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
777 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
778
779 timeout = 0;
780 do {
781 msleep(10);
782 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
783 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
784 timeout++;
785 } while ((buf & HW_CFG_LRST) && (timeout < 100));
786
787 if (timeout >= 100) {
788 netdev_warn(dev->net, "timeout on completion of Lite Reset");
789 return -EIO;
790 }
791
792 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY");
793
794 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
795 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
796
797 buf |= PMT_CTL_PHY_RST;
798
799 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
800 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret);
801
802 timeout = 0;
803 do {
804 msleep(10);
805 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
806 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
807 timeout++;
808 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
809
810 if (timeout >= 100) {
811 netdev_warn(dev->net, "timeout waiting for PHY Reset");
812 return -EIO;
813 }
814
815 netif_dbg(dev, ifup, dev->net, "PHY reset complete");
816
817 smsc75xx_init_mac_address(dev);
818
819 ret = smsc75xx_set_mac_address(dev);
820 check_warn_return(ret, "Failed to set mac address");
821
822 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr);
823
824 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
825 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
826
827 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf);
828
829 buf |= HW_CFG_BIR;
830
831 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
832 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
833
834 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
835 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
836
837 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after "
838 "writing HW_CFG_BIR: 0x%08x", buf);
839
840 if (!turbo_mode) {
841 buf = 0;
842 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
843 } else if (dev->udev->speed == USB_SPEED_HIGH) {
844 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
845 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
846 } else {
847 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
848 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
849 }
850
851 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld",
852 (ulong)dev->rx_urb_size);
853
854 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
855 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret);
856
857 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
858 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret);
859
860 netif_dbg(dev, ifup, dev->net,
861 "Read Value from BURST_CAP after writing: 0x%08x", buf);
862
863 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
864 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret);
865
866 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
867 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret);
868
869 netif_dbg(dev, ifup, dev->net,
870 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf);
871
872 if (turbo_mode) {
873 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
874 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
875
876 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
877
878 buf |= (HW_CFG_MEF | HW_CFG_BCE);
879
880 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
881 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
882
883 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
884 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
885
886 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
887 }
888
889 /* set FIFO sizes */
890 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
891 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
892 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret);
893
894 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf);
895
896 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
897 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
898 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret);
899
900 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf);
901
902 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
903 check_warn_return(ret, "Failed to write INT_STS: %d", ret);
904
905 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
906 check_warn_return(ret, "Failed to read ID_REV: %d", ret);
907
908 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf);
909
910 /* Configure GPIO pins as LED outputs */
911 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
912 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret);
913
914 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
915 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
916
917 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
918 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret);
919
920 ret = smsc75xx_write_reg(dev, FLOW, 0);
921 check_warn_return(ret, "Failed to write FLOW: %d", ret);
922
923 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
924 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret);
925
926 /* Don't need rfe_ctl_lock during initialisation */
927 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
928 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
929
930 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
931
932 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
933 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret);
934
935 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
936 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
937
938 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl);
939
940 /* Enable or disable checksum offload engines */
941 smsc75xx_set_features(dev->net, dev->net->features);
942
943 smsc75xx_set_multicast(dev->net);
944
945 ret = smsc75xx_phy_initialize(dev);
946 check_warn_return(ret, "Failed to initialize PHY: %d", ret);
947
948 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
949 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret);
950
951 /* enable PHY interrupts */
952 buf |= INT_ENP_PHY_INT;
953
954 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
955 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret);
956
957 /* allow mac to detect speed and duplex from phy */
958 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
959 check_warn_return(ret, "Failed to read MAC_CR: %d", ret);
960
961 buf |= (MAC_CR_ADD | MAC_CR_ASD);
962 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
963 check_warn_return(ret, "Failed to write MAC_CR: %d", ret);
964
965 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
966 check_warn_return(ret, "Failed to read MAC_TX: %d", ret);
967
968 buf |= MAC_TX_TXEN;
969
970 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
971 check_warn_return(ret, "Failed to write MAC_TX: %d", ret);
972
973 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf);
974
975 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
976 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret);
977
978 buf |= FCT_TX_CTL_EN;
979
980 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
981 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret);
982
983 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf);
984
985 ret = smsc75xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
986 check_warn_return(ret, "Failed to set max rx frame length");
987
988 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
989 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
990
991 buf |= MAC_RX_RXEN;
992
993 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
994 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
995
996 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf);
997
998 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
999 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret);
1000
1001 buf |= FCT_RX_CTL_EN;
1002
1003 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
1004 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret);
1005
1006 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf);
1007
1008 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0");
1009 return 0;
1010 }
1011
1012 static const struct net_device_ops smsc75xx_netdev_ops = {
1013 .ndo_open = usbnet_open,
1014 .ndo_stop = usbnet_stop,
1015 .ndo_start_xmit = usbnet_start_xmit,
1016 .ndo_tx_timeout = usbnet_tx_timeout,
1017 .ndo_change_mtu = smsc75xx_change_mtu,
1018 .ndo_set_mac_address = eth_mac_addr,
1019 .ndo_validate_addr = eth_validate_addr,
1020 .ndo_do_ioctl = smsc75xx_ioctl,
1021 .ndo_set_rx_mode = smsc75xx_set_multicast,
1022 .ndo_set_features = smsc75xx_set_features,
1023 };
1024
1025 static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1026 {
1027 struct smsc75xx_priv *pdata = NULL;
1028 int ret;
1029
1030 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1031
1032 ret = usbnet_get_endpoints(dev, intf);
1033 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret);
1034
1035 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1036 GFP_KERNEL);
1037
1038 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1039 if (!pdata) {
1040 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv");
1041 return -ENOMEM;
1042 }
1043
1044 pdata->dev = dev;
1045
1046 spin_lock_init(&pdata->rfe_ctl_lock);
1047 mutex_init(&pdata->dataport_mutex);
1048
1049 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1050
1051 if (DEFAULT_TX_CSUM_ENABLE)
1052 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1053
1054 if (DEFAULT_RX_CSUM_ENABLE)
1055 dev->net->features |= NETIF_F_RXCSUM;
1056
1057 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1058 NETIF_F_RXCSUM;
1059
1060 /* Init all registers */
1061 ret = smsc75xx_reset(dev);
1062
1063 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1064 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1065 dev->net->flags |= IFF_MULTICAST;
1066 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1067 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1068 return 0;
1069 }
1070
1071 static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1072 {
1073 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1074 if (pdata) {
1075 netif_dbg(dev, ifdown, dev->net, "free pdata");
1076 kfree(pdata);
1077 pdata = NULL;
1078 dev->data[0] = 0;
1079 }
1080 }
1081
1082 static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
1083 u32 rx_cmd_a, u32 rx_cmd_b)
1084 {
1085 if (!(dev->net->features & NETIF_F_RXCSUM) ||
1086 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
1087 skb->ip_summed = CHECKSUM_NONE;
1088 } else {
1089 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
1090 skb->ip_summed = CHECKSUM_COMPLETE;
1091 }
1092 }
1093
1094 static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1095 {
1096 /* This check is no longer done by usbnet */
1097 if (skb->len < dev->net->hard_header_len)
1098 return 0;
1099
1100 while (skb->len > 0) {
1101 u32 rx_cmd_a, rx_cmd_b, align_count, size;
1102 struct sk_buff *ax_skb;
1103 unsigned char *packet;
1104
1105 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
1106 le32_to_cpus(&rx_cmd_a);
1107 skb_pull(skb, 4);
1108
1109 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
1110 le32_to_cpus(&rx_cmd_b);
1111 skb_pull(skb, 4 + RXW_PADDING);
1112
1113 packet = skb->data;
1114
1115 /* get the packet length */
1116 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
1117 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
1118
1119 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
1120 netif_dbg(dev, rx_err, dev->net,
1121 "Error rx_cmd_a=0x%08x", rx_cmd_a);
1122 dev->net->stats.rx_errors++;
1123 dev->net->stats.rx_dropped++;
1124
1125 if (rx_cmd_a & RX_CMD_A_FCS)
1126 dev->net->stats.rx_crc_errors++;
1127 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
1128 dev->net->stats.rx_frame_errors++;
1129 } else {
1130 /* MAX_SINGLE_PACKET_SIZE + 4(CRC) + 2(COE) + 4(Vlan) */
1131 if (unlikely(size > (MAX_SINGLE_PACKET_SIZE + ETH_HLEN + 12))) {
1132 netif_dbg(dev, rx_err, dev->net,
1133 "size err rx_cmd_a=0x%08x", rx_cmd_a);
1134 return 0;
1135 }
1136
1137 /* last frame in this batch */
1138 if (skb->len == size) {
1139 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
1140 rx_cmd_b);
1141
1142 skb_trim(skb, skb->len - 4); /* remove fcs */
1143 skb->truesize = size + sizeof(struct sk_buff);
1144
1145 return 1;
1146 }
1147
1148 ax_skb = skb_clone(skb, GFP_ATOMIC);
1149 if (unlikely(!ax_skb)) {
1150 netdev_warn(dev->net, "Error allocating skb");
1151 return 0;
1152 }
1153
1154 ax_skb->len = size;
1155 ax_skb->data = packet;
1156 skb_set_tail_pointer(ax_skb, size);
1157
1158 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
1159 rx_cmd_b);
1160
1161 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1162 ax_skb->truesize = size + sizeof(struct sk_buff);
1163
1164 usbnet_skb_return(dev, ax_skb);
1165 }
1166
1167 skb_pull(skb, size);
1168
1169 /* padding bytes before the next frame starts */
1170 if (skb->len)
1171 skb_pull(skb, align_count);
1172 }
1173
1174 if (unlikely(skb->len < 0)) {
1175 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len);
1176 return 0;
1177 }
1178
1179 return 1;
1180 }
1181
1182 static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
1183 struct sk_buff *skb, gfp_t flags)
1184 {
1185 u32 tx_cmd_a, tx_cmd_b;
1186
1187 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) {
1188 struct sk_buff *skb2 =
1189 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags);
1190 dev_kfree_skb_any(skb);
1191 skb = skb2;
1192 if (!skb)
1193 return NULL;
1194 }
1195
1196 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
1197
1198 if (skb->ip_summed == CHECKSUM_PARTIAL)
1199 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
1200
1201 if (skb_is_gso(skb)) {
1202 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
1203 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
1204
1205 tx_cmd_a |= TX_CMD_A_LSO;
1206 } else {
1207 tx_cmd_b = 0;
1208 }
1209
1210 skb_push(skb, 4);
1211 cpu_to_le32s(&tx_cmd_b);
1212 memcpy(skb->data, &tx_cmd_b, 4);
1213
1214 skb_push(skb, 4);
1215 cpu_to_le32s(&tx_cmd_a);
1216 memcpy(skb->data, &tx_cmd_a, 4);
1217
1218 return skb;
1219 }
1220
1221 static const struct driver_info smsc75xx_info = {
1222 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
1223 .bind = smsc75xx_bind,
1224 .unbind = smsc75xx_unbind,
1225 .link_reset = smsc75xx_link_reset,
1226 .reset = smsc75xx_reset,
1227 .rx_fixup = smsc75xx_rx_fixup,
1228 .tx_fixup = smsc75xx_tx_fixup,
1229 .status = smsc75xx_status,
1230 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
1231 };
1232
1233 static const struct usb_device_id products[] = {
1234 {
1235 /* SMSC7500 USB Gigabit Ethernet Device */
1236 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
1237 .driver_info = (unsigned long) &smsc75xx_info,
1238 },
1239 {
1240 /* SMSC7500 USB Gigabit Ethernet Device */
1241 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
1242 .driver_info = (unsigned long) &smsc75xx_info,
1243 },
1244 { }, /* END */
1245 };
1246 MODULE_DEVICE_TABLE(usb, products);
1247
1248 static struct usb_driver smsc75xx_driver = {
1249 .name = SMSC_CHIPNAME,
1250 .id_table = products,
1251 .probe = usbnet_probe,
1252 .suspend = usbnet_suspend,
1253 .resume = usbnet_resume,
1254 .disconnect = usbnet_disconnect,
1255 };
1256
1257 module_usb_driver(smsc75xx_driver);
1258
1259 MODULE_AUTHOR("Nancy Lin");
1260 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1261 MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
1262 MODULE_LICENSE("GPL");
Linux with added FPC-III support