drivers/pci/setup-res.c

   1 /*
   2  *      drivers/pci/setup-res.c
   3  *
   4  * Extruded from code written by
   5  *      Dave Rusling (david.rusling@reo.mts.dec.com)
   6  *      David Mosberger (davidm@cs.arizona.edu)
   7  *      David Miller (davem@redhat.com)
   8  *
   9  * Support routines for initializing a PCI subsystem.
  10  */
  11
  12 /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
  13
  14 /*
  15  * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
  16  *           Resource sorting
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/kernel.h>
  21 #include <linux/export.h>
  22 #include <linux/pci.h>
  23 #include <linux/errno.h>
  24 #include <linux/ioport.h>
  25 #include <linux/cache.h>
  26 #include <linux/slab.h>
  27 #include "pci.h"
  28
  29
  30 void pci_update_resource(struct pci_dev *dev, int resno)
  31 {
  32         struct pci_bus_region region;
  33         u32 new, check, mask;
  34         int reg;
  35         enum pci_bar_type type;
  36         struct resource *res = dev->resource + resno;
  37
  38         /*
  39          * Ignore resources for unimplemented BARs and unused resource slots
  40          * for 64 bit BARs.
  41          */
  42         if (!res->flags)
  43                 return;
  44
  45         /*
  46          * Ignore non-moveable resources.  This might be legacy resources for
  47          * which no functional BAR register exists or another important
  48          * system resource we shouldn't move around.
  49          */
  50         if (res->flags & IORESOURCE_PCI_FIXED)
  51                 return;
  52
  53         pcibios_resource_to_bus(dev, &region, res);
  54
  55         new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
  56         if (res->flags & IORESOURCE_IO)
  57                 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
  58         else
  59                 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
  60
  61         reg = pci_resource_bar(dev, resno, &type);
  62         if (!reg)
  63                 return;
  64         if (type != pci_bar_unknown) {
  65                 if (!(res->flags & IORESOURCE_ROM_ENABLE))
  66                         return;
  67                 new |= PCI_ROM_ADDRESS_ENABLE;
  68         }
  69
  70         pci_write_config_dword(dev, reg, new);
  71         pci_read_config_dword(dev, reg, &check);
  72
  73         if ((new ^ check) & mask) {
  74                 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
  75                         resno, new, check);
  76         }
  77
  78         if (res->flags & IORESOURCE_MEM_64) {
  79                 new = region.start >> 16 >> 16;
  80                 pci_write_config_dword(dev, reg + 4, new);
  81                 pci_read_config_dword(dev, reg + 4, &check);
  82                 if (check != new) {
  83                         dev_err(&dev->dev, "BAR %d: error updating "
  84                                "(high %#08x != %#08x)\n", resno, new, check);
  85                 }
  86         }
  87         res->flags &= ~IORESOURCE_UNSET;
  88         dev_dbg(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n",
  89                 resno, res, (unsigned long long)region.start,
  90                 (unsigned long long)region.end);
  91 }
  92
  93 int pci_claim_resource(struct pci_dev *dev, int resource)
  94 {
  95         struct resource *res = &dev->resource[resource];
  96         struct resource *root, *conflict;
  97
  98         root = pci_find_parent_resource(dev, res);
  99         if (!root) {
 100                 dev_info(&dev->dev, "no compatible bridge window for %pR\n",
 101                          res);
 102                 return -EINVAL;
 103         }
 104
 105         conflict = request_resource_conflict(root, res);
 106         if (conflict) {
 107                 dev_info(&dev->dev,
 108                          "address space collision: %pR conflicts with %s %pR\n",
 109                          res, conflict->name, conflict);
 110                 return -EBUSY;
 111         }
 112
 113         return 0;
 114 }
 115 EXPORT_SYMBOL(pci_claim_resource);
 116
 117 void pci_disable_bridge_window(struct pci_dev *dev)
 118 {
 119         dev_info(&dev->dev, "disabling bridge mem windows\n");
 120
 121         /* MMIO Base/Limit */
 122         pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
 123
 124         /* Prefetchable MMIO Base/Limit */
 125         pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
 126         pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
 127         pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
 128 }
 129
 130 static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
 131                 int resno, resource_size_t size, resource_size_t align)
 132 {
 133         struct resource *res = dev->resource + resno;
 134         resource_size_t min;
 135         int ret;
 136
 137         min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
 138
 139         /* First, try exact prefetching match.. */
 140         ret = pci_bus_alloc_resource(bus, res, size, align, min,
 141                                      IORESOURCE_PREFETCH,
 142                                      pcibios_align_resource, dev);
 143
 144         if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
 145                 /*
 146                  * That failed.
 147                  *
 148                  * But a prefetching area can handle a non-prefetching
 149                  * window (it will just not perform as well).
 150                  */
 151                 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
 152                                              pcibios_align_resource, dev);
 153         }
 154         return ret;
 155 }
 156
 157 /*
 158  * Generic function that returns a value indicating that the device's
 159  * original BIOS BAR address was not saved and so is not available for
 160  * reinstatement.
 161  *
 162  * Can be over-ridden by architecture specific code that implements
 163  * reinstatement functionality rather than leaving it disabled when
 164  * normal allocation attempts fail.
 165  */
 166 resource_size_t __weak pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx)
 167 {
 168         return 0;
 169 }
 170
 171 static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
 172                 int resno, resource_size_t size)
 173 {
 174         struct resource *root, *conflict;
 175         resource_size_t fw_addr, start, end;
 176         int ret = 0;
 177
 178         fw_addr = pcibios_retrieve_fw_addr(dev, resno);
 179         if (!fw_addr)
 180                 return 1;
 181
 182         start = res->start;
 183         end = res->end;
 184         res->start = fw_addr;
 185         res->end = res->start + size - 1;
 186
 187         root = pci_find_parent_resource(dev, res);
 188         if (!root) {
 189                 if (res->flags & IORESOURCE_IO)
 190                         root = &ioport_resource;
 191                 else
 192                         root = &iomem_resource;
 193         }
 194
 195         dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
 196                  resno, res);
 197         conflict = request_resource_conflict(root, res);
 198         if (conflict) {
 199                 dev_info(&dev->dev,
 200                          "BAR %d: %pR conflicts with %s %pR\n", resno,
 201                          res, conflict->name, conflict);
 202                 res->start = start;
 203                 res->end = end;
 204                 ret = 1;
 205         }
 206         return ret;
 207 }
 208
 209 static int _pci_assign_resource(struct pci_dev *dev, int resno,
 210                                 resource_size_t size, resource_size_t min_align)
 211 {
 212         struct resource *res = dev->resource + resno;
 213         struct pci_bus *bus;
 214         int ret;
 215         char *type;
 216
 217         bus = dev->bus;
 218         while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
 219                 if (!bus->parent || !bus->self->transparent)
 220                         break;
 221                 bus = bus->parent;
 222         }
 223
 224         if (ret) {
 225                 if (res->flags & IORESOURCE_MEM)
 226                         if (res->flags & IORESOURCE_PREFETCH)
 227                                 type = "mem pref";
 228                         else
 229                                 type = "mem";
 230                 else if (res->flags & IORESOURCE_IO)
 231                         type = "io";
 232                 else
 233                         type = "unknown";
 234                 dev_info(&dev->dev,
 235                          "BAR %d: can't assign %s (size %#llx)\n",
 236                          resno, type, (unsigned long long) resource_size(res));
 237         }
 238
 239         return ret;
 240 }
 241
 242 int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsize,
 243                         resource_size_t min_align)
 244 {
 245         struct resource *res = dev->resource + resno;
 246         resource_size_t new_size;
 247         int ret;
 248
 249         if (!res->parent) {
 250                 dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR "
 251                          "\n", resno, res);
 252                 return -EINVAL;
 253         }
 254
 255         /* already aligned with min_align */
 256         new_size = resource_size(res) + addsize;
 257         ret = _pci_assign_resource(dev, resno, new_size, min_align);
 258         if (!ret) {
 259                 res->flags &= ~IORESOURCE_STARTALIGN;
 260                 dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res);
 261                 if (resno < PCI_BRIDGE_RESOURCES)
 262                         pci_update_resource(dev, resno);
 263         }
 264         return ret;
 265 }
 266
 267 int pci_assign_resource(struct pci_dev *dev, int resno)
 268 {
 269         struct resource *res = dev->resource + resno;
 270         resource_size_t align, size;
 271         struct pci_bus *bus;
 272         int ret;
 273
 274         align = pci_resource_alignment(dev, res);
 275         if (!align) {
 276                 dev_info(&dev->dev, "BAR %d: can't assign %pR "
 277                          "(bogus alignment)\n", resno, res);
 278                 return -EINVAL;
 279         }
 280
 281         bus = dev->bus;
 282         size = resource_size(res);
 283         ret = _pci_assign_resource(dev, resno, size, align);
 284
 285         /*
 286          * If we failed to assign anything, let's try the address
 287          * where firmware left it.  That at least has a chance of
 288          * working, which is better than just leaving it disabled.
 289          */
 290         if (ret < 0)
 291                 ret = pci_revert_fw_address(res, dev, resno, size);
 292
 293         if (!ret) {
 294                 res->flags &= ~IORESOURCE_STARTALIGN;
 295                 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
 296                 if (resno < PCI_BRIDGE_RESOURCES)
 297                         pci_update_resource(dev, resno);
 298         }
 299         return ret;
 300 }
 301
 302 int pci_enable_resources(struct pci_dev *dev, int mask)
 303 {
 304         u16 cmd, old_cmd;
 305         int i;
 306         struct resource *r;
 307
 308         pci_read_config_word(dev, PCI_COMMAND, &cmd);
 309         old_cmd = cmd;
 310
 311         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 312                 if (!(mask & (1 << i)))
 313                         continue;
 314
 315                 r = &dev->resource[i];
 316
 317                 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
 318                         continue;
 319                 if ((i == PCI_ROM_RESOURCE) &&
 320                                 (!(r->flags & IORESOURCE_ROM_ENABLE)))
 321                         continue;
 322
 323                 if (!r->parent) {
 324                         dev_err(&dev->dev, "device not available "
 325                                 "(can't reserve %pR)\n", r);
 326                         return -EINVAL;
 327                 }
 328
 329                 if (r->flags & IORESOURCE_IO)
 330                         cmd |= PCI_COMMAND_IO;
 331                 if (r->flags & IORESOURCE_MEM)
 332                         cmd |= PCI_COMMAND_MEMORY;
 333         }
 334
 335         if (cmd != old_cmd) {
 336                 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
 337                          old_cmd, cmd);
 338                 pci_write_config_word(dev, PCI_COMMAND, cmd);
 339         }
 340         return 0;
 341 }