drivers/watchdog/sp805_wdt.c

   1 /*
   2  * drivers/char/watchdog/sp805-wdt.c
   3  *
   4  * Watchdog driver for ARM SP805 watchdog module
   5  *
   6  * Copyright (C) 2010 ST Microelectronics
   7  * Viresh Kumar<viresh.kumar@st.com>
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2 or later. This program is licensed "as is" without any
  11  * warranty of any kind, whether express or implied.
  12  */
  13
  14 #include <linux/device.h>
  15 #include <linux/resource.h>
  16 #include <linux/amba/bus.h>
  17 #include <linux/bitops.h>
  18 #include <linux/clk.h>
  19 #include <linux/fs.h>
  20 #include <linux/init.h>
  21 #include <linux/io.h>
  22 #include <linux/ioport.h>
  23 #include <linux/kernel.h>
  24 #include <linux/math64.h>
  25 #include <linux/miscdevice.h>
  26 #include <linux/module.h>
  27 #include <linux/moduleparam.h>
  28 #include <linux/pm.h>
  29 #include <linux/slab.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/types.h>
  32 #include <linux/uaccess.h>
  33 #include <linux/watchdog.h>
  34
  35 /* default timeout in seconds */
  36 #define DEFAULT_TIMEOUT         60
  37
  38 #define MODULE_NAME             "sp805-wdt"
  39
  40 /* watchdog register offsets and masks */
  41 #define WDTLOAD                 0x000
  42         #define LOAD_MIN        0x00000001
  43         #define LOAD_MAX        0xFFFFFFFF
  44 #define WDTVALUE                0x004
  45 #define WDTCONTROL              0x008
  46         /* control register masks */
  47         #define INT_ENABLE      (1 << 0)
  48         #define RESET_ENABLE    (1 << 1)
  49 #define WDTINTCLR               0x00C
  50 #define WDTRIS                  0x010
  51 #define WDTMIS                  0x014
  52         #define INT_MASK        (1 << 0)
  53 #define WDTLOCK                 0xC00
  54         #define UNLOCK          0x1ACCE551
  55         #define LOCK            0x00000001
  56
  57 /**
  58  * struct sp805_wdt: sp805 wdt device structure
  59  * @lock: spin lock protecting dev structure and io access
  60  * @base: base address of wdt
  61  * @clk: clock structure of wdt
  62  * @adev: amba device structure of wdt
  63  * @status: current status of wdt
  64  * @load_val: load value to be set for current timeout
  65  */
  66 struct sp805_wdt {
  67         spinlock_t                      lock;
  68         void __iomem                    *base;
  69         struct clk                      *clk;
  70         struct amba_device              *adev;
  71         unsigned long                   status;
  72         #define WDT_BUSY                0
  73         #define WDT_CAN_BE_CLOSED       1
  74         unsigned int                    load_val;
  75 };
  76
  77 /* local variables */
  78 static struct sp805_wdt *wdt;
  79 static bool nowayout = WATCHDOG_NOWAYOUT;
  80
  81 /* This routine finds load value that will reset system in required timout */
  82 static void wdt_setload(unsigned int timeout)
  83 {
  84         u64 load, rate;
  85
  86         rate = clk_get_rate(wdt->clk);
  87
  88         /*
  89          * sp805 runs counter with given value twice, after the end of first
  90          * counter it gives an interrupt and then starts counter again. If
  91          * interrupt already occurred then it resets the system. This is why
  92          * load is half of what should be required.
  93          */
  94         load = div_u64(rate, 2) * timeout - 1;
  95
  96         load = (load > LOAD_MAX) ? LOAD_MAX : load;
  97         load = (load < LOAD_MIN) ? LOAD_MIN : load;
  98
  99         spin_lock(&wdt->lock);
 100         wdt->load_val = load;
 101         /* roundup timeout to closest positive integer value */
 102         wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
 103         spin_unlock(&wdt->lock);
 104 }
 105
 106 /* returns number of seconds left for reset to occur */
 107 static u32 wdt_timeleft(void)
 108 {
 109         u64 load, rate;
 110
 111         rate = clk_get_rate(wdt->clk);
 112
 113         spin_lock(&wdt->lock);
 114         load = readl_relaxed(wdt->base + WDTVALUE);
 115
 116         /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
 117         if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
 118                 load += wdt->load_val + 1;
 119         spin_unlock(&wdt->lock);
 120
 121         return div_u64(load, rate);
 122 }
 123
 124 /* enables watchdog timers reset */
 125 static void wdt_enable(void)
 126 {
 127         spin_lock(&wdt->lock);
 128
 129         writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
 130         writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
 131         writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
 132         writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);
 133         writel_relaxed(LOCK, wdt->base + WDTLOCK);
 134
 135         /* Flush posted writes. */
 136         readl_relaxed(wdt->base + WDTLOCK);
 137         spin_unlock(&wdt->lock);
 138 }
 139
 140 /* disables watchdog timers reset */
 141 static void wdt_disable(void)
 142 {
 143         spin_lock(&wdt->lock);
 144
 145         writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
 146         writel_relaxed(0, wdt->base + WDTCONTROL);
 147         writel_relaxed(LOCK, wdt->base + WDTLOCK);
 148
 149         /* Flush posted writes. */
 150         readl_relaxed(wdt->base + WDTLOCK);
 151         spin_unlock(&wdt->lock);
 152 }
 153
 154 static ssize_t sp805_wdt_write(struct file *file, const char *data,
 155                 size_t len, loff_t *ppos)
 156 {
 157         if (len) {
 158                 if (!nowayout) {
 159                         size_t i;
 160
 161                         clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
 162
 163                         for (i = 0; i != len; i++) {
 164                                 char c;
 165
 166                                 if (get_user(c, data + i))
 167                                         return -EFAULT;
 168                                 /* Check for Magic Close character */
 169                                 if (c == 'V') {
 170                                         set_bit(WDT_CAN_BE_CLOSED,
 171                                                         &wdt->status);
 172                                         break;
 173                                 }
 174                         }
 175                 }
 176                 wdt_enable();
 177         }
 178         return len;
 179 }
 180
 181 static const struct watchdog_info ident = {
 182         .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
 183         .identity = MODULE_NAME,
 184 };
 185
 186 static long sp805_wdt_ioctl(struct file *file, unsigned int cmd,
 187                 unsigned long arg)
 188 {
 189         int ret = -ENOTTY;
 190         unsigned int timeout;
 191
 192         switch (cmd) {
 193         case WDIOC_GETSUPPORT:
 194                 ret = copy_to_user((struct watchdog_info *)arg, &ident,
 195                                 sizeof(ident)) ? -EFAULT : 0;
 196                 break;
 197
 198         case WDIOC_GETSTATUS:
 199                 ret = put_user(0, (int *)arg);
 200                 break;
 201
 202         case WDIOC_KEEPALIVE:
 203                 wdt_enable();
 204                 ret = 0;
 205                 break;
 206
 207         case WDIOC_SETTIMEOUT:
 208                 ret = get_user(timeout, (unsigned int *)arg);
 209                 if (ret)
 210                         break;
 211
 212                 wdt_setload(timeout);
 213
 214                 wdt_enable();
 215                 /* Fall through */
 216
 217         case WDIOC_GETTIMEOUT:
 218                 ret = put_user(wdt->timeout, (unsigned int *)arg);
 219                 break;
 220         case WDIOC_GETTIMELEFT:
 221                 ret = put_user(wdt_timeleft(), (unsigned int *)arg);
 222                 break;
 223         }
 224         return ret;
 225 }
 226
 227 static int sp805_wdt_open(struct inode *inode, struct file *file)
 228 {
 229         int ret = 0;
 230
 231         if (test_and_set_bit(WDT_BUSY, &wdt->status))
 232                 return -EBUSY;
 233
 234         ret = clk_enable(wdt->clk);
 235         if (ret) {
 236                 dev_err(&wdt->adev->dev, "clock enable fail");
 237                 goto err;
 238         }
 239
 240         wdt_enable();
 241
 242         /* can not be closed, once enabled */
 243         clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
 244         return nonseekable_open(inode, file);
 245
 246 err:
 247         clear_bit(WDT_BUSY, &wdt->status);
 248         return ret;
 249 }
 250
 251 static int sp805_wdt_release(struct inode *inode, struct file *file)
 252 {
 253         if (!test_bit(WDT_CAN_BE_CLOSED, &wdt->status)) {
 254                 clear_bit(WDT_BUSY, &wdt->status);
 255                 dev_warn(&wdt->adev->dev, "Device closed unexpectedly\n");
 256                 return 0;
 257         }
 258
 259         wdt_disable();
 260         clk_disable(wdt->clk);
 261         clear_bit(WDT_BUSY, &wdt->status);
 262
 263         return 0;
 264 }
 265
 266 static const struct file_operations sp805_wdt_fops = {
 267         .owner = THIS_MODULE,
 268         .llseek = no_llseek,
 269         .write = sp805_wdt_write,
 270         .unlocked_ioctl = sp805_wdt_ioctl,
 271         .open = sp805_wdt_open,
 272         .release = sp805_wdt_release,
 273 };
 274
 275 static struct miscdevice sp805_wdt_miscdev = {
 276         .minor = WATCHDOG_MINOR,
 277         .name = "watchdog",
 278         .fops = &sp805_wdt_fops,
 279 };
 280
 281 static int __devinit
 282 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
 283 {
 284         int ret = 0;
 285
 286         if (!devm_request_mem_region(&adev->dev, adev->res.start,
 287                                 resource_size(&adev->res), "sp805_wdt")) {
 288                 dev_warn(&adev->dev, "Failed to get memory region resource\n");
 289                 ret = -ENOENT;
 290                 goto err;
 291         }
 292
 293         wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
 294         if (!wdt) {
 295                 dev_warn(&adev->dev, "Kzalloc failed\n");
 296                 ret = -ENOMEM;
 297                 goto err;
 298         }
 299
 300         wdt->base = devm_ioremap(&adev->dev, adev->res.start,
 301                         resource_size(&adev->res));
 302         if (!wdt->base) {
 303                 ret = -ENOMEM;
 304                 dev_warn(&adev->dev, "ioremap fail\n");
 305                 goto err;
 306         }
 307
 308         wdt->clk = clk_get(&adev->dev, NULL);
 309         if (IS_ERR(wdt->clk)) {
 310                 dev_warn(&adev->dev, "Clock not found\n");
 311                 ret = PTR_ERR(wdt->clk);
 312                 goto err;
 313         }
 314
 315         wdt->adev = adev;
 316         spin_lock_init(&wdt->lock);
 317         wdt_setload(DEFAULT_TIMEOUT);
 318
 319         ret = misc_register(&sp805_wdt_miscdev);
 320         if (ret < 0) {
 321                 dev_warn(&adev->dev, "cannot register misc device\n");
 322                 goto err_misc_register;
 323         }
 324
 325         dev_info(&adev->dev, "registration successful\n");
 326         return 0;
 327
 328 err_misc_register:
 329         clk_put(wdt->clk);
 330 err:
 331         dev_err(&adev->dev, "Probe Failed!!!\n");
 332         return ret;
 333 }
 334
 335 static int __devexit sp805_wdt_remove(struct amba_device *adev)
 336 {
 337         misc_deregister(&sp805_wdt_miscdev);
 338         clk_put(wdt->clk);
 339
 340         return 0;
 341 }
 342
 343 #ifdef CONFIG_PM
 344 static int sp805_wdt_suspend(struct device *dev)
 345 {
 346         if (test_bit(WDT_BUSY, &wdt->status)) {
 347                 wdt_disable();
 348                 clk_disable(wdt->clk);
 349         }
 350
 351         return 0;
 352 }
 353
 354 static int sp805_wdt_resume(struct device *dev)
 355 {
 356         int ret = 0;
 357
 358         if (test_bit(WDT_BUSY, &wdt->status)) {
 359                 ret = clk_enable(wdt->clk);
 360                 if (ret) {
 361                         dev_err(dev, "clock enable fail");
 362                         return ret;
 363                 }
 364                 wdt_enable();
 365         }
 366
 367         return ret;
 368 }
 369 #endif /* CONFIG_PM */
 370
 371 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
 372                 sp805_wdt_resume);
 373
 374 static struct amba_id sp805_wdt_ids[] = {
 375         {
 376                 .id     = 0x00141805,
 377                 .mask   = 0x00ffffff,
 378         },
 379         { 0, 0 },
 380 };
 381
 382 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
 383
 384 static struct amba_driver sp805_wdt_driver = {
 385         .drv = {
 386                 .name   = MODULE_NAME,
 387                 .pm     = &sp805_wdt_dev_pm_ops,
 388         },
 389         .id_table       = sp805_wdt_ids,
 390         .probe          = sp805_wdt_probe,
 391         .remove = __devexit_p(sp805_wdt_remove),
 392 };
 393
 394 module_amba_driver(sp805_wdt_driver);
 395
 396 module_param(nowayout, bool, 0);
 397 MODULE_PARM_DESC(nowayout,
 398                 "Set to 1 to keep watchdog running after device release");
 399
 400 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
 401 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
 402 MODULE_LICENSE("GPL");
 403 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);