drivers/iio/adc/ad7887.c

   1 /*
   2  * AD7887 SPI ADC driver
   3  *
   4  * Copyright 2010-2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/kernel.h>
  11 #include <linux/slab.h>
  12 #include <linux/sysfs.h>
  13 #include <linux/spi/spi.h>
  14 #include <linux/regulator/consumer.h>
  15 #include <linux/err.h>
  16 #include <linux/module.h>
  17 #include <linux/interrupt.h>
  18
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/sysfs.h>
  21 #include <linux/iio/buffer.h>
  22
  23 #include <linux/iio/trigger_consumer.h>
  24 #include <linux/iio/triggered_buffer.h>
  25
  26 #include <linux/platform_data/ad7887.h>
  27
  28 #define AD7887_REF_DIS          (1 << 5) /* on-chip reference disable */
  29 #define AD7887_DUAL             (1 << 4) /* dual-channel mode */
  30 #define AD7887_CH_AIN1          (1 << 3) /* convert on channel 1, DUAL=1 */
  31 #define AD7887_CH_AIN0          (0 << 3) /* convert on channel 0, DUAL=0,1 */
  32 #define AD7887_PM_MODE1         (0)      /* CS based shutdown */
  33 #define AD7887_PM_MODE2         (1)      /* full on */
  34 #define AD7887_PM_MODE3         (2)      /* auto shutdown after conversion */
  35 #define AD7887_PM_MODE4         (3)      /* standby mode */
  36
  37 enum ad7887_channels {
  38         AD7887_CH0,
  39         AD7887_CH0_CH1,
  40         AD7887_CH1,
  41 };
  42
  43 #define RES_MASK(bits)  ((1 << (bits)) - 1)
  44
  45 /**
  46  * struct ad7887_chip_info - chip specifc information
  47  * @int_vref_mv:        the internal reference voltage
  48  * @channel:            channel specification
  49  */
  50 struct ad7887_chip_info {
  51         u16                             int_vref_mv;
  52         struct iio_chan_spec            channel[3];
  53 };
  54
  55 struct ad7887_state {
  56         struct spi_device               *spi;
  57         const struct ad7887_chip_info   *chip_info;
  58         struct regulator                *reg;
  59         struct spi_transfer             xfer[4];
  60         struct spi_message              msg[3];
  61         struct spi_message              *ring_msg;
  62         unsigned char                   tx_cmd_buf[4];
  63
  64         /*
  65          * DMA (thus cache coherency maintenance) requires the
  66          * transfer buffers to live in their own cache lines.
  67          * Buffer needs to be large enough to hold two 16 bit samples and a
  68          * 64 bit aligned 64 bit timestamp.
  69          */
  70         unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
  71                 ____cacheline_aligned;
  72 };
  73
  74 enum ad7887_supported_device_ids {
  75         ID_AD7887
  76 };
  77
  78 static int ad7887_ring_preenable(struct iio_dev *indio_dev)
  79 {
  80         struct ad7887_state *st = iio_priv(indio_dev);
  81         int ret;
  82
  83         ret = iio_sw_buffer_preenable(indio_dev);
  84         if (ret < 0)
  85                 return ret;
  86
  87         /* We know this is a single long so can 'cheat' */
  88         switch (*indio_dev->active_scan_mask) {
  89         case (1 << 0):
  90                 st->ring_msg = &st->msg[AD7887_CH0];
  91                 break;
  92         case (1 << 1):
  93                 st->ring_msg = &st->msg[AD7887_CH1];
  94                 /* Dummy read: push CH1 setting down to hardware */
  95                 spi_sync(st->spi, st->ring_msg);
  96                 break;
  97         case ((1 << 1) | (1 << 0)):
  98                 st->ring_msg = &st->msg[AD7887_CH0_CH1];
  99                 break;
 100         }
 101
 102         return 0;
 103 }
 104
 105 static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
 106 {
 107         struct ad7887_state *st = iio_priv(indio_dev);
 108
 109         /* dummy read: restore default CH0 settin */
 110         return spi_sync(st->spi, &st->msg[AD7887_CH0]);
 111 }
 112
 113 /**
 114  * ad7887_trigger_handler() bh of trigger launched polling to ring buffer
 115  *
 116  * Currently there is no option in this driver to disable the saving of
 117  * timestamps within the ring.
 118  **/
 119 static irqreturn_t ad7887_trigger_handler(int irq, void *p)
 120 {
 121         struct iio_poll_func *pf = p;
 122         struct iio_dev *indio_dev = pf->indio_dev;
 123         struct ad7887_state *st = iio_priv(indio_dev);
 124         s64 time_ns;
 125         int b_sent;
 126
 127         b_sent = spi_sync(st->spi, st->ring_msg);
 128         if (b_sent)
 129                 goto done;
 130
 131         time_ns = iio_get_time_ns();
 132
 133         if (indio_dev->scan_timestamp)
 134                 memcpy(st->data + indio_dev->scan_bytes - sizeof(s64),
 135                        &time_ns, sizeof(time_ns));
 136
 137         iio_push_to_buffers(indio_dev, st->data);
 138 done:
 139         iio_trigger_notify_done(indio_dev->trig);
 140
 141         return IRQ_HANDLED;
 142 }
 143
 144 static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
 145         .preenable = &ad7887_ring_preenable,
 146         .postenable = &iio_triggered_buffer_postenable,
 147         .predisable = &iio_triggered_buffer_predisable,
 148         .postdisable = &ad7887_ring_postdisable,
 149 };
 150
 151 static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
 152 {
 153         int ret = spi_sync(st->spi, &st->msg[ch]);
 154         if (ret)
 155                 return ret;
 156
 157         return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
 158 }
 159
 160 static int ad7887_read_raw(struct iio_dev *indio_dev,
 161                            struct iio_chan_spec const *chan,
 162                            int *val,
 163                            int *val2,
 164                            long m)
 165 {
 166         int ret;
 167         struct ad7887_state *st = iio_priv(indio_dev);
 168
 169         switch (m) {
 170         case IIO_CHAN_INFO_RAW:
 171                 mutex_lock(&indio_dev->mlock);
 172                 if (iio_buffer_enabled(indio_dev))
 173                         ret = -EBUSY;
 174                 else
 175                         ret = ad7887_scan_direct(st, chan->address);
 176                 mutex_unlock(&indio_dev->mlock);
 177
 178                 if (ret < 0)
 179                         return ret;
 180                 *val = ret >> chan->scan_type.shift;
 181                 *val &= RES_MASK(chan->scan_type.realbits);
 182                 return IIO_VAL_INT;
 183         case IIO_CHAN_INFO_SCALE:
 184                 if (st->reg) {
 185                         *val = regulator_get_voltage(st->reg);
 186                         if (*val < 0)
 187                                 return *val;
 188                         *val /= 1000;
 189                 } else {
 190                         *val = st->chip_info->int_vref_mv;
 191                 }
 192
 193                 *val2 = chan->scan_type.realbits;
 194
 195                 return IIO_VAL_FRACTIONAL_LOG2;
 196         }
 197         return -EINVAL;
 198 }
 199
 200
 201 static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
 202         /*
 203          * More devices added in future
 204          */
 205         [ID_AD7887] = {
 206                 .channel[0] = {
 207                         .type = IIO_VOLTAGE,
 208                         .indexed = 1,
 209                         .channel = 1,
 210                         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 211                         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 212                         .address = 1,
 213                         .scan_index = 1,
 214                         .scan_type = {
 215                                 .sign = 'u',
 216                                 .realbits = 12,
 217                                 .storagebits = 16,
 218                                 .shift = 0,
 219                                 .endianness = IIO_BE,
 220                         },
 221                 },
 222                 .channel[1] = {
 223                         .type = IIO_VOLTAGE,
 224                         .indexed = 1,
 225                         .channel = 0,
 226                         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 227                         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 228                         .address = 0,
 229                         .scan_index = 0,
 230                         .scan_type = {
 231                                 .sign = 'u',
 232                                 .realbits = 12,
 233                                 .storagebits = 16,
 234                                 .shift = 0,
 235                                 .endianness = IIO_BE,
 236                         },
 237                 },
 238                 .channel[2] = IIO_CHAN_SOFT_TIMESTAMP(2),
 239                 .int_vref_mv = 2500,
 240         },
 241 };
 242
 243 static const struct iio_info ad7887_info = {
 244         .read_raw = &ad7887_read_raw,
 245         .driver_module = THIS_MODULE,
 246 };
 247
 248 static int ad7887_probe(struct spi_device *spi)
 249 {
 250         struct ad7887_platform_data *pdata = spi->dev.platform_data;
 251         struct ad7887_state *st;
 252         struct iio_dev *indio_dev;
 253         uint8_t mode;
 254         int ret;
 255
 256         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 257         if (indio_dev == NULL)
 258                 return -ENOMEM;
 259
 260         st = iio_priv(indio_dev);
 261
 262         if (!pdata || !pdata->use_onchip_ref) {
 263                 st->reg = devm_regulator_get(&spi->dev, "vref");
 264                 if (IS_ERR(st->reg))
 265                         return PTR_ERR(st->reg);
 266
 267                 ret = regulator_enable(st->reg);
 268                 if (ret)
 269                         return ret;
 270         }
 271
 272         st->chip_info =
 273                 &ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];
 274
 275         spi_set_drvdata(spi, indio_dev);
 276         st->spi = spi;
 277
 278         /* Estabilish that the iio_dev is a child of the spi device */
 279         indio_dev->dev.parent = &spi->dev;
 280         indio_dev->name = spi_get_device_id(spi)->name;
 281         indio_dev->info = &ad7887_info;
 282         indio_dev->modes = INDIO_DIRECT_MODE;
 283
 284         /* Setup default message */
 285
 286         mode = AD7887_PM_MODE4;
 287         if (!pdata || !pdata->use_onchip_ref)
 288                 mode |= AD7887_REF_DIS;
 289         if (pdata && pdata->en_dual)
 290                 mode |= AD7887_DUAL;
 291
 292         st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
 293
 294         st->xfer[0].rx_buf = &st->data[0];
 295         st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
 296         st->xfer[0].len = 2;
 297
 298         spi_message_init(&st->msg[AD7887_CH0]);
 299         spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
 300
 301         if (pdata && pdata->en_dual) {
 302                 st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
 303
 304                 st->xfer[1].rx_buf = &st->data[0];
 305                 st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
 306                 st->xfer[1].len = 2;
 307
 308                 st->xfer[2].rx_buf = &st->data[2];
 309                 st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
 310                 st->xfer[2].len = 2;
 311
 312                 spi_message_init(&st->msg[AD7887_CH0_CH1]);
 313                 spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
 314                 spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
 315
 316                 st->xfer[3].rx_buf = &st->data[2];
 317                 st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
 318                 st->xfer[3].len = 2;
 319
 320                 spi_message_init(&st->msg[AD7887_CH1]);
 321                 spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
 322
 323                 indio_dev->channels = st->chip_info->channel;
 324                 indio_dev->num_channels = 3;
 325         } else {
 326                 indio_dev->channels = &st->chip_info->channel[1];
 327                 indio_dev->num_channels = 2;
 328         }
 329
 330         ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
 331                         &ad7887_trigger_handler, &ad7887_ring_setup_ops);
 332         if (ret)
 333                 goto error_disable_reg;
 334
 335         ret = iio_device_register(indio_dev);
 336         if (ret)
 337                 goto error_unregister_ring;
 338
 339         return 0;
 340 error_unregister_ring:
 341         iio_triggered_buffer_cleanup(indio_dev);
 342 error_disable_reg:
 343         if (st->reg)
 344                 regulator_disable(st->reg);
 345
 346         return ret;
 347 }
 348
 349 static int ad7887_remove(struct spi_device *spi)
 350 {
 351         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 352         struct ad7887_state *st = iio_priv(indio_dev);
 353
 354         iio_device_unregister(indio_dev);
 355         iio_triggered_buffer_cleanup(indio_dev);
 356         if (st->reg)
 357                 regulator_disable(st->reg);
 358
 359         return 0;
 360 }
 361
 362 static const struct spi_device_id ad7887_id[] = {
 363         {"ad7887", ID_AD7887},
 364         {}
 365 };
 366 MODULE_DEVICE_TABLE(spi, ad7887_id);
 367
 368 static struct spi_driver ad7887_driver = {
 369         .driver = {
 370                 .name   = "ad7887",
 371                 .owner  = THIS_MODULE,
 372         },
 373         .probe          = ad7887_probe,
 374         .remove         = ad7887_remove,
 375         .id_table       = ad7887_id,
 376 };
 377 module_spi_driver(ad7887_driver);
 378
 379 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 380 MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
 381 MODULE_LICENSE("GPL v2");