2 * Realtek RTL2832 DVB-T demodulator driver
4 * Copyright (C) 2012 Thomas Mair <thomas.mair86@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #ifndef RTL2832_PRIV_H
22 #define RTL2832_PRIV_H
24 #include "dvb_frontend.h"
28 struct i2c_adapter
*i2c
;
29 struct dvb_frontend fe
;
30 struct rtl2832_config cfg
;
36 u8 page
; /* active register page */
39 struct rtl2832_reg_entry
{
46 struct rtl2832_reg_value
{
52 /* Demod register bit names */
53 enum DVBT_REG_BIT_NAME
{
57 DVBT_RSD_BER_FAIL_VAL
,
118 DVBT_CFREQ_OFF_RATIO
,
153 DVBT_AGC_TARG_VAL_8_1
,
184 DVBT_MPEG_IO_OPT_2_2
,
185 DVBT_MPEG_IO_OPT_1_0
,
242 DVBT_REG_BIT_NAME_ITEM_TERMINATOR
,
245 static const struct rtl2832_reg_value rtl2832_tuner_init_tua9001
[] = {
246 {DVBT_DAGC_TRG_VAL
, 0x39},
247 {DVBT_AGC_TARG_VAL_0
, 0x0},
248 {DVBT_AGC_TARG_VAL_8_1
, 0x5a},
249 {DVBT_AAGC_LOOP_GAIN
, 0x16},
250 {DVBT_LOOP_GAIN2_3_0
, 0x6},
251 {DVBT_LOOP_GAIN2_4
, 0x1},
252 {DVBT_LOOP_GAIN3
, 0x16},
260 {DVBT_IF_AGC_MIN
, 0x80},
261 {DVBT_IF_AGC_MAX
, 0x7f},
262 {DVBT_RF_AGC_MIN
, 0x9c},
263 {DVBT_RF_AGC_MAX
, 0x7f},
264 {DVBT_POLAR_RF_AGC
, 0x0},
265 {DVBT_POLAR_IF_AGC
, 0x0},
266 {DVBT_AD7_SETTING
, 0xe9f4},
267 {DVBT_OPT_ADC_IQ
, 0x1},
270 {DVBT_SPEC_INV
, 0x0},
273 static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012
[] = {
274 {DVBT_DAGC_TRG_VAL
, 0x5a},
275 {DVBT_AGC_TARG_VAL_0
, 0x0},
276 {DVBT_AGC_TARG_VAL_8_1
, 0x5a},
277 {DVBT_AAGC_LOOP_GAIN
, 0x16},
278 {DVBT_LOOP_GAIN2_3_0
, 0x6},
279 {DVBT_LOOP_GAIN2_4
, 0x1},
280 {DVBT_LOOP_GAIN3
, 0x16},
288 {DVBT_IF_AGC_MIN
, 0x80},
289 {DVBT_IF_AGC_MAX
, 0x7f},
290 {DVBT_RF_AGC_MIN
, 0x80},
291 {DVBT_RF_AGC_MAX
, 0x7f},
292 {DVBT_POLAR_RF_AGC
, 0x0},
293 {DVBT_POLAR_IF_AGC
, 0x0},
294 {DVBT_AD7_SETTING
, 0xe9bf},
295 {DVBT_EN_GI_PGA
, 0x0},
296 {DVBT_THD_LOCK_UP
, 0x0},
297 {DVBT_THD_LOCK_DW
, 0x0},
298 {DVBT_THD_UP1
, 0x11},
299 {DVBT_THD_DW1
, 0xef},
300 {DVBT_INTER_CNT_LEN
, 0xc},
301 {DVBT_GI_PGA_STATE
, 0x0},
302 {DVBT_EN_AGC_PGA
, 0x1},
303 {DVBT_IF_AGC_MAN
, 0x0},
304 {DVBT_SPEC_INV
, 0x0},
307 static const struct rtl2832_reg_value rtl2832_tuner_init_e4000
[] = {
308 {DVBT_DAGC_TRG_VAL
, 0x5a},
309 {DVBT_AGC_TARG_VAL_0
, 0x0},
310 {DVBT_AGC_TARG_VAL_8_1
, 0x5a},
311 {DVBT_AAGC_LOOP_GAIN
, 0x18},
312 {DVBT_LOOP_GAIN2_3_0
, 0x8},
313 {DVBT_LOOP_GAIN2_4
, 0x1},
314 {DVBT_LOOP_GAIN3
, 0x18},
322 {DVBT_IF_AGC_MIN
, 0x80},
323 {DVBT_IF_AGC_MAX
, 0x7f},
324 {DVBT_RF_AGC_MIN
, 0x80},
325 {DVBT_RF_AGC_MAX
, 0x7f},
326 {DVBT_POLAR_RF_AGC
, 0x0},
327 {DVBT_POLAR_IF_AGC
, 0x0},
328 {DVBT_AD7_SETTING
, 0xe9d4},
329 {DVBT_EN_GI_PGA
, 0x0},
330 {DVBT_THD_LOCK_UP
, 0x0},
331 {DVBT_THD_LOCK_DW
, 0x0},
332 {DVBT_THD_UP1
, 0x14},
333 {DVBT_THD_DW1
, 0xec},
334 {DVBT_INTER_CNT_LEN
, 0xc},
335 {DVBT_GI_PGA_STATE
, 0x0},
336 {DVBT_EN_AGC_PGA
, 0x1},
339 {DVBT_REG_MONSEL
, 0x1},
341 {DVBT_REG_4MSEL
, 0x0},
342 {DVBT_SPEC_INV
, 0x0},
345 static const struct rtl2832_reg_value rtl2832_tuner_init_r820t
[] = {
346 {DVBT_DAGC_TRG_VAL
, 0x39},
347 {DVBT_AGC_TARG_VAL_0
, 0x0},
348 {DVBT_AGC_TARG_VAL_8_1
, 0x40},
349 {DVBT_AAGC_LOOP_GAIN
, 0x16},
350 {DVBT_LOOP_GAIN2_3_0
, 0x8},
351 {DVBT_LOOP_GAIN2_4
, 0x1},
352 {DVBT_LOOP_GAIN3
, 0x18},
360 {DVBT_IF_AGC_MIN
, 0x80},
361 {DVBT_IF_AGC_MAX
, 0x7f},
362 {DVBT_RF_AGC_MIN
, 0x80},
363 {DVBT_RF_AGC_MAX
, 0x7f},
364 {DVBT_POLAR_RF_AGC
, 0x0},
365 {DVBT_POLAR_IF_AGC
, 0x0},
366 {DVBT_AD7_SETTING
, 0xe9f4},
367 {DVBT_SPEC_INV
, 0x1},
370 #endif /* RTL2832_PRIV_H */