drivers/media/pci/cx23885/cimax2.c

   1 /*
   2  * cimax2.c
   3  *
   4  * CIMax2(R) SP2 driver in conjunction with NetUp Dual DVB-S2 CI card
   5  *
   6  * Copyright (C) 2009 NetUP Inc.
   7  * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
   8  * Copyright (C) 2009 Abylay Ospan <aospan@netup.ru>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  */
  25
  26 #include "cx23885.h"
  27 #include "cimax2.h"
  28 #include "dvb_ca_en50221.h"
  29
  30 /* Max transfer size done by I2C transfer functions */
  31 #define MAX_XFER_SIZE  64
  32
  33 /**** Bit definitions for MC417_RWD and MC417_OEN registers  ***
  34   bits 31-16
  35 +-----------+
  36 | Reserved  |
  37 +-----------+
  38   bit 15  bit 14  bit 13 bit 12  bit 11  bit 10  bit 9   bit 8
  39 +-------+-------+-------+-------+-------+-------+-------+-------+
  40 |  WR#  |  RD#  |       |  ACK# |  ADHI |  ADLO |  CS1# |  CS0# |
  41 +-------+-------+-------+-------+-------+-------+-------+-------+
  42  bit 7   bit 6   bit 5   bit 4   bit 3   bit 2   bit 1   bit 0
  43 +-------+-------+-------+-------+-------+-------+-------+-------+
  44 |  DATA7|  DATA6|  DATA5|  DATA4|  DATA3|  DATA2|  DATA1|  DATA0|
  45 +-------+-------+-------+-------+-------+-------+-------+-------+
  46 ***/
  47 /* MC417 */
  48 #define NETUP_DATA              0x000000ff
  49 #define NETUP_WR                0x00008000
  50 #define NETUP_RD                0x00004000
  51 #define NETUP_ACK               0x00001000
  52 #define NETUP_ADHI              0x00000800
  53 #define NETUP_ADLO              0x00000400
  54 #define NETUP_CS1               0x00000200
  55 #define NETUP_CS0               0x00000100
  56 #define NETUP_EN_ALL            0x00001000
  57 #define NETUP_CTRL_OFF          (NETUP_CS1 | NETUP_CS0 | NETUP_WR | NETUP_RD)
  58 #define NETUP_CI_CTL            0x04
  59 #define NETUP_CI_RD             1
  60
  61 #define NETUP_IRQ_DETAM         0x1
  62 #define NETUP_IRQ_IRQAM         0x4
  63
  64 static unsigned int ci_dbg;
  65 module_param(ci_dbg, int, 0644);
  66 MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
  67
  68 static unsigned int ci_irq_enable;
  69 module_param(ci_irq_enable, int, 0644);
  70 MODULE_PARM_DESC(ci_irq_enable, "Enable IRQ from CAM");
  71
  72 #define ci_dbg_print(args...) \
  73         do { \
  74                 if (ci_dbg) \
  75                         printk(KERN_DEBUG args); \
  76         } while (0)
  77
  78 #define ci_irq_flags() (ci_irq_enable ? NETUP_IRQ_IRQAM : 0)
  79
  80 /* stores all private variables for communication with CI */
  81 struct netup_ci_state {
  82         struct dvb_ca_en50221 ca;
  83         struct mutex ca_mutex;
  84         struct i2c_adapter *i2c_adap;
  85         u8 ci_i2c_addr;
  86         int status;
  87         struct work_struct work;
  88         void *priv;
  89         u8 current_irq_mode;
  90         int current_ci_flag;
  91         unsigned long next_status_checked_time;
  92 };
  93
  94
  95 static int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
  96                                                 u8 *buf, int len)
  97 {
  98         int ret;
  99         struct i2c_msg msg[] = {
 100                 {
 101                         .addr   = addr,
 102                         .flags  = 0,
 103                         .buf    = &reg,
 104                         .len    = 1
 105                 }, {
 106                         .addr   = addr,
 107                         .flags  = I2C_M_RD,
 108                         .buf    = buf,
 109                         .len    = len
 110                 }
 111         };
 112
 113         ret = i2c_transfer(i2c_adap, msg, 2);
 114
 115         if (ret != 2) {
 116                 ci_dbg_print("%s: i2c read error, Reg = 0x%02x, Status = %d\n",
 117                                                 __func__, reg, ret);
 118
 119                 return -1;
 120         }
 121
 122         ci_dbg_print("%s: i2c read Addr=0x%04x, Reg = 0x%02x, data = %02x\n",
 123                                                 __func__, addr, reg, buf[0]);
 124
 125         return 0;
 126 }
 127
 128 static int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
 129                                                 u8 *buf, int len)
 130 {
 131         int ret;
 132         u8 buffer[MAX_XFER_SIZE];
 133
 134         struct i2c_msg msg = {
 135                 .addr   = addr,
 136                 .flags  = 0,
 137                 .buf    = &buffer[0],
 138                 .len    = len + 1
 139         };
 140
 141         if (1 + len > sizeof(buffer)) {
 142                 printk(KERN_WARNING
 143                        "%s: i2c wr reg=%04x: len=%d is too big!\n",
 144                        KBUILD_MODNAME, reg, len);
 145                 return -EINVAL;
 146         }
 147
 148         buffer[0] = reg;
 149         memcpy(&buffer[1], buf, len);
 150
 151         ret = i2c_transfer(i2c_adap, &msg, 1);
 152
 153         if (ret != 1) {
 154                 ci_dbg_print("%s: i2c write error, Reg=[0x%02x], Status=%d\n",
 155                                                 __func__, reg, ret);
 156                 return -1;
 157         }
 158
 159         return 0;
 160 }
 161
 162 static int netup_ci_get_mem(struct cx23885_dev *dev)
 163 {
 164         int mem;
 165         unsigned long timeout = jiffies + msecs_to_jiffies(1);
 166
 167         for (;;) {
 168                 mem = cx_read(MC417_RWD);
 169                 if ((mem & NETUP_ACK) == 0)
 170                         break;
 171                 if (time_after(jiffies, timeout))
 172                         break;
 173                 udelay(1);
 174         }
 175
 176         cx_set(MC417_RWD, NETUP_CTRL_OFF);
 177
 178         return mem & 0xff;
 179 }
 180
 181 static int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
 182                                 u8 flag, u8 read, int addr, u8 data)
 183 {
 184         struct netup_ci_state *state = en50221->data;
 185         struct cx23885_tsport *port = state->priv;
 186         struct cx23885_dev *dev = port->dev;
 187
 188         u8 store;
 189         int mem;
 190         int ret;
 191
 192         if (0 != slot)
 193                 return -EINVAL;
 194
 195         if (state->current_ci_flag != flag) {
 196                 ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
 197                                 0, &store, 1);
 198                 if (ret != 0)
 199                         return ret;
 200
 201                 store &= ~0x0c;
 202                 store |= flag;
 203
 204                 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
 205                                 0, &store, 1);
 206                 if (ret != 0)
 207                         return ret;
 208         }
 209         state->current_ci_flag = flag;
 210
 211         mutex_lock(&dev->gpio_lock);
 212
 213         /* write addr */
 214         cx_write(MC417_OEN, NETUP_EN_ALL);
 215         cx_write(MC417_RWD, NETUP_CTRL_OFF |
 216                                 NETUP_ADLO | (0xff & addr));
 217         cx_clear(MC417_RWD, NETUP_ADLO);
 218         cx_write(MC417_RWD, NETUP_CTRL_OFF |
 219                                 NETUP_ADHI | (0xff & (addr >> 8)));
 220         cx_clear(MC417_RWD, NETUP_ADHI);
 221
 222         if (read) { /* data in */
 223                 cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA);
 224         } else /* data out */
 225                 cx_write(MC417_RWD, NETUP_CTRL_OFF | data);
 226
 227         /* choose chip */
 228         cx_clear(MC417_RWD,
 229                         (state->ci_i2c_addr == 0x40) ? NETUP_CS0 : NETUP_CS1);
 230         /* read/write */
 231         cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
 232         mem = netup_ci_get_mem(dev);
 233
 234         mutex_unlock(&dev->gpio_lock);
 235
 236         if (!read)
 237                 if (mem < 0)
 238                         return -EREMOTEIO;
 239
 240         ci_dbg_print("%s: %s: chipaddr=[0x%x] addr=[0x%02x], %s=%x\n", __func__,
 241                         (read) ? "read" : "write", state->ci_i2c_addr, addr,
 242                         (flag == NETUP_CI_CTL) ? "ctl" : "mem",
 243                         (read) ? mem : data);
 244
 245         if (read)
 246                 return mem;
 247
 248         return 0;
 249 }
 250
 251 int netup_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
 252                                                 int slot, int addr)
 253 {
 254         return netup_ci_op_cam(en50221, slot, 0, NETUP_CI_RD, addr, 0);
 255 }
 256
 257 int netup_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
 258                                                 int slot, int addr, u8 data)
 259 {
 260         return netup_ci_op_cam(en50221, slot, 0, 0, addr, data);
 261 }
 262
 263 int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
 264                                  u8 addr)
 265 {
 266         return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL,
 267                                                         NETUP_CI_RD, addr, 0);
 268 }
 269
 270 int netup_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
 271                                                         u8 addr, u8 data)
 272 {
 273         return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL, 0, addr, data);
 274 }
 275
 276 int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
 277 {
 278         struct netup_ci_state *state = en50221->data;
 279         u8 buf =  0x80;
 280         int ret;
 281
 282         if (0 != slot)
 283                 return -EINVAL;
 284
 285         udelay(500);
 286         ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
 287                                                         0, &buf, 1);
 288
 289         if (ret != 0)
 290                 return ret;
 291
 292         udelay(500);
 293
 294         buf = 0x00;
 295         ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
 296                                                         0, &buf, 1);
 297
 298         msleep(1000);
 299         dvb_ca_en50221_camready_irq(&state->ca, 0);
 300
 301         return 0;
 302
 303 }
 304
 305 int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
 306 {
 307         /* not implemented */
 308         return 0;
 309 }
 310
 311 static int netup_ci_set_irq(struct dvb_ca_en50221 *en50221, u8 irq_mode)
 312 {
 313         struct netup_ci_state *state = en50221->data;
 314         int ret;
 315
 316         if (irq_mode == state->current_irq_mode)
 317                 return 0;
 318
 319         ci_dbg_print("%s: chipaddr=[0x%x] setting ci IRQ to [0x%x] \n",
 320                         __func__, state->ci_i2c_addr, irq_mode);
 321         ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
 322                                                         0x1b, &irq_mode, 1);
 323
 324         if (ret != 0)
 325                 return ret;
 326
 327         state->current_irq_mode = irq_mode;
 328
 329         return 0;
 330 }
 331
 332 int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
 333 {
 334         struct netup_ci_state *state = en50221->data;
 335         u8 buf;
 336
 337         if (0 != slot)
 338                 return -EINVAL;
 339
 340         netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
 341                         0, &buf, 1);
 342         buf |= 0x60;
 343
 344         return netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
 345                                                         0, &buf, 1);
 346 }
 347
 348 /* work handler */
 349 static void netup_read_ci_status(struct work_struct *work)
 350 {
 351         struct netup_ci_state *state =
 352                         container_of(work, struct netup_ci_state, work);
 353         u8 buf[33];
 354         int ret;
 355
 356         /* CAM module IRQ processing. fast operation */
 357         dvb_ca_en50221_frda_irq(&state->ca, 0);
 358
 359         /* CAM module INSERT/REMOVE processing. slow operation because of i2c
 360          * transfers */
 361         if (time_after(jiffies, state->next_status_checked_time)
 362                         || !state->status) {
 363                 ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
 364                                 0, &buf[0], 33);
 365
 366                 state->next_status_checked_time = jiffies
 367                         + msecs_to_jiffies(1000);
 368
 369                 if (ret != 0)
 370                         return;
 371
 372                 ci_dbg_print("%s: Slot Status Addr=[0x%04x], "
 373                                 "Reg=[0x%02x], data=%02x, "
 374                                 "TS config = %02x\n", __func__,
 375                                 state->ci_i2c_addr, 0, buf[0],
 376                                 buf[0]);
 377
 378
 379                 if (buf[0] & 1)
 380                         state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
 381                                 DVB_CA_EN50221_POLL_CAM_READY;
 382                 else
 383                         state->status = 0;
 384         }
 385 }
 386
 387 /* CI irq handler */
 388 int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status)
 389 {
 390         struct cx23885_tsport *port = NULL;
 391         struct netup_ci_state *state = NULL;
 392
 393         ci_dbg_print("%s:\n", __func__);
 394
 395         if (0 == (pci_status & (PCI_MSK_GPIO0 | PCI_MSK_GPIO1)))
 396                 return 0;
 397
 398         if (pci_status & PCI_MSK_GPIO0) {
 399                 port = &dev->ts1;
 400                 state = port->port_priv;
 401                 schedule_work(&state->work);
 402                 ci_dbg_print("%s: Wakeup CI0\n", __func__);
 403         }
 404
 405         if (pci_status & PCI_MSK_GPIO1) {
 406                 port = &dev->ts2;
 407                 state = port->port_priv;
 408                 schedule_work(&state->work);
 409                 ci_dbg_print("%s: Wakeup CI1\n", __func__);
 410         }
 411
 412         return 1;
 413 }
 414
 415 int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
 416                                      int slot, int open)
 417 {
 418         struct netup_ci_state *state = en50221->data;
 419
 420         if (0 != slot)
 421                 return -EINVAL;
 422
 423         netup_ci_set_irq(en50221, open ? (NETUP_IRQ_DETAM | ci_irq_flags())
 424                         : NETUP_IRQ_DETAM);
 425
 426         return state->status;
 427 }
 428
 429 int netup_ci_init(struct cx23885_tsport *port)
 430 {
 431         struct netup_ci_state *state;
 432         u8 cimax_init[34] = {
 433                 0x00, /* module A control*/
 434                 0x00, /* auto select mask high A */
 435                 0x00, /* auto select mask low A */
 436                 0x00, /* auto select pattern high A */
 437                 0x00, /* auto select pattern low A */
 438                 0x44, /* memory access time A */
 439                 0x00, /* invert input A */
 440                 0x00, /* RFU */
 441                 0x00, /* RFU */
 442                 0x00, /* module B control*/
 443                 0x00, /* auto select mask high B */
 444                 0x00, /* auto select mask low B */
 445                 0x00, /* auto select pattern high B */
 446                 0x00, /* auto select pattern low B */
 447                 0x44, /* memory access time B */
 448                 0x00, /* invert input B */
 449                 0x00, /* RFU */
 450                 0x00, /* RFU */
 451                 0x00, /* auto select mask high Ext */
 452                 0x00, /* auto select mask low Ext */
 453                 0x00, /* auto select pattern high Ext */
 454                 0x00, /* auto select pattern low Ext */
 455                 0x00, /* RFU */
 456                 0x02, /* destination - module A */
 457                 0x01, /* power on (use it like store place) */
 458                 0x00, /* RFU */
 459                 0x00, /* int status read only */
 460                 ci_irq_flags() | NETUP_IRQ_DETAM, /* DETAM, IRQAM unmasked */
 461                 0x05, /* EXTINT=active-high, INT=push-pull */
 462                 0x00, /* USCG1 */
 463                 0x04, /* ack active low */
 464                 0x00, /* LOCK = 0 */
 465                 0x33, /* serial mode, rising in, rising out, MSB first*/
 466                 0x31, /* synchronization */
 467         };
 468         int ret;
 469
 470         ci_dbg_print("%s\n", __func__);
 471         state = kzalloc(sizeof(struct netup_ci_state), GFP_KERNEL);
 472         if (!state) {
 473                 ci_dbg_print("%s: Unable create CI structure!\n", __func__);
 474                 ret = -ENOMEM;
 475                 goto err;
 476         }
 477
 478         port->port_priv = state;
 479
 480         switch (port->nr) {
 481         case 1:
 482                 state->ci_i2c_addr = 0x40;
 483                 break;
 484         case 2:
 485                 state->ci_i2c_addr = 0x41;
 486                 break;
 487         }
 488
 489         state->i2c_adap = &port->dev->i2c_bus[0].i2c_adap;
 490         state->ca.owner = THIS_MODULE;
 491         state->ca.read_attribute_mem = netup_ci_read_attribute_mem;
 492         state->ca.write_attribute_mem = netup_ci_write_attribute_mem;
 493         state->ca.read_cam_control = netup_ci_read_cam_ctl;
 494         state->ca.write_cam_control = netup_ci_write_cam_ctl;
 495         state->ca.slot_reset = netup_ci_slot_reset;
 496         state->ca.slot_shutdown = netup_ci_slot_shutdown;
 497         state->ca.slot_ts_enable = netup_ci_slot_ts_ctl;
 498         state->ca.poll_slot_status = netup_poll_ci_slot_status;
 499         state->ca.data = state;
 500         state->priv = port;
 501         state->current_irq_mode = ci_irq_flags() | NETUP_IRQ_DETAM;
 502
 503         ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
 504                                                 0, &cimax_init[0], 34);
 505         /* lock registers */
 506         ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
 507                                                 0x1f, &cimax_init[0x18], 1);
 508         /* power on slots */
 509         ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
 510                                                 0x18, &cimax_init[0x18], 1);
 511
 512         if (0 != ret)
 513                 goto err;
 514
 515         ret = dvb_ca_en50221_init(&port->frontends.adapter,
 516                                    &state->ca,
 517                                    /* flags */ 0,
 518                                    /* n_slots */ 1);
 519         if (0 != ret)
 520                 goto err;
 521
 522         INIT_WORK(&state->work, netup_read_ci_status);
 523         schedule_work(&state->work);
 524
 525         ci_dbg_print("%s: CI initialized!\n", __func__);
 526
 527         return 0;
 528 err:
 529         ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
 530         kfree(state);
 531         return ret;
 532 }
 533
 534 void netup_ci_exit(struct cx23885_tsport *port)
 535 {
 536         struct netup_ci_state *state;
 537
 538         if (NULL == port)
 539                 return;
 540
 541         state = (struct netup_ci_state *)port->port_priv;
 542         if (NULL == state)
 543                 return;
 544
 545         if (NULL == state->ca.data)
 546                 return;
 547
 548         dvb_ca_en50221_release(&state->ca);
 549         kfree(state);
 550 }