Linux 3.12.39
[linux/fpc-iii.git] / drivers / misc / eeprom / at24.c
blob5d4fd69d04ca05f1b189e458fdbacd4e54e3a0b7
1 /*
2 * at24.c - handle most I2C EEPROMs
4 * Copyright (C) 2005-2007 David Brownell
5 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/mutex.h>
18 #include <linux/sysfs.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/log2.h>
21 #include <linux/bitops.h>
22 #include <linux/jiffies.h>
23 #include <linux/of.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c/at24.h>
28 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
29 * Differences between different vendor product lines (like Atmel AT24C or
30 * MicroChip 24LC, etc) won't much matter for typical read/write access.
31 * There are also I2C RAM chips, likewise interchangeable. One example
32 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
34 * However, misconfiguration can lose data. "Set 16-bit memory address"
35 * to a part with 8-bit addressing will overwrite data. Writing with too
36 * big a page size also loses data. And it's not safe to assume that the
37 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
38 * uses 0x51, for just one example.
40 * Accordingly, explicit board-specific configuration data should be used
41 * in almost all cases. (One partial exception is an SMBus used to access
42 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
44 * So this driver uses "new style" I2C driver binding, expecting to be
45 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
46 * similar kernel-resident tables; or, configuration data coming from
47 * a bootloader.
49 * Other than binding model, current differences from "eeprom" driver are
50 * that this one handles write access and isn't restricted to 24c02 devices.
51 * It also handles larger devices (32 kbit and up) with two-byte addresses,
52 * which won't work on pure SMBus systems.
55 struct at24_data {
56 struct at24_platform_data chip;
57 struct memory_accessor macc;
58 int use_smbus;
61 * Lock protects against activities from other Linux tasks,
62 * but not from changes by other I2C masters.
64 struct mutex lock;
65 struct bin_attribute bin;
67 u8 *writebuf;
68 unsigned write_max;
69 unsigned num_addresses;
72 * Some chips tie up multiple I2C addresses; dummy devices reserve
73 * them for us, and we'll use them with SMBus calls.
75 struct i2c_client *client[];
79 * This parameter is to help this driver avoid blocking other drivers out
80 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
81 * clock, one 256 byte read takes about 1/43 second which is excessive;
82 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
83 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
85 * This value is forced to be a power of two so that writes align on pages.
87 static unsigned io_limit = 128;
88 module_param(io_limit, uint, 0);
89 MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
92 * Specs often allow 5 msec for a page write, sometimes 20 msec;
93 * it's important to recover from write timeouts.
95 static unsigned write_timeout = 25;
96 module_param(write_timeout, uint, 0);
97 MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
99 #define AT24_SIZE_BYTELEN 5
100 #define AT24_SIZE_FLAGS 8
102 #define AT24_BITMASK(x) (BIT(x) - 1)
104 /* create non-zero magic value for given eeprom parameters */
105 #define AT24_DEVICE_MAGIC(_len, _flags) \
106 ((1 << AT24_SIZE_FLAGS | (_flags)) \
107 << AT24_SIZE_BYTELEN | ilog2(_len))
109 static const struct i2c_device_id at24_ids[] = {
110 /* needs 8 addresses as A0-A2 are ignored */
111 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
112 /* old variants can't be handled with this generic entry! */
113 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
114 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
115 /* spd is a 24c02 in memory DIMMs */
116 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
117 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
118 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
119 /* 24rf08 quirk is handled at i2c-core */
120 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
121 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
122 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
123 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
124 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
125 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
126 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
127 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
128 { "at24", 0 },
129 { /* END OF LIST */ }
131 MODULE_DEVICE_TABLE(i2c, at24_ids);
133 /*-------------------------------------------------------------------------*/
136 * This routine supports chips which consume multiple I2C addresses. It
137 * computes the addressing information to be used for a given r/w request.
138 * Assumes that sanity checks for offset happened at sysfs-layer.
140 static struct i2c_client *at24_translate_offset(struct at24_data *at24,
141 unsigned *offset)
143 unsigned i;
145 if (at24->chip.flags & AT24_FLAG_ADDR16) {
146 i = *offset >> 16;
147 *offset &= 0xffff;
148 } else {
149 i = *offset >> 8;
150 *offset &= 0xff;
153 return at24->client[i];
156 static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
157 unsigned offset, size_t count)
159 struct i2c_msg msg[2];
160 u8 msgbuf[2];
161 struct i2c_client *client;
162 unsigned long timeout, read_time;
163 int status, i;
165 memset(msg, 0, sizeof(msg));
168 * REVISIT some multi-address chips don't rollover page reads to
169 * the next slave address, so we may need to truncate the count.
170 * Those chips might need another quirk flag.
172 * If the real hardware used four adjacent 24c02 chips and that
173 * were misconfigured as one 24c08, that would be a similar effect:
174 * one "eeprom" file not four, but larger reads would fail when
175 * they crossed certain pages.
179 * Slave address and byte offset derive from the offset. Always
180 * set the byte address; on a multi-master board, another master
181 * may have changed the chip's "current" address pointer.
183 client = at24_translate_offset(at24, &offset);
185 if (count > io_limit)
186 count = io_limit;
188 switch (at24->use_smbus) {
189 case I2C_SMBUS_I2C_BLOCK_DATA:
190 /* Smaller eeproms can work given some SMBus extension calls */
191 if (count > I2C_SMBUS_BLOCK_MAX)
192 count = I2C_SMBUS_BLOCK_MAX;
193 break;
194 case I2C_SMBUS_WORD_DATA:
195 count = 2;
196 break;
197 case I2C_SMBUS_BYTE_DATA:
198 count = 1;
199 break;
200 default:
202 * When we have a better choice than SMBus calls, use a
203 * combined I2C message. Write address; then read up to
204 * io_limit data bytes. Note that read page rollover helps us
205 * here (unlike writes). msgbuf is u8 and will cast to our
206 * needs.
208 i = 0;
209 if (at24->chip.flags & AT24_FLAG_ADDR16)
210 msgbuf[i++] = offset >> 8;
211 msgbuf[i++] = offset;
213 msg[0].addr = client->addr;
214 msg[0].buf = msgbuf;
215 msg[0].len = i;
217 msg[1].addr = client->addr;
218 msg[1].flags = I2C_M_RD;
219 msg[1].buf = buf;
220 msg[1].len = count;
224 * Reads fail if the previous write didn't complete yet. We may
225 * loop a few times until this one succeeds, waiting at least
226 * long enough for one entire page write to work.
228 timeout = jiffies + msecs_to_jiffies(write_timeout);
229 do {
230 read_time = jiffies;
231 switch (at24->use_smbus) {
232 case I2C_SMBUS_I2C_BLOCK_DATA:
233 status = i2c_smbus_read_i2c_block_data(client, offset,
234 count, buf);
235 break;
236 case I2C_SMBUS_WORD_DATA:
237 status = i2c_smbus_read_word_data(client, offset);
238 if (status >= 0) {
239 buf[0] = status & 0xff;
240 buf[1] = status >> 8;
241 status = count;
243 break;
244 case I2C_SMBUS_BYTE_DATA:
245 status = i2c_smbus_read_byte_data(client, offset);
246 if (status >= 0) {
247 buf[0] = status;
248 status = count;
250 break;
251 default:
252 status = i2c_transfer(client->adapter, msg, 2);
253 if (status == 2)
254 status = count;
256 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
257 count, offset, status, jiffies);
259 if (status == count)
260 return count;
262 /* REVISIT: at HZ=100, this is sloooow */
263 msleep(1);
264 } while (time_before(read_time, timeout));
266 return -ETIMEDOUT;
269 static ssize_t at24_read(struct at24_data *at24,
270 char *buf, loff_t off, size_t count)
272 ssize_t retval = 0;
274 if (unlikely(!count))
275 return count;
278 * Read data from chip, protecting against concurrent updates
279 * from this host, but not from other I2C masters.
281 mutex_lock(&at24->lock);
283 while (count) {
284 ssize_t status;
286 status = at24_eeprom_read(at24, buf, off, count);
287 if (status <= 0) {
288 if (retval == 0)
289 retval = status;
290 break;
292 buf += status;
293 off += status;
294 count -= status;
295 retval += status;
298 mutex_unlock(&at24->lock);
300 return retval;
303 static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj,
304 struct bin_attribute *attr,
305 char *buf, loff_t off, size_t count)
307 struct at24_data *at24;
309 at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
310 return at24_read(at24, buf, off, count);
315 * Note that if the hardware write-protect pin is pulled high, the whole
316 * chip is normally write protected. But there are plenty of product
317 * variants here, including OTP fuses and partial chip protect.
319 * We only use page mode writes; the alternative is sloooow. This routine
320 * writes at most one page.
322 static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf,
323 unsigned offset, size_t count)
325 struct i2c_client *client;
326 struct i2c_msg msg;
327 ssize_t status;
328 unsigned long timeout, write_time;
329 unsigned next_page;
331 /* Get corresponding I2C address and adjust offset */
332 client = at24_translate_offset(at24, &offset);
334 /* write_max is at most a page */
335 if (count > at24->write_max)
336 count = at24->write_max;
338 /* Never roll over backwards, to the start of this page */
339 next_page = roundup(offset + 1, at24->chip.page_size);
340 if (offset + count > next_page)
341 count = next_page - offset;
343 /* If we'll use I2C calls for I/O, set up the message */
344 if (!at24->use_smbus) {
345 int i = 0;
347 msg.addr = client->addr;
348 msg.flags = 0;
350 /* msg.buf is u8 and casts will mask the values */
351 msg.buf = at24->writebuf;
352 if (at24->chip.flags & AT24_FLAG_ADDR16)
353 msg.buf[i++] = offset >> 8;
355 msg.buf[i++] = offset;
356 memcpy(&msg.buf[i], buf, count);
357 msg.len = i + count;
361 * Writes fail if the previous one didn't complete yet. We may
362 * loop a few times until this one succeeds, waiting at least
363 * long enough for one entire page write to work.
365 timeout = jiffies + msecs_to_jiffies(write_timeout);
366 do {
367 write_time = jiffies;
368 if (at24->use_smbus) {
369 status = i2c_smbus_write_i2c_block_data(client,
370 offset, count, buf);
371 if (status == 0)
372 status = count;
373 } else {
374 status = i2c_transfer(client->adapter, &msg, 1);
375 if (status == 1)
376 status = count;
378 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
379 count, offset, status, jiffies);
381 if (status == count)
382 return count;
384 /* REVISIT: at HZ=100, this is sloooow */
385 msleep(1);
386 } while (time_before(write_time, timeout));
388 return -ETIMEDOUT;
391 static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off,
392 size_t count)
394 ssize_t retval = 0;
396 if (unlikely(!count))
397 return count;
400 * Write data to chip, protecting against concurrent updates
401 * from this host, but not from other I2C masters.
403 mutex_lock(&at24->lock);
405 while (count) {
406 ssize_t status;
408 status = at24_eeprom_write(at24, buf, off, count);
409 if (status <= 0) {
410 if (retval == 0)
411 retval = status;
412 break;
414 buf += status;
415 off += status;
416 count -= status;
417 retval += status;
420 mutex_unlock(&at24->lock);
422 return retval;
425 static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj,
426 struct bin_attribute *attr,
427 char *buf, loff_t off, size_t count)
429 struct at24_data *at24;
431 at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
432 return at24_write(at24, buf, off, count);
435 /*-------------------------------------------------------------------------*/
438 * This lets other kernel code access the eeprom data. For example, it
439 * might hold a board's Ethernet address, or board-specific calibration
440 * data generated on the manufacturing floor.
443 static ssize_t at24_macc_read(struct memory_accessor *macc, char *buf,
444 off_t offset, size_t count)
446 struct at24_data *at24 = container_of(macc, struct at24_data, macc);
448 return at24_read(at24, buf, offset, count);
451 static ssize_t at24_macc_write(struct memory_accessor *macc, const char *buf,
452 off_t offset, size_t count)
454 struct at24_data *at24 = container_of(macc, struct at24_data, macc);
456 return at24_write(at24, buf, offset, count);
459 /*-------------------------------------------------------------------------*/
461 #ifdef CONFIG_OF
462 static void at24_get_ofdata(struct i2c_client *client,
463 struct at24_platform_data *chip)
465 const __be32 *val;
466 struct device_node *node = client->dev.of_node;
468 if (node) {
469 if (of_get_property(node, "read-only", NULL))
470 chip->flags |= AT24_FLAG_READONLY;
471 val = of_get_property(node, "pagesize", NULL);
472 if (val)
473 chip->page_size = be32_to_cpup(val);
476 #else
477 static void at24_get_ofdata(struct i2c_client *client,
478 struct at24_platform_data *chip)
480 #endif /* CONFIG_OF */
482 static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
484 struct at24_platform_data chip;
485 bool writable;
486 int use_smbus = 0;
487 struct at24_data *at24;
488 int err;
489 unsigned i, num_addresses;
490 kernel_ulong_t magic;
492 if (client->dev.platform_data) {
493 chip = *(struct at24_platform_data *)client->dev.platform_data;
494 } else {
495 if (!id->driver_data)
496 return -ENODEV;
498 magic = id->driver_data;
499 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
500 magic >>= AT24_SIZE_BYTELEN;
501 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
503 * This is slow, but we can't know all eeproms, so we better
504 * play safe. Specifying custom eeprom-types via platform_data
505 * is recommended anyhow.
507 chip.page_size = 1;
509 /* update chipdata if OF is present */
510 at24_get_ofdata(client, &chip);
512 chip.setup = NULL;
513 chip.context = NULL;
516 if (!is_power_of_2(chip.byte_len))
517 dev_warn(&client->dev,
518 "byte_len looks suspicious (no power of 2)!\n");
519 if (!chip.page_size) {
520 dev_err(&client->dev, "page_size must not be 0!\n");
521 return -EINVAL;
523 if (!is_power_of_2(chip.page_size))
524 dev_warn(&client->dev,
525 "page_size looks suspicious (no power of 2)!\n");
527 /* Use I2C operations unless we're stuck with SMBus extensions. */
528 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
529 if (chip.flags & AT24_FLAG_ADDR16)
530 return -EPFNOSUPPORT;
532 if (i2c_check_functionality(client->adapter,
533 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
534 use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
535 } else if (i2c_check_functionality(client->adapter,
536 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
537 use_smbus = I2C_SMBUS_WORD_DATA;
538 } else if (i2c_check_functionality(client->adapter,
539 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
540 use_smbus = I2C_SMBUS_BYTE_DATA;
541 } else {
542 return -EPFNOSUPPORT;
546 if (chip.flags & AT24_FLAG_TAKE8ADDR)
547 num_addresses = 8;
548 else
549 num_addresses = DIV_ROUND_UP(chip.byte_len,
550 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
552 at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
553 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
554 if (!at24)
555 return -ENOMEM;
557 mutex_init(&at24->lock);
558 at24->use_smbus = use_smbus;
559 at24->chip = chip;
560 at24->num_addresses = num_addresses;
563 * Export the EEPROM bytes through sysfs, since that's convenient.
564 * By default, only root should see the data (maybe passwords etc)
566 sysfs_bin_attr_init(&at24->bin);
567 at24->bin.attr.name = "eeprom";
568 at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR;
569 at24->bin.read = at24_bin_read;
570 at24->bin.size = chip.byte_len;
572 at24->macc.read = at24_macc_read;
574 writable = !(chip.flags & AT24_FLAG_READONLY);
575 if (writable) {
576 if (!use_smbus || i2c_check_functionality(client->adapter,
577 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
579 unsigned write_max = chip.page_size;
581 at24->macc.write = at24_macc_write;
583 at24->bin.write = at24_bin_write;
584 at24->bin.attr.mode |= S_IWUSR;
586 if (write_max > io_limit)
587 write_max = io_limit;
588 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
589 write_max = I2C_SMBUS_BLOCK_MAX;
590 at24->write_max = write_max;
592 /* buffer (data + address at the beginning) */
593 at24->writebuf = devm_kzalloc(&client->dev,
594 write_max + 2, GFP_KERNEL);
595 if (!at24->writebuf)
596 return -ENOMEM;
597 } else {
598 dev_warn(&client->dev,
599 "cannot write due to controller restrictions.");
603 at24->client[0] = client;
605 /* use dummy devices for multiple-address chips */
606 for (i = 1; i < num_addresses; i++) {
607 at24->client[i] = i2c_new_dummy(client->adapter,
608 client->addr + i);
609 if (!at24->client[i]) {
610 dev_err(&client->dev, "address 0x%02x unavailable\n",
611 client->addr + i);
612 err = -EADDRINUSE;
613 goto err_clients;
617 err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin);
618 if (err)
619 goto err_clients;
621 i2c_set_clientdata(client, at24);
623 dev_info(&client->dev, "%zu byte %s EEPROM, %s, %u bytes/write\n",
624 at24->bin.size, client->name,
625 writable ? "writable" : "read-only", at24->write_max);
626 if (use_smbus == I2C_SMBUS_WORD_DATA ||
627 use_smbus == I2C_SMBUS_BYTE_DATA) {
628 dev_notice(&client->dev, "Falling back to %s reads, "
629 "performance will suffer\n", use_smbus ==
630 I2C_SMBUS_WORD_DATA ? "word" : "byte");
633 /* export data to kernel code */
634 if (chip.setup)
635 chip.setup(&at24->macc, chip.context);
637 return 0;
639 err_clients:
640 for (i = 1; i < num_addresses; i++)
641 if (at24->client[i])
642 i2c_unregister_device(at24->client[i]);
644 return err;
647 static int at24_remove(struct i2c_client *client)
649 struct at24_data *at24;
650 int i;
652 at24 = i2c_get_clientdata(client);
653 sysfs_remove_bin_file(&client->dev.kobj, &at24->bin);
655 for (i = 1; i < at24->num_addresses; i++)
656 i2c_unregister_device(at24->client[i]);
658 return 0;
661 /*-------------------------------------------------------------------------*/
663 static struct i2c_driver at24_driver = {
664 .driver = {
665 .name = "at24",
666 .owner = THIS_MODULE,
668 .probe = at24_probe,
669 .remove = at24_remove,
670 .id_table = at24_ids,
673 static int __init at24_init(void)
675 if (!io_limit) {
676 pr_err("at24: io_limit must not be 0!\n");
677 return -EINVAL;
680 io_limit = rounddown_pow_of_two(io_limit);
681 return i2c_add_driver(&at24_driver);
683 module_init(at24_init);
685 static void __exit at24_exit(void)
687 i2c_del_driver(&at24_driver);
689 module_exit(at24_exit);
691 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
692 MODULE_AUTHOR("David Brownell and Wolfram Sang");
693 MODULE_LICENSE("GPL");