Linux 3.12.39
[linux/fpc-iii.git] / drivers / watchdog / omap_wdt.c
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1 /*
2 * omap_wdt.c
4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
12 * or implied.
14 * History:
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/kernel.h>
34 #include <linux/mm.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/io.h>
42 #include <linux/slab.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/platform_data/omap-wd-timer.h>
46 #include "omap_wdt.h"
48 static bool nowayout = WATCHDOG_NOWAYOUT;
49 module_param(nowayout, bool, 0);
50 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
51 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
53 static unsigned timer_margin;
54 module_param(timer_margin, uint, 0);
55 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
57 struct omap_wdt_dev {
58 void __iomem *base; /* physical */
59 struct device *dev;
60 bool omap_wdt_users;
61 struct resource *mem;
62 int wdt_trgr_pattern;
63 struct mutex lock; /* to avoid races with PM */
66 static void omap_wdt_reload(struct omap_wdt_dev *wdev)
68 void __iomem *base = wdev->base;
70 /* wait for posted write to complete */
71 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
72 cpu_relax();
74 wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
75 __raw_writel(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
77 /* wait for posted write to complete */
78 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
79 cpu_relax();
80 /* reloaded WCRR from WLDR */
83 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
85 void __iomem *base = wdev->base;
87 /* Sequence to enable the watchdog */
88 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
89 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
90 cpu_relax();
92 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
93 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
94 cpu_relax();
97 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
99 void __iomem *base = wdev->base;
101 /* sequence required to disable watchdog */
102 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
103 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
104 cpu_relax();
106 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
107 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
108 cpu_relax();
111 static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
112 unsigned int timeout)
114 u32 pre_margin = GET_WLDR_VAL(timeout);
115 void __iomem *base = wdev->base;
117 /* just count up at 32 KHz */
118 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
119 cpu_relax();
121 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
122 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
123 cpu_relax();
126 static int omap_wdt_start(struct watchdog_device *wdog)
128 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
129 void __iomem *base = wdev->base;
131 mutex_lock(&wdev->lock);
133 wdev->omap_wdt_users = true;
135 pm_runtime_get_sync(wdev->dev);
137 /* initialize prescaler */
138 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
139 cpu_relax();
141 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
142 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
143 cpu_relax();
145 omap_wdt_set_timer(wdev, wdog->timeout);
146 omap_wdt_reload(wdev); /* trigger loading of new timeout value */
147 omap_wdt_enable(wdev);
149 mutex_unlock(&wdev->lock);
151 return 0;
154 static int omap_wdt_stop(struct watchdog_device *wdog)
156 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
158 mutex_lock(&wdev->lock);
159 omap_wdt_disable(wdev);
160 pm_runtime_put_sync(wdev->dev);
161 wdev->omap_wdt_users = false;
162 mutex_unlock(&wdev->lock);
163 return 0;
166 static int omap_wdt_ping(struct watchdog_device *wdog)
168 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
170 mutex_lock(&wdev->lock);
171 omap_wdt_reload(wdev);
172 mutex_unlock(&wdev->lock);
174 return 0;
177 static int omap_wdt_set_timeout(struct watchdog_device *wdog,
178 unsigned int timeout)
180 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
182 mutex_lock(&wdev->lock);
183 omap_wdt_disable(wdev);
184 omap_wdt_set_timer(wdev, timeout);
185 omap_wdt_enable(wdev);
186 omap_wdt_reload(wdev);
187 wdog->timeout = timeout;
188 mutex_unlock(&wdev->lock);
190 return 0;
193 static const struct watchdog_info omap_wdt_info = {
194 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
195 .identity = "OMAP Watchdog",
198 static const struct watchdog_ops omap_wdt_ops = {
199 .owner = THIS_MODULE,
200 .start = omap_wdt_start,
201 .stop = omap_wdt_stop,
202 .ping = omap_wdt_ping,
203 .set_timeout = omap_wdt_set_timeout,
206 static int omap_wdt_probe(struct platform_device *pdev)
208 struct omap_wd_timer_platform_data *pdata = pdev->dev.platform_data;
209 struct watchdog_device *omap_wdt;
210 struct resource *res, *mem;
211 struct omap_wdt_dev *wdev;
212 u32 rs;
213 int ret;
215 omap_wdt = devm_kzalloc(&pdev->dev, sizeof(*omap_wdt), GFP_KERNEL);
216 if (!omap_wdt)
217 return -ENOMEM;
219 /* reserve static register mappings */
220 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
221 if (!res)
222 return -ENOENT;
224 mem = devm_request_mem_region(&pdev->dev, res->start,
225 resource_size(res), pdev->name);
226 if (!mem)
227 return -EBUSY;
229 wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
230 if (!wdev)
231 return -ENOMEM;
233 wdev->omap_wdt_users = false;
234 wdev->mem = mem;
235 wdev->dev = &pdev->dev;
236 wdev->wdt_trgr_pattern = 0x1234;
237 mutex_init(&wdev->lock);
239 wdev->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
240 if (!wdev->base)
241 return -ENOMEM;
243 omap_wdt->info = &omap_wdt_info;
244 omap_wdt->ops = &omap_wdt_ops;
245 omap_wdt->min_timeout = TIMER_MARGIN_MIN;
246 omap_wdt->max_timeout = TIMER_MARGIN_MAX;
248 if (timer_margin >= TIMER_MARGIN_MIN &&
249 timer_margin <= TIMER_MARGIN_MAX)
250 omap_wdt->timeout = timer_margin;
251 else
252 omap_wdt->timeout = TIMER_MARGIN_DEFAULT;
254 watchdog_set_drvdata(omap_wdt, wdev);
255 watchdog_set_nowayout(omap_wdt, nowayout);
257 platform_set_drvdata(pdev, omap_wdt);
259 pm_runtime_enable(wdev->dev);
260 pm_runtime_get_sync(wdev->dev);
262 if (pdata && pdata->read_reset_sources)
263 rs = pdata->read_reset_sources();
264 else
265 rs = 0;
266 omap_wdt->bootstatus = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ?
267 WDIOF_CARDRESET : 0;
269 omap_wdt_disable(wdev);
271 ret = watchdog_register_device(omap_wdt);
272 if (ret) {
273 pm_runtime_disable(wdev->dev);
274 return ret;
277 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
278 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
279 omap_wdt->timeout);
281 pm_runtime_put_sync(wdev->dev);
283 return 0;
286 static void omap_wdt_shutdown(struct platform_device *pdev)
288 struct watchdog_device *wdog = platform_get_drvdata(pdev);
289 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
291 mutex_lock(&wdev->lock);
292 if (wdev->omap_wdt_users) {
293 omap_wdt_disable(wdev);
294 pm_runtime_put_sync(wdev->dev);
296 mutex_unlock(&wdev->lock);
299 static int omap_wdt_remove(struct platform_device *pdev)
301 struct watchdog_device *wdog = platform_get_drvdata(pdev);
302 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
304 pm_runtime_disable(wdev->dev);
305 watchdog_unregister_device(wdog);
307 return 0;
310 #ifdef CONFIG_PM
312 /* REVISIT ... not clear this is the best way to handle system suspend; and
313 * it's very inappropriate for selective device suspend (e.g. suspending this
314 * through sysfs rather than by stopping the watchdog daemon). Also, this
315 * may not play well enough with NOWAYOUT...
318 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
320 struct watchdog_device *wdog = platform_get_drvdata(pdev);
321 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
323 mutex_lock(&wdev->lock);
324 if (wdev->omap_wdt_users) {
325 omap_wdt_disable(wdev);
326 pm_runtime_put_sync(wdev->dev);
328 mutex_unlock(&wdev->lock);
330 return 0;
333 static int omap_wdt_resume(struct platform_device *pdev)
335 struct watchdog_device *wdog = platform_get_drvdata(pdev);
336 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
338 mutex_lock(&wdev->lock);
339 if (wdev->omap_wdt_users) {
340 pm_runtime_get_sync(wdev->dev);
341 omap_wdt_enable(wdev);
342 omap_wdt_reload(wdev);
344 mutex_unlock(&wdev->lock);
346 return 0;
349 #else
350 #define omap_wdt_suspend NULL
351 #define omap_wdt_resume NULL
352 #endif
354 static const struct of_device_id omap_wdt_of_match[] = {
355 { .compatible = "ti,omap3-wdt", },
358 MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
360 static struct platform_driver omap_wdt_driver = {
361 .probe = omap_wdt_probe,
362 .remove = omap_wdt_remove,
363 .shutdown = omap_wdt_shutdown,
364 .suspend = omap_wdt_suspend,
365 .resume = omap_wdt_resume,
366 .driver = {
367 .owner = THIS_MODULE,
368 .name = "omap_wdt",
369 .of_match_table = omap_wdt_of_match,
373 module_platform_driver(omap_wdt_driver);
375 MODULE_AUTHOR("George G. Davis");
376 MODULE_LICENSE("GPL");
377 MODULE_ALIAS("platform:omap_wdt");